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foss-fpga-tools
/
yosys-symbiflow-plugins
/
fa9c9d3d1df36b8d94cab6d0c4beb8542de2a3c2
/
.
/
systemverilog-plugin
/
tests
/
translate_off
/
translate_off.tcl
blob: d836d1e2b200780770a125972048b517e79a7061 [
file
]
yosys -import
if
{
[
info
procs read_uhdm
]
==
{
}
}
{
plugin -i systemverilog
}
yosys -import ;
# ingest plugin commands
set
TMP_DIR
$::
env(TEST_OUTPUT_PREFIX)
/
tmp
file mkdir
$
TMP_DIR
read_systemverilog -o
$
TMP_DIR
$::
env(DESIGN_TOP)
.
v