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foss-fpga-tools
/
yosys-symbiflow-plugins
/
faecdde78f312197dfb1636de0b288b2981f9e46
/
.
/
sdc-plugin
/
tests
/
pll_fbout_phase
/
pll_fbout_phase.input.sdc
blob: 00354d767cfa6ac297cd4cad73c718132504e7f8 [
file
]
create_clock
-
period
10
-
waveform
{
0
5
}
clk