| //-------------------------------------------------------------------------------- |
| // Auto-generated by Migen (d11565a) & LiteX (9521f2ff) on 2020-02-26 15:06:02 |
| //-------------------------------------------------------------------------------- |
| module top( |
| input serial_cts, |
| input serial_rts, |
| output reg serial_tx, |
| input serial_rx, |
| (* dont_touch = "true" *) input clk125_p, |
| input clk125_n, |
| output [13:0] ddram_a, |
| output [1:0] ddram_ba, |
| output [1:0] ddram_bg, |
| output ddram_ras_n, |
| output ddram_cas_n, |
| output ddram_we_n, |
| output ddram_cs_n, |
| output ddram_act_n, |
| output [3:0] ddram_dm, |
| inout [31:0] ddram_dq, |
| inout [3:0] ddram_dqs_p, |
| inout [3:0] ddram_dqs_n, |
| output ddram_clk_p, |
| output ddram_clk_n, |
| output ddram_cke, |
| output ddram_odt, |
| output ddram_reset_n |
| ); |
| |
| reg soclinux_soclinux_soccontroller_reset_storage = 1'd0; |
| reg soclinux_soclinux_soccontroller_reset_re = 1'd0; |
| reg [31:0] soclinux_soclinux_soccontroller_scratch_storage = 32'd305419896; |
| reg soclinux_soclinux_soccontroller_scratch_re = 1'd0; |
| wire [31:0] soclinux_soclinux_soccontroller_bus_errors_status; |
| wire soclinux_soclinux_soccontroller_bus_errors_we; |
| wire soclinux_soclinux_soccontroller_reset; |
| wire soclinux_soclinux_soccontroller_bus_error; |
| reg [31:0] soclinux_soclinux_soccontroller_bus_errors = 32'd0; |
| wire soclinux_soclinux_cpu_reset; |
| wire [29:0] soclinux_soclinux_cpu_ibus_adr; |
| wire [31:0] soclinux_soclinux_cpu_ibus_dat_w; |
| wire [31:0] soclinux_soclinux_cpu_ibus_dat_r; |
| wire [3:0] soclinux_soclinux_cpu_ibus_sel; |
| wire soclinux_soclinux_cpu_ibus_cyc; |
| wire soclinux_soclinux_cpu_ibus_stb; |
| wire soclinux_soclinux_cpu_ibus_ack; |
| wire soclinux_soclinux_cpu_ibus_we; |
| wire [2:0] soclinux_soclinux_cpu_ibus_cti; |
| wire [1:0] soclinux_soclinux_cpu_ibus_bte; |
| wire soclinux_soclinux_cpu_ibus_err; |
| wire [29:0] soclinux_soclinux_cpu_dbus_adr; |
| wire [31:0] soclinux_soclinux_cpu_dbus_dat_w; |
| wire [31:0] soclinux_soclinux_cpu_dbus_dat_r; |
| wire [3:0] soclinux_soclinux_cpu_dbus_sel; |
| wire soclinux_soclinux_cpu_dbus_cyc; |
| wire soclinux_soclinux_cpu_dbus_stb; |
| wire soclinux_soclinux_cpu_dbus_ack; |
| wire soclinux_soclinux_cpu_dbus_we; |
| wire [2:0] soclinux_soclinux_cpu_dbus_cti; |
| wire [1:0] soclinux_soclinux_cpu_dbus_bte; |
| wire soclinux_soclinux_cpu_dbus_err; |
| reg [31:0] soclinux_soclinux_cpu_interrupt0 = 32'd0; |
| wire soclinux_soclinux_cpu_latch_re; |
| wire soclinux_soclinux_cpu_latch_r; |
| wire soclinux_soclinux_cpu_latch_we; |
| reg soclinux_soclinux_cpu_latch_w = 1'd0; |
| reg [63:0] soclinux_soclinux_cpu_time_status = 64'd0; |
| wire soclinux_soclinux_cpu_time_we; |
| reg [63:0] soclinux_soclinux_cpu_time_cmp_storage = 64'd18446744073709551615; |
| reg soclinux_soclinux_cpu_time_cmp_re = 1'd0; |
| wire soclinux_soclinux_cpu_interrupt1; |
| reg [63:0] soclinux_soclinux_cpu_time = 64'd0; |
| reg [63:0] soclinux_soclinux_cpu_time_cmp = 64'd18446744073709551615; |
| reg [31:0] soclinux_soclinux_vexriscv = 32'd0; |
| wire [29:0] soclinux_soclinux_soclinux_ram_bus_adr; |
| wire [31:0] soclinux_soclinux_soclinux_ram_bus_dat_w; |
| wire [31:0] soclinux_soclinux_soclinux_ram_bus_dat_r; |
| wire [3:0] soclinux_soclinux_soclinux_ram_bus_sel; |
| wire soclinux_soclinux_soclinux_ram_bus_cyc; |
| wire soclinux_soclinux_soclinux_ram_bus_stb; |
| reg soclinux_soclinux_soclinux_ram_bus_ack = 1'd0; |
| wire soclinux_soclinux_soclinux_ram_bus_we; |
| wire [2:0] soclinux_soclinux_soclinux_ram_bus_cti; |
| wire [1:0] soclinux_soclinux_soclinux_ram_bus_bte; |
| reg soclinux_soclinux_soclinux_ram_bus_err = 1'd0; |
| wire [12:0] soclinux_soclinux_soclinux_adr; |
| wire [31:0] soclinux_soclinux_soclinux_dat_r; |
| wire [29:0] soclinux_soclinux_ram_bus_ram_bus_adr; |
| wire [31:0] soclinux_soclinux_ram_bus_ram_bus_dat_w; |
| wire [31:0] soclinux_soclinux_ram_bus_ram_bus_dat_r; |
| wire [3:0] soclinux_soclinux_ram_bus_ram_bus_sel; |
| wire soclinux_soclinux_ram_bus_ram_bus_cyc; |
| wire soclinux_soclinux_ram_bus_ram_bus_stb; |
| reg soclinux_soclinux_ram_bus_ram_bus_ack = 1'd0; |
| wire soclinux_soclinux_ram_bus_ram_bus_we; |
| wire [2:0] soclinux_soclinux_ram_bus_ram_bus_cti; |
| wire [1:0] soclinux_soclinux_ram_bus_ram_bus_bte; |
| reg soclinux_soclinux_ram_bus_ram_bus_err = 1'd0; |
| wire [9:0] soclinux_soclinux_ram_adr; |
| wire [31:0] soclinux_soclinux_ram_dat_r; |
| reg [3:0] soclinux_soclinux_ram_we = 4'd0; |
| wire [31:0] soclinux_soclinux_ram_dat_w; |
| reg [31:0] soclinux_soclinux_storage = 32'd34359738; |
| reg soclinux_soclinux_re = 1'd0; |
| wire soclinux_soclinux_sink_valid; |
| reg soclinux_soclinux_sink_ready = 1'd0; |
| wire soclinux_soclinux_sink_first; |
| wire soclinux_soclinux_sink_last; |
| wire [7:0] soclinux_soclinux_sink_payload_data; |
| reg soclinux_soclinux_uart_clk_txen = 1'd0; |
| reg [31:0] soclinux_soclinux_phase_accumulator_tx = 32'd0; |
| reg [7:0] soclinux_soclinux_tx_reg = 8'd0; |
| reg [3:0] soclinux_soclinux_tx_bitcount = 4'd0; |
| reg soclinux_soclinux_tx_busy = 1'd0; |
| reg soclinux_soclinux_source_valid = 1'd0; |
| wire soclinux_soclinux_source_ready; |
| reg soclinux_soclinux_source_first = 1'd0; |
| reg soclinux_soclinux_source_last = 1'd0; |
| reg [7:0] soclinux_soclinux_source_payload_data = 8'd0; |
| reg soclinux_soclinux_uart_clk_rxen = 1'd0; |
| reg [31:0] soclinux_soclinux_phase_accumulator_rx = 32'd0; |
| wire soclinux_soclinux_rx; |
| reg soclinux_soclinux_rx_r = 1'd0; |
| reg [7:0] soclinux_soclinux_rx_reg = 8'd0; |
| reg [3:0] soclinux_soclinux_rx_bitcount = 4'd0; |
| reg soclinux_soclinux_rx_busy = 1'd0; |
| wire soclinux_soclinux_uart_rxtx_re; |
| wire [7:0] soclinux_soclinux_uart_rxtx_r; |
| wire soclinux_soclinux_uart_rxtx_we; |
| wire [7:0] soclinux_soclinux_uart_rxtx_w; |
| wire soclinux_soclinux_uart_txfull_status; |
| wire soclinux_soclinux_uart_txfull_we; |
| wire soclinux_soclinux_uart_rxempty_status; |
| wire soclinux_soclinux_uart_rxempty_we; |
| wire soclinux_soclinux_uart_irq; |
| wire soclinux_soclinux_uart_tx_status; |
| reg soclinux_soclinux_uart_tx_pending = 1'd0; |
| wire soclinux_soclinux_uart_tx_trigger; |
| reg soclinux_soclinux_uart_tx_clear = 1'd0; |
| reg soclinux_soclinux_uart_tx_old_trigger = 1'd0; |
| wire soclinux_soclinux_uart_rx_status; |
| reg soclinux_soclinux_uart_rx_pending = 1'd0; |
| wire soclinux_soclinux_uart_rx_trigger; |
| reg soclinux_soclinux_uart_rx_clear = 1'd0; |
| reg soclinux_soclinux_uart_rx_old_trigger = 1'd0; |
| wire soclinux_soclinux_uart_eventmanager_status_re; |
| wire [1:0] soclinux_soclinux_uart_eventmanager_status_r; |
| wire soclinux_soclinux_uart_eventmanager_status_we; |
| reg [1:0] soclinux_soclinux_uart_eventmanager_status_w = 2'd0; |
| wire soclinux_soclinux_uart_eventmanager_pending_re; |
| wire [1:0] soclinux_soclinux_uart_eventmanager_pending_r; |
| wire soclinux_soclinux_uart_eventmanager_pending_we; |
| reg [1:0] soclinux_soclinux_uart_eventmanager_pending_w = 2'd0; |
| reg [1:0] soclinux_soclinux_uart_eventmanager_storage = 2'd0; |
| reg soclinux_soclinux_uart_eventmanager_re = 1'd0; |
| wire soclinux_soclinux_uart_uart_sink_valid; |
| wire soclinux_soclinux_uart_uart_sink_ready; |
| wire soclinux_soclinux_uart_uart_sink_first; |
| wire soclinux_soclinux_uart_uart_sink_last; |
| wire [7:0] soclinux_soclinux_uart_uart_sink_payload_data; |
| wire soclinux_soclinux_uart_uart_source_valid; |
| wire soclinux_soclinux_uart_uart_source_ready; |
| wire soclinux_soclinux_uart_uart_source_first; |
| wire soclinux_soclinux_uart_uart_source_last; |
| wire [7:0] soclinux_soclinux_uart_uart_source_payload_data; |
| wire soclinux_soclinux_uart_tx_fifo_sink_valid; |
| wire soclinux_soclinux_uart_tx_fifo_sink_ready; |
| reg soclinux_soclinux_uart_tx_fifo_sink_first = 1'd0; |
| reg soclinux_soclinux_uart_tx_fifo_sink_last = 1'd0; |
| wire [7:0] soclinux_soclinux_uart_tx_fifo_sink_payload_data; |
| wire soclinux_soclinux_uart_tx_fifo_source_valid; |
| wire soclinux_soclinux_uart_tx_fifo_source_ready; |
| wire soclinux_soclinux_uart_tx_fifo_source_first; |
| wire soclinux_soclinux_uart_tx_fifo_source_last; |
| wire [7:0] soclinux_soclinux_uart_tx_fifo_source_payload_data; |
| wire soclinux_soclinux_uart_tx_fifo_re; |
| reg soclinux_soclinux_uart_tx_fifo_readable = 1'd0; |
| wire soclinux_soclinux_uart_tx_fifo_syncfifo_we; |
| wire soclinux_soclinux_uart_tx_fifo_syncfifo_writable; |
| wire soclinux_soclinux_uart_tx_fifo_syncfifo_re; |
| wire soclinux_soclinux_uart_tx_fifo_syncfifo_readable; |
| wire [9:0] soclinux_soclinux_uart_tx_fifo_syncfifo_din; |
| wire [9:0] soclinux_soclinux_uart_tx_fifo_syncfifo_dout; |
| reg [4:0] soclinux_soclinux_uart_tx_fifo_level0 = 5'd0; |
| reg soclinux_soclinux_uart_tx_fifo_replace = 1'd0; |
| reg [3:0] soclinux_soclinux_uart_tx_fifo_produce = 4'd0; |
| reg [3:0] soclinux_soclinux_uart_tx_fifo_consume = 4'd0; |
| reg [3:0] soclinux_soclinux_uart_tx_fifo_wrport_adr = 4'd0; |
| wire [9:0] soclinux_soclinux_uart_tx_fifo_wrport_dat_r; |
| wire soclinux_soclinux_uart_tx_fifo_wrport_we; |
| wire [9:0] soclinux_soclinux_uart_tx_fifo_wrport_dat_w; |
| wire soclinux_soclinux_uart_tx_fifo_do_read; |
| wire [3:0] soclinux_soclinux_uart_tx_fifo_rdport_adr; |
| wire [9:0] soclinux_soclinux_uart_tx_fifo_rdport_dat_r; |
| wire soclinux_soclinux_uart_tx_fifo_rdport_re; |
| wire [4:0] soclinux_soclinux_uart_tx_fifo_level1; |
| wire [7:0] soclinux_soclinux_uart_tx_fifo_fifo_in_payload_data; |
| wire soclinux_soclinux_uart_tx_fifo_fifo_in_first; |
| wire soclinux_soclinux_uart_tx_fifo_fifo_in_last; |
| wire [7:0] soclinux_soclinux_uart_tx_fifo_fifo_out_payload_data; |
| wire soclinux_soclinux_uart_tx_fifo_fifo_out_first; |
| wire soclinux_soclinux_uart_tx_fifo_fifo_out_last; |
| wire soclinux_soclinux_uart_rx_fifo_sink_valid; |
| wire soclinux_soclinux_uart_rx_fifo_sink_ready; |
| wire soclinux_soclinux_uart_rx_fifo_sink_first; |
| wire soclinux_soclinux_uart_rx_fifo_sink_last; |
| wire [7:0] soclinux_soclinux_uart_rx_fifo_sink_payload_data; |
| wire soclinux_soclinux_uart_rx_fifo_source_valid; |
| wire soclinux_soclinux_uart_rx_fifo_source_ready; |
| wire soclinux_soclinux_uart_rx_fifo_source_first; |
| wire soclinux_soclinux_uart_rx_fifo_source_last; |
| wire [7:0] soclinux_soclinux_uart_rx_fifo_source_payload_data; |
| wire soclinux_soclinux_uart_rx_fifo_re; |
| reg soclinux_soclinux_uart_rx_fifo_readable = 1'd0; |
| wire soclinux_soclinux_uart_rx_fifo_syncfifo_we; |
| wire soclinux_soclinux_uart_rx_fifo_syncfifo_writable; |
| wire soclinux_soclinux_uart_rx_fifo_syncfifo_re; |
| wire soclinux_soclinux_uart_rx_fifo_syncfifo_readable; |
| wire [9:0] soclinux_soclinux_uart_rx_fifo_syncfifo_din; |
| wire [9:0] soclinux_soclinux_uart_rx_fifo_syncfifo_dout; |
| reg [4:0] soclinux_soclinux_uart_rx_fifo_level0 = 5'd0; |
| reg soclinux_soclinux_uart_rx_fifo_replace = 1'd0; |
| reg [3:0] soclinux_soclinux_uart_rx_fifo_produce = 4'd0; |
| reg [3:0] soclinux_soclinux_uart_rx_fifo_consume = 4'd0; |
| reg [3:0] soclinux_soclinux_uart_rx_fifo_wrport_adr = 4'd0; |
| wire [9:0] soclinux_soclinux_uart_rx_fifo_wrport_dat_r; |
| wire soclinux_soclinux_uart_rx_fifo_wrport_we; |
| wire [9:0] soclinux_soclinux_uart_rx_fifo_wrport_dat_w; |
| wire soclinux_soclinux_uart_rx_fifo_do_read; |
| wire [3:0] soclinux_soclinux_uart_rx_fifo_rdport_adr; |
| wire [9:0] soclinux_soclinux_uart_rx_fifo_rdport_dat_r; |
| wire soclinux_soclinux_uart_rx_fifo_rdport_re; |
| wire [4:0] soclinux_soclinux_uart_rx_fifo_level1; |
| wire [7:0] soclinux_soclinux_uart_rx_fifo_fifo_in_payload_data; |
| wire soclinux_soclinux_uart_rx_fifo_fifo_in_first; |
| wire soclinux_soclinux_uart_rx_fifo_fifo_in_last; |
| wire [7:0] soclinux_soclinux_uart_rx_fifo_fifo_out_payload_data; |
| wire soclinux_soclinux_uart_rx_fifo_fifo_out_first; |
| wire soclinux_soclinux_uart_rx_fifo_fifo_out_last; |
| reg soclinux_soclinux_uart_reset = 1'd0; |
| reg [31:0] soclinux_soclinux_timer_load_storage = 32'd0; |
| reg soclinux_soclinux_timer_load_re = 1'd0; |
| reg [31:0] soclinux_soclinux_timer_reload_storage = 32'd0; |
| reg soclinux_soclinux_timer_reload_re = 1'd0; |
| reg soclinux_soclinux_timer_en_storage = 1'd0; |
| reg soclinux_soclinux_timer_en_re = 1'd0; |
| reg soclinux_soclinux_timer_update_value_storage = 1'd0; |
| reg soclinux_soclinux_timer_update_value_re = 1'd0; |
| reg [31:0] soclinux_soclinux_timer_value_status = 32'd0; |
| wire soclinux_soclinux_timer_value_we; |
| wire soclinux_soclinux_timer_irq; |
| wire soclinux_soclinux_timer_zero_status; |
| reg soclinux_soclinux_timer_zero_pending = 1'd0; |
| wire soclinux_soclinux_timer_zero_trigger; |
| reg soclinux_soclinux_timer_zero_clear = 1'd0; |
| reg soclinux_soclinux_timer_zero_old_trigger = 1'd0; |
| wire soclinux_soclinux_timer_eventmanager_status_re; |
| wire soclinux_soclinux_timer_eventmanager_status_r; |
| wire soclinux_soclinux_timer_eventmanager_status_we; |
| wire soclinux_soclinux_timer_eventmanager_status_w; |
| wire soclinux_soclinux_timer_eventmanager_pending_re; |
| wire soclinux_soclinux_timer_eventmanager_pending_r; |
| wire soclinux_soclinux_timer_eventmanager_pending_we; |
| wire soclinux_soclinux_timer_eventmanager_pending_w; |
| reg soclinux_soclinux_timer_eventmanager_storage = 1'd0; |
| reg soclinux_soclinux_timer_eventmanager_re = 1'd0; |
| reg [31:0] soclinux_soclinux_timer_value = 32'd0; |
| reg [13:0] soclinux_soclinux_interface_adr = 14'd0; |
| reg soclinux_soclinux_interface_we = 1'd0; |
| wire [7:0] soclinux_soclinux_interface_dat_w; |
| wire [7:0] soclinux_soclinux_interface_dat_r; |
| wire [29:0] soclinux_soclinux_bus_wishbone_adr; |
| wire [31:0] soclinux_soclinux_bus_wishbone_dat_w; |
| wire [31:0] soclinux_soclinux_bus_wishbone_dat_r; |
| wire [3:0] soclinux_soclinux_bus_wishbone_sel; |
| wire soclinux_soclinux_bus_wishbone_cyc; |
| wire soclinux_soclinux_bus_wishbone_stb; |
| reg soclinux_soclinux_bus_wishbone_ack = 1'd0; |
| wire soclinux_soclinux_bus_wishbone_we; |
| wire [2:0] soclinux_soclinux_bus_wishbone_cti; |
| wire [1:0] soclinux_soclinux_bus_wishbone_bte; |
| reg soclinux_soclinux_bus_wishbone_err = 1'd0; |
| wire sys_clk; |
| reg sys_rst = 1'd1; |
| wire sys4x_clk; |
| wire pll4x_clk; |
| wire clk500_clk; |
| wire clk500_rst; |
| wire ic_clk; |
| wire ic_rst; |
| reg soclinux_reset = 1'd0; |
| wire soclinux_locked; |
| wire soclinux_clkin; |
| wire soclinux_clkout0; |
| wire soclinux_clkout1; |
| wire soclinux_clkout_buf; |
| reg [5:0] soclinux_ic_reset_counter = 6'd63; |
| reg soclinux_ic_reset = 1'd1; |
| wire soclinux_ic_rdy; |
| reg [5:0] soclinux_ic_rdy_counter = 6'd63; |
| reg soclinux_usddrphy_en_vtc_storage = 1'd1; |
| reg soclinux_usddrphy_en_vtc_re = 1'd0; |
| reg [8:0] soclinux_usddrphy_status = 9'd0; |
| wire soclinux_usddrphy_we; |
| reg soclinux_usddrphy_wlevel_en_storage = 1'd0; |
| reg soclinux_usddrphy_wlevel_en_re = 1'd0; |
| wire soclinux_usddrphy_wlevel_strobe_re; |
| wire soclinux_usddrphy_wlevel_strobe_r; |
| wire soclinux_usddrphy_wlevel_strobe_we; |
| reg soclinux_usddrphy_wlevel_strobe_w = 1'd0; |
| wire soclinux_usddrphy_cdly_rst_re; |
| wire soclinux_usddrphy_cdly_rst_r; |
| wire soclinux_usddrphy_cdly_rst_we; |
| reg soclinux_usddrphy_cdly_rst_w = 1'd0; |
| wire soclinux_usddrphy_cdly_inc_re; |
| wire soclinux_usddrphy_cdly_inc_r; |
| wire soclinux_usddrphy_cdly_inc_we; |
| reg soclinux_usddrphy_cdly_inc_w = 1'd0; |
| reg [3:0] soclinux_usddrphy_dly_sel_storage = 4'd0; |
| reg soclinux_usddrphy_dly_sel_re = 1'd0; |
| wire soclinux_usddrphy_rdly_dq_rst_re; |
| wire soclinux_usddrphy_rdly_dq_rst_r; |
| wire soclinux_usddrphy_rdly_dq_rst_we; |
| reg soclinux_usddrphy_rdly_dq_rst_w = 1'd0; |
| wire soclinux_usddrphy_rdly_dq_inc_re; |
| wire soclinux_usddrphy_rdly_dq_inc_r; |
| wire soclinux_usddrphy_rdly_dq_inc_we; |
| reg soclinux_usddrphy_rdly_dq_inc_w = 1'd0; |
| wire soclinux_usddrphy_rdly_dq_bitslip_rst_re; |
| wire soclinux_usddrphy_rdly_dq_bitslip_rst_r; |
| wire soclinux_usddrphy_rdly_dq_bitslip_rst_we; |
| reg soclinux_usddrphy_rdly_dq_bitslip_rst_w = 1'd0; |
| wire soclinux_usddrphy_rdly_dq_bitslip_re; |
| wire soclinux_usddrphy_rdly_dq_bitslip_r; |
| wire soclinux_usddrphy_rdly_dq_bitslip_we; |
| reg soclinux_usddrphy_rdly_dq_bitslip_w = 1'd0; |
| wire soclinux_usddrphy_wdly_dq_rst_re; |
| wire soclinux_usddrphy_wdly_dq_rst_r; |
| wire soclinux_usddrphy_wdly_dq_rst_we; |
| reg soclinux_usddrphy_wdly_dq_rst_w = 1'd0; |
| wire soclinux_usddrphy_wdly_dq_inc_re; |
| wire soclinux_usddrphy_wdly_dq_inc_r; |
| wire soclinux_usddrphy_wdly_dq_inc_we; |
| reg soclinux_usddrphy_wdly_dq_inc_w = 1'd0; |
| wire soclinux_usddrphy_wdly_dqs_rst_re; |
| wire soclinux_usddrphy_wdly_dqs_rst_r; |
| wire soclinux_usddrphy_wdly_dqs_rst_we; |
| reg soclinux_usddrphy_wdly_dqs_rst_w = 1'd0; |
| wire soclinux_usddrphy_wdly_dqs_inc_re; |
| wire soclinux_usddrphy_wdly_dqs_inc_r; |
| wire soclinux_usddrphy_wdly_dqs_inc_we; |
| reg soclinux_usddrphy_wdly_dqs_inc_w = 1'd0; |
| wire [16:0] soclinux_usddrphy_interface0_dfi_p0_address; |
| wire [3:0] soclinux_usddrphy_interface0_dfi_p0_bank; |
| wire soclinux_usddrphy_interface0_dfi_p0_cas_n; |
| wire soclinux_usddrphy_interface0_dfi_p0_cs_n; |
| wire soclinux_usddrphy_interface0_dfi_p0_ras_n; |
| wire soclinux_usddrphy_interface0_dfi_p0_we_n; |
| wire soclinux_usddrphy_interface0_dfi_p0_cke; |
| wire soclinux_usddrphy_interface0_dfi_p0_odt; |
| wire soclinux_usddrphy_interface0_dfi_p0_reset_n; |
| wire soclinux_usddrphy_interface0_dfi_p0_act_n; |
| wire [63:0] soclinux_usddrphy_interface0_dfi_p0_wrdata; |
| wire soclinux_usddrphy_interface0_dfi_p0_wrdata_en; |
| wire [7:0] soclinux_usddrphy_interface0_dfi_p0_wrdata_mask; |
| wire soclinux_usddrphy_interface0_dfi_p0_rddata_en; |
| wire [63:0] soclinux_usddrphy_interface0_dfi_p0_rddata; |
| wire soclinux_usddrphy_interface0_dfi_p0_rddata_valid; |
| wire [16:0] soclinux_usddrphy_interface0_dfi_p1_address; |
| wire [3:0] soclinux_usddrphy_interface0_dfi_p1_bank; |
| wire soclinux_usddrphy_interface0_dfi_p1_cas_n; |
| wire soclinux_usddrphy_interface0_dfi_p1_cs_n; |
| wire soclinux_usddrphy_interface0_dfi_p1_ras_n; |
| wire soclinux_usddrphy_interface0_dfi_p1_we_n; |
| wire soclinux_usddrphy_interface0_dfi_p1_cke; |
| wire soclinux_usddrphy_interface0_dfi_p1_odt; |
| wire soclinux_usddrphy_interface0_dfi_p1_reset_n; |
| wire soclinux_usddrphy_interface0_dfi_p1_act_n; |
| wire [63:0] soclinux_usddrphy_interface0_dfi_p1_wrdata; |
| wire soclinux_usddrphy_interface0_dfi_p1_wrdata_en; |
| wire [7:0] soclinux_usddrphy_interface0_dfi_p1_wrdata_mask; |
| wire soclinux_usddrphy_interface0_dfi_p1_rddata_en; |
| wire [63:0] soclinux_usddrphy_interface0_dfi_p1_rddata; |
| wire soclinux_usddrphy_interface0_dfi_p1_rddata_valid; |
| wire [16:0] soclinux_usddrphy_interface0_dfi_p2_address; |
| wire [3:0] soclinux_usddrphy_interface0_dfi_p2_bank; |
| wire soclinux_usddrphy_interface0_dfi_p2_cas_n; |
| wire soclinux_usddrphy_interface0_dfi_p2_cs_n; |
| wire soclinux_usddrphy_interface0_dfi_p2_ras_n; |
| wire soclinux_usddrphy_interface0_dfi_p2_we_n; |
| wire soclinux_usddrphy_interface0_dfi_p2_cke; |
| wire soclinux_usddrphy_interface0_dfi_p2_odt; |
| wire soclinux_usddrphy_interface0_dfi_p2_reset_n; |
| wire soclinux_usddrphy_interface0_dfi_p2_act_n; |
| wire [63:0] soclinux_usddrphy_interface0_dfi_p2_wrdata; |
| wire soclinux_usddrphy_interface0_dfi_p2_wrdata_en; |
| wire [7:0] soclinux_usddrphy_interface0_dfi_p2_wrdata_mask; |
| wire soclinux_usddrphy_interface0_dfi_p2_rddata_en; |
| wire [63:0] soclinux_usddrphy_interface0_dfi_p2_rddata; |
| wire soclinux_usddrphy_interface0_dfi_p2_rddata_valid; |
| wire [16:0] soclinux_usddrphy_interface0_dfi_p3_address; |
| wire [3:0] soclinux_usddrphy_interface0_dfi_p3_bank; |
| wire soclinux_usddrphy_interface0_dfi_p3_cas_n; |
| wire soclinux_usddrphy_interface0_dfi_p3_cs_n; |
| wire soclinux_usddrphy_interface0_dfi_p3_ras_n; |
| wire soclinux_usddrphy_interface0_dfi_p3_we_n; |
| wire soclinux_usddrphy_interface0_dfi_p3_cke; |
| wire soclinux_usddrphy_interface0_dfi_p3_odt; |
| wire soclinux_usddrphy_interface0_dfi_p3_reset_n; |
| wire soclinux_usddrphy_interface0_dfi_p3_act_n; |
| wire [63:0] soclinux_usddrphy_interface0_dfi_p3_wrdata; |
| wire soclinux_usddrphy_interface0_dfi_p3_wrdata_en; |
| wire [7:0] soclinux_usddrphy_interface0_dfi_p3_wrdata_mask; |
| wire soclinux_usddrphy_interface0_dfi_p3_rddata_en; |
| wire [63:0] soclinux_usddrphy_interface0_dfi_p3_rddata; |
| wire soclinux_usddrphy_interface0_dfi_p3_rddata_valid; |
| wire [16:0] soclinux_usddrphy_interface1_dfi_p0_address; |
| wire [3:0] soclinux_usddrphy_interface1_dfi_p0_bank; |
| reg soclinux_usddrphy_interface1_dfi_p0_cas_n = 1'd1; |
| wire soclinux_usddrphy_interface1_dfi_p0_cs_n; |
| reg soclinux_usddrphy_interface1_dfi_p0_ras_n = 1'd1; |
| reg soclinux_usddrphy_interface1_dfi_p0_we_n = 1'd1; |
| wire soclinux_usddrphy_interface1_dfi_p0_cke; |
| wire soclinux_usddrphy_interface1_dfi_p0_odt; |
| wire soclinux_usddrphy_interface1_dfi_p0_reset_n; |
| reg soclinux_usddrphy_interface1_dfi_p0_act_n = 1'd1; |
| wire [63:0] soclinux_usddrphy_interface1_dfi_p0_wrdata; |
| wire soclinux_usddrphy_interface1_dfi_p0_wrdata_en; |
| wire [7:0] soclinux_usddrphy_interface1_dfi_p0_wrdata_mask; |
| wire soclinux_usddrphy_interface1_dfi_p0_rddata_en; |
| reg [63:0] soclinux_usddrphy_interface1_dfi_p0_rddata = 64'd0; |
| wire soclinux_usddrphy_interface1_dfi_p0_rddata_valid; |
| wire [16:0] soclinux_usddrphy_interface1_dfi_p1_address; |
| wire [3:0] soclinux_usddrphy_interface1_dfi_p1_bank; |
| reg soclinux_usddrphy_interface1_dfi_p1_cas_n = 1'd1; |
| wire soclinux_usddrphy_interface1_dfi_p1_cs_n; |
| reg soclinux_usddrphy_interface1_dfi_p1_ras_n = 1'd1; |
| reg soclinux_usddrphy_interface1_dfi_p1_we_n = 1'd1; |
| wire soclinux_usddrphy_interface1_dfi_p1_cke; |
| wire soclinux_usddrphy_interface1_dfi_p1_odt; |
| wire soclinux_usddrphy_interface1_dfi_p1_reset_n; |
| reg soclinux_usddrphy_interface1_dfi_p1_act_n = 1'd1; |
| wire [63:0] soclinux_usddrphy_interface1_dfi_p1_wrdata; |
| wire soclinux_usddrphy_interface1_dfi_p1_wrdata_en; |
| wire [7:0] soclinux_usddrphy_interface1_dfi_p1_wrdata_mask; |
| wire soclinux_usddrphy_interface1_dfi_p1_rddata_en; |
| reg [63:0] soclinux_usddrphy_interface1_dfi_p1_rddata = 64'd0; |
| wire soclinux_usddrphy_interface1_dfi_p1_rddata_valid; |
| wire [16:0] soclinux_usddrphy_interface1_dfi_p2_address; |
| wire [3:0] soclinux_usddrphy_interface1_dfi_p2_bank; |
| reg soclinux_usddrphy_interface1_dfi_p2_cas_n = 1'd1; |
| wire soclinux_usddrphy_interface1_dfi_p2_cs_n; |
| reg soclinux_usddrphy_interface1_dfi_p2_ras_n = 1'd1; |
| reg soclinux_usddrphy_interface1_dfi_p2_we_n = 1'd1; |
| wire soclinux_usddrphy_interface1_dfi_p2_cke; |
| wire soclinux_usddrphy_interface1_dfi_p2_odt; |
| wire soclinux_usddrphy_interface1_dfi_p2_reset_n; |
| reg soclinux_usddrphy_interface1_dfi_p2_act_n = 1'd1; |
| wire [63:0] soclinux_usddrphy_interface1_dfi_p2_wrdata; |
| wire soclinux_usddrphy_interface1_dfi_p2_wrdata_en; |
| wire [7:0] soclinux_usddrphy_interface1_dfi_p2_wrdata_mask; |
| wire soclinux_usddrphy_interface1_dfi_p2_rddata_en; |
| reg [63:0] soclinux_usddrphy_interface1_dfi_p2_rddata = 64'd0; |
| wire soclinux_usddrphy_interface1_dfi_p2_rddata_valid; |
| wire [16:0] soclinux_usddrphy_interface1_dfi_p3_address; |
| wire [3:0] soclinux_usddrphy_interface1_dfi_p3_bank; |
| reg soclinux_usddrphy_interface1_dfi_p3_cas_n = 1'd1; |
| wire soclinux_usddrphy_interface1_dfi_p3_cs_n; |
| reg soclinux_usddrphy_interface1_dfi_p3_ras_n = 1'd1; |
| reg soclinux_usddrphy_interface1_dfi_p3_we_n = 1'd1; |
| wire soclinux_usddrphy_interface1_dfi_p3_cke; |
| wire soclinux_usddrphy_interface1_dfi_p3_odt; |
| wire soclinux_usddrphy_interface1_dfi_p3_reset_n; |
| reg soclinux_usddrphy_interface1_dfi_p3_act_n = 1'd1; |
| wire [63:0] soclinux_usddrphy_interface1_dfi_p3_wrdata; |
| wire soclinux_usddrphy_interface1_dfi_p3_wrdata_en; |
| wire [7:0] soclinux_usddrphy_interface1_dfi_p3_wrdata_mask; |
| wire soclinux_usddrphy_interface1_dfi_p3_rddata_en; |
| reg [63:0] soclinux_usddrphy_interface1_dfi_p3_rddata = 64'd0; |
| wire soclinux_usddrphy_interface1_dfi_p3_rddata_valid; |
| wire soclinux_usddrphy_clk_o_nodelay; |
| wire soclinux_usddrphy_clk_o_delayed; |
| wire soclinux_usddrphy_a_o_nodelay0; |
| wire soclinux_usddrphy_a_o_nodelay1; |
| wire soclinux_usddrphy_a_o_nodelay2; |
| wire soclinux_usddrphy_a_o_nodelay3; |
| wire soclinux_usddrphy_a_o_nodelay4; |
| wire soclinux_usddrphy_a_o_nodelay5; |
| wire soclinux_usddrphy_a_o_nodelay6; |
| wire soclinux_usddrphy_a_o_nodelay7; |
| wire soclinux_usddrphy_a_o_nodelay8; |
| wire soclinux_usddrphy_a_o_nodelay9; |
| wire soclinux_usddrphy_a_o_nodelay10; |
| wire soclinux_usddrphy_a_o_nodelay11; |
| wire soclinux_usddrphy_a_o_nodelay12; |
| wire soclinux_usddrphy_a_o_nodelay13; |
| wire [3:0] soclinux_usddrphy_pads_ba; |
| wire soclinux_usddrphy_ba_o_nodelay0; |
| wire soclinux_usddrphy_ba_o_nodelay1; |
| wire soclinux_usddrphy_ba_o_nodelay2; |
| wire soclinux_usddrphy_ba_o_nodelay3; |
| wire soclinux_usddrphy_x_o_nodelay0; |
| wire soclinux_usddrphy_x_o_nodelay1; |
| wire soclinux_usddrphy_x_o_nodelay2; |
| wire soclinux_usddrphy_x_o_nodelay3; |
| wire soclinux_usddrphy_x_o_nodelay4; |
| wire soclinux_usddrphy_x_o_nodelay5; |
| wire soclinux_usddrphy_x_o_nodelay6; |
| wire soclinux_usddrphy_x_o_nodelay7; |
| reg soclinux_usddrphy_oe_dqs = 1'd0; |
| reg [7:0] soclinux_usddrphy_dqs_serdes_pattern = 8'd0; |
| wire soclinux_usddrphy_dm_o_nodelay0; |
| wire soclinux_usddrphy_dqs_nodelay0; |
| wire soclinux_usddrphy_dqs_delayed0; |
| wire soclinux_usddrphy_dqs_t0; |
| wire [8:0] soclinux_usddrphy_dqs_taps; |
| wire soclinux_usddrphy_wait; |
| wire soclinux_usddrphy_done; |
| reg [16:0] soclinux_usddrphy_count = 17'd65536; |
| reg soclinux_usddrphy_dqs_taps_done = 1'd0; |
| wire soclinux_usddrphy_dm_o_nodelay1; |
| wire soclinux_usddrphy_dqs_nodelay1; |
| wire soclinux_usddrphy_dqs_delayed1; |
| wire soclinux_usddrphy_dqs_t1; |
| wire [8:0] soclinux_usddrphy0; |
| wire soclinux_usddrphy_dm_o_nodelay2; |
| wire soclinux_usddrphy_dqs_nodelay2; |
| wire soclinux_usddrphy_dqs_delayed2; |
| wire soclinux_usddrphy_dqs_t2; |
| wire [8:0] soclinux_usddrphy1; |
| wire soclinux_usddrphy_dm_o_nodelay3; |
| wire soclinux_usddrphy_dqs_nodelay3; |
| wire soclinux_usddrphy_dqs_delayed3; |
| wire soclinux_usddrphy_dqs_t3; |
| wire [8:0] soclinux_usddrphy2; |
| reg soclinux_usddrphy_oe_dq = 1'd0; |
| wire soclinux_usddrphy_dq_o_nodelay0; |
| wire soclinux_usddrphy_dq_o_delayed0; |
| wire soclinux_usddrphy_dq_i_nodelay0; |
| wire soclinux_usddrphy_dq_i_delayed0; |
| wire soclinux_usddrphy_dq_t0; |
| wire [7:0] soclinux_usddrphy_bitslip0_i; |
| reg [7:0] soclinux_usddrphy_bitslip0_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip0_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip0_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay1; |
| wire soclinux_usddrphy_dq_o_delayed1; |
| wire soclinux_usddrphy_dq_i_nodelay1; |
| wire soclinux_usddrphy_dq_i_delayed1; |
| wire soclinux_usddrphy_dq_t1; |
| wire [7:0] soclinux_usddrphy_bitslip1_i; |
| reg [7:0] soclinux_usddrphy_bitslip1_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip1_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip1_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay2; |
| wire soclinux_usddrphy_dq_o_delayed2; |
| wire soclinux_usddrphy_dq_i_nodelay2; |
| wire soclinux_usddrphy_dq_i_delayed2; |
| wire soclinux_usddrphy_dq_t2; |
| wire [7:0] soclinux_usddrphy_bitslip2_i; |
| reg [7:0] soclinux_usddrphy_bitslip2_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip2_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip2_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay3; |
| wire soclinux_usddrphy_dq_o_delayed3; |
| wire soclinux_usddrphy_dq_i_nodelay3; |
| wire soclinux_usddrphy_dq_i_delayed3; |
| wire soclinux_usddrphy_dq_t3; |
| wire [7:0] soclinux_usddrphy_bitslip3_i; |
| reg [7:0] soclinux_usddrphy_bitslip3_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip3_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip3_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay4; |
| wire soclinux_usddrphy_dq_o_delayed4; |
| wire soclinux_usddrphy_dq_i_nodelay4; |
| wire soclinux_usddrphy_dq_i_delayed4; |
| wire soclinux_usddrphy_dq_t4; |
| wire [7:0] soclinux_usddrphy_bitslip4_i; |
| reg [7:0] soclinux_usddrphy_bitslip4_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip4_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip4_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay5; |
| wire soclinux_usddrphy_dq_o_delayed5; |
| wire soclinux_usddrphy_dq_i_nodelay5; |
| wire soclinux_usddrphy_dq_i_delayed5; |
| wire soclinux_usddrphy_dq_t5; |
| wire [7:0] soclinux_usddrphy_bitslip5_i; |
| reg [7:0] soclinux_usddrphy_bitslip5_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip5_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip5_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay6; |
| wire soclinux_usddrphy_dq_o_delayed6; |
| wire soclinux_usddrphy_dq_i_nodelay6; |
| wire soclinux_usddrphy_dq_i_delayed6; |
| wire soclinux_usddrphy_dq_t6; |
| wire [7:0] soclinux_usddrphy_bitslip6_i; |
| reg [7:0] soclinux_usddrphy_bitslip6_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip6_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip6_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay7; |
| wire soclinux_usddrphy_dq_o_delayed7; |
| wire soclinux_usddrphy_dq_i_nodelay7; |
| wire soclinux_usddrphy_dq_i_delayed7; |
| wire soclinux_usddrphy_dq_t7; |
| wire [7:0] soclinux_usddrphy_bitslip7_i; |
| reg [7:0] soclinux_usddrphy_bitslip7_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip7_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip7_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay8; |
| wire soclinux_usddrphy_dq_o_delayed8; |
| wire soclinux_usddrphy_dq_i_nodelay8; |
| wire soclinux_usddrphy_dq_i_delayed8; |
| wire soclinux_usddrphy_dq_t8; |
| wire [7:0] soclinux_usddrphy_bitslip8_i; |
| reg [7:0] soclinux_usddrphy_bitslip8_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip8_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip8_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay9; |
| wire soclinux_usddrphy_dq_o_delayed9; |
| wire soclinux_usddrphy_dq_i_nodelay9; |
| wire soclinux_usddrphy_dq_i_delayed9; |
| wire soclinux_usddrphy_dq_t9; |
| wire [7:0] soclinux_usddrphy_bitslip9_i; |
| reg [7:0] soclinux_usddrphy_bitslip9_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip9_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip9_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay10; |
| wire soclinux_usddrphy_dq_o_delayed10; |
| wire soclinux_usddrphy_dq_i_nodelay10; |
| wire soclinux_usddrphy_dq_i_delayed10; |
| wire soclinux_usddrphy_dq_t10; |
| wire [7:0] soclinux_usddrphy_bitslip10_i; |
| reg [7:0] soclinux_usddrphy_bitslip10_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip10_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip10_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay11; |
| wire soclinux_usddrphy_dq_o_delayed11; |
| wire soclinux_usddrphy_dq_i_nodelay11; |
| wire soclinux_usddrphy_dq_i_delayed11; |
| wire soclinux_usddrphy_dq_t11; |
| wire [7:0] soclinux_usddrphy_bitslip11_i; |
| reg [7:0] soclinux_usddrphy_bitslip11_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip11_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip11_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay12; |
| wire soclinux_usddrphy_dq_o_delayed12; |
| wire soclinux_usddrphy_dq_i_nodelay12; |
| wire soclinux_usddrphy_dq_i_delayed12; |
| wire soclinux_usddrphy_dq_t12; |
| wire [7:0] soclinux_usddrphy_bitslip12_i; |
| reg [7:0] soclinux_usddrphy_bitslip12_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip12_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip12_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay13; |
| wire soclinux_usddrphy_dq_o_delayed13; |
| wire soclinux_usddrphy_dq_i_nodelay13; |
| wire soclinux_usddrphy_dq_i_delayed13; |
| wire soclinux_usddrphy_dq_t13; |
| wire [7:0] soclinux_usddrphy_bitslip13_i; |
| reg [7:0] soclinux_usddrphy_bitslip13_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip13_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip13_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay14; |
| wire soclinux_usddrphy_dq_o_delayed14; |
| wire soclinux_usddrphy_dq_i_nodelay14; |
| wire soclinux_usddrphy_dq_i_delayed14; |
| wire soclinux_usddrphy_dq_t14; |
| wire [7:0] soclinux_usddrphy_bitslip14_i; |
| reg [7:0] soclinux_usddrphy_bitslip14_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip14_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip14_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay15; |
| wire soclinux_usddrphy_dq_o_delayed15; |
| wire soclinux_usddrphy_dq_i_nodelay15; |
| wire soclinux_usddrphy_dq_i_delayed15; |
| wire soclinux_usddrphy_dq_t15; |
| wire [7:0] soclinux_usddrphy_bitslip15_i; |
| reg [7:0] soclinux_usddrphy_bitslip15_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip15_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip15_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay16; |
| wire soclinux_usddrphy_dq_o_delayed16; |
| wire soclinux_usddrphy_dq_i_nodelay16; |
| wire soclinux_usddrphy_dq_i_delayed16; |
| wire soclinux_usddrphy_dq_t16; |
| wire [7:0] soclinux_usddrphy_bitslip16_i; |
| reg [7:0] soclinux_usddrphy_bitslip16_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip16_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip16_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay17; |
| wire soclinux_usddrphy_dq_o_delayed17; |
| wire soclinux_usddrphy_dq_i_nodelay17; |
| wire soclinux_usddrphy_dq_i_delayed17; |
| wire soclinux_usddrphy_dq_t17; |
| wire [7:0] soclinux_usddrphy_bitslip17_i; |
| reg [7:0] soclinux_usddrphy_bitslip17_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip17_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip17_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay18; |
| wire soclinux_usddrphy_dq_o_delayed18; |
| wire soclinux_usddrphy_dq_i_nodelay18; |
| wire soclinux_usddrphy_dq_i_delayed18; |
| wire soclinux_usddrphy_dq_t18; |
| wire [7:0] soclinux_usddrphy_bitslip18_i; |
| reg [7:0] soclinux_usddrphy_bitslip18_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip18_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip18_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay19; |
| wire soclinux_usddrphy_dq_o_delayed19; |
| wire soclinux_usddrphy_dq_i_nodelay19; |
| wire soclinux_usddrphy_dq_i_delayed19; |
| wire soclinux_usddrphy_dq_t19; |
| wire [7:0] soclinux_usddrphy_bitslip19_i; |
| reg [7:0] soclinux_usddrphy_bitslip19_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip19_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip19_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay20; |
| wire soclinux_usddrphy_dq_o_delayed20; |
| wire soclinux_usddrphy_dq_i_nodelay20; |
| wire soclinux_usddrphy_dq_i_delayed20; |
| wire soclinux_usddrphy_dq_t20; |
| wire [7:0] soclinux_usddrphy_bitslip20_i; |
| reg [7:0] soclinux_usddrphy_bitslip20_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip20_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip20_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay21; |
| wire soclinux_usddrphy_dq_o_delayed21; |
| wire soclinux_usddrphy_dq_i_nodelay21; |
| wire soclinux_usddrphy_dq_i_delayed21; |
| wire soclinux_usddrphy_dq_t21; |
| wire [7:0] soclinux_usddrphy_bitslip21_i; |
| reg [7:0] soclinux_usddrphy_bitslip21_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip21_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip21_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay22; |
| wire soclinux_usddrphy_dq_o_delayed22; |
| wire soclinux_usddrphy_dq_i_nodelay22; |
| wire soclinux_usddrphy_dq_i_delayed22; |
| wire soclinux_usddrphy_dq_t22; |
| wire [7:0] soclinux_usddrphy_bitslip22_i; |
| reg [7:0] soclinux_usddrphy_bitslip22_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip22_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip22_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay23; |
| wire soclinux_usddrphy_dq_o_delayed23; |
| wire soclinux_usddrphy_dq_i_nodelay23; |
| wire soclinux_usddrphy_dq_i_delayed23; |
| wire soclinux_usddrphy_dq_t23; |
| wire [7:0] soclinux_usddrphy_bitslip23_i; |
| reg [7:0] soclinux_usddrphy_bitslip23_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip23_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip23_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay24; |
| wire soclinux_usddrphy_dq_o_delayed24; |
| wire soclinux_usddrphy_dq_i_nodelay24; |
| wire soclinux_usddrphy_dq_i_delayed24; |
| wire soclinux_usddrphy_dq_t24; |
| wire [7:0] soclinux_usddrphy_bitslip24_i; |
| reg [7:0] soclinux_usddrphy_bitslip24_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip24_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip24_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay25; |
| wire soclinux_usddrphy_dq_o_delayed25; |
| wire soclinux_usddrphy_dq_i_nodelay25; |
| wire soclinux_usddrphy_dq_i_delayed25; |
| wire soclinux_usddrphy_dq_t25; |
| wire [7:0] soclinux_usddrphy_bitslip25_i; |
| reg [7:0] soclinux_usddrphy_bitslip25_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip25_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip25_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay26; |
| wire soclinux_usddrphy_dq_o_delayed26; |
| wire soclinux_usddrphy_dq_i_nodelay26; |
| wire soclinux_usddrphy_dq_i_delayed26; |
| wire soclinux_usddrphy_dq_t26; |
| wire [7:0] soclinux_usddrphy_bitslip26_i; |
| reg [7:0] soclinux_usddrphy_bitslip26_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip26_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip26_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay27; |
| wire soclinux_usddrphy_dq_o_delayed27; |
| wire soclinux_usddrphy_dq_i_nodelay27; |
| wire soclinux_usddrphy_dq_i_delayed27; |
| wire soclinux_usddrphy_dq_t27; |
| wire [7:0] soclinux_usddrphy_bitslip27_i; |
| reg [7:0] soclinux_usddrphy_bitslip27_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip27_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip27_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay28; |
| wire soclinux_usddrphy_dq_o_delayed28; |
| wire soclinux_usddrphy_dq_i_nodelay28; |
| wire soclinux_usddrphy_dq_i_delayed28; |
| wire soclinux_usddrphy_dq_t28; |
| wire [7:0] soclinux_usddrphy_bitslip28_i; |
| reg [7:0] soclinux_usddrphy_bitslip28_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip28_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip28_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay29; |
| wire soclinux_usddrphy_dq_o_delayed29; |
| wire soclinux_usddrphy_dq_i_nodelay29; |
| wire soclinux_usddrphy_dq_i_delayed29; |
| wire soclinux_usddrphy_dq_t29; |
| wire [7:0] soclinux_usddrphy_bitslip29_i; |
| reg [7:0] soclinux_usddrphy_bitslip29_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip29_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip29_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay30; |
| wire soclinux_usddrphy_dq_o_delayed30; |
| wire soclinux_usddrphy_dq_i_nodelay30; |
| wire soclinux_usddrphy_dq_i_delayed30; |
| wire soclinux_usddrphy_dq_t30; |
| wire [7:0] soclinux_usddrphy_bitslip30_i; |
| reg [7:0] soclinux_usddrphy_bitslip30_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip30_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip30_r = 16'd0; |
| wire soclinux_usddrphy_dq_o_nodelay31; |
| wire soclinux_usddrphy_dq_o_delayed31; |
| wire soclinux_usddrphy_dq_i_nodelay31; |
| wire soclinux_usddrphy_dq_i_delayed31; |
| wire soclinux_usddrphy_dq_t31; |
| wire [7:0] soclinux_usddrphy_bitslip31_i; |
| reg [7:0] soclinux_usddrphy_bitslip31_o = 8'd0; |
| reg [2:0] soclinux_usddrphy_bitslip31_value = 3'd0; |
| reg [15:0] soclinux_usddrphy_bitslip31_r = 16'd0; |
| reg soclinux_usddrphy_n_rddata_en0 = 1'd0; |
| reg soclinux_usddrphy_n_rddata_en1 = 1'd0; |
| reg soclinux_usddrphy_n_rddata_en2 = 1'd0; |
| reg soclinux_usddrphy_n_rddata_en3 = 1'd0; |
| reg soclinux_usddrphy_n_rddata_en4 = 1'd0; |
| reg soclinux_usddrphy_n_rddata_en5 = 1'd0; |
| reg soclinux_usddrphy_n_rddata_en6 = 1'd0; |
| reg soclinux_usddrphy_phase_rddata_valid0 = 1'd0; |
| reg soclinux_usddrphy_phase_rddata_valid1 = 1'd0; |
| reg soclinux_usddrphy_phase_rddata_valid2 = 1'd0; |
| reg soclinux_usddrphy_phase_rddata_valid3 = 1'd0; |
| wire soclinux_usddrphy_oe; |
| reg [4:0] soclinux_usddrphy_last_wrdata_en = 5'd0; |
| wire [14:0] soclinux_sdram_inti_p0_address; |
| wire [3:0] soclinux_sdram_inti_p0_bank; |
| reg soclinux_sdram_inti_p0_cas_n = 1'd1; |
| reg soclinux_sdram_inti_p0_cs_n = 1'd1; |
| reg soclinux_sdram_inti_p0_ras_n = 1'd1; |
| reg soclinux_sdram_inti_p0_we_n = 1'd1; |
| wire soclinux_sdram_inti_p0_cke; |
| wire soclinux_sdram_inti_p0_odt; |
| wire soclinux_sdram_inti_p0_reset_n; |
| reg soclinux_sdram_inti_p0_act_n = 1'd1; |
| wire [63:0] soclinux_sdram_inti_p0_wrdata; |
| wire soclinux_sdram_inti_p0_wrdata_en; |
| wire [7:0] soclinux_sdram_inti_p0_wrdata_mask; |
| wire soclinux_sdram_inti_p0_rddata_en; |
| reg [63:0] soclinux_sdram_inti_p0_rddata = 64'd0; |
| reg soclinux_sdram_inti_p0_rddata_valid = 1'd0; |
| wire [14:0] soclinux_sdram_inti_p1_address; |
| wire [3:0] soclinux_sdram_inti_p1_bank; |
| reg soclinux_sdram_inti_p1_cas_n = 1'd1; |
| reg soclinux_sdram_inti_p1_cs_n = 1'd1; |
| reg soclinux_sdram_inti_p1_ras_n = 1'd1; |
| reg soclinux_sdram_inti_p1_we_n = 1'd1; |
| wire soclinux_sdram_inti_p1_cke; |
| wire soclinux_sdram_inti_p1_odt; |
| wire soclinux_sdram_inti_p1_reset_n; |
| reg soclinux_sdram_inti_p1_act_n = 1'd1; |
| wire [63:0] soclinux_sdram_inti_p1_wrdata; |
| wire soclinux_sdram_inti_p1_wrdata_en; |
| wire [7:0] soclinux_sdram_inti_p1_wrdata_mask; |
| wire soclinux_sdram_inti_p1_rddata_en; |
| reg [63:0] soclinux_sdram_inti_p1_rddata = 64'd0; |
| reg soclinux_sdram_inti_p1_rddata_valid = 1'd0; |
| wire [14:0] soclinux_sdram_inti_p2_address; |
| wire [3:0] soclinux_sdram_inti_p2_bank; |
| reg soclinux_sdram_inti_p2_cas_n = 1'd1; |
| reg soclinux_sdram_inti_p2_cs_n = 1'd1; |
| reg soclinux_sdram_inti_p2_ras_n = 1'd1; |
| reg soclinux_sdram_inti_p2_we_n = 1'd1; |
| wire soclinux_sdram_inti_p2_cke; |
| wire soclinux_sdram_inti_p2_odt; |
| wire soclinux_sdram_inti_p2_reset_n; |
| reg soclinux_sdram_inti_p2_act_n = 1'd1; |
| wire [63:0] soclinux_sdram_inti_p2_wrdata; |
| wire soclinux_sdram_inti_p2_wrdata_en; |
| wire [7:0] soclinux_sdram_inti_p2_wrdata_mask; |
| wire soclinux_sdram_inti_p2_rddata_en; |
| reg [63:0] soclinux_sdram_inti_p2_rddata = 64'd0; |
| reg soclinux_sdram_inti_p2_rddata_valid = 1'd0; |
| wire [14:0] soclinux_sdram_inti_p3_address; |
| wire [3:0] soclinux_sdram_inti_p3_bank; |
| reg soclinux_sdram_inti_p3_cas_n = 1'd1; |
| reg soclinux_sdram_inti_p3_cs_n = 1'd1; |
| reg soclinux_sdram_inti_p3_ras_n = 1'd1; |
| reg soclinux_sdram_inti_p3_we_n = 1'd1; |
| wire soclinux_sdram_inti_p3_cke; |
| wire soclinux_sdram_inti_p3_odt; |
| wire soclinux_sdram_inti_p3_reset_n; |
| reg soclinux_sdram_inti_p3_act_n = 1'd1; |
| wire [63:0] soclinux_sdram_inti_p3_wrdata; |
| wire soclinux_sdram_inti_p3_wrdata_en; |
| wire [7:0] soclinux_sdram_inti_p3_wrdata_mask; |
| wire soclinux_sdram_inti_p3_rddata_en; |
| reg [63:0] soclinux_sdram_inti_p3_rddata = 64'd0; |
| reg soclinux_sdram_inti_p3_rddata_valid = 1'd0; |
| wire [14:0] soclinux_sdram_slave_p0_address; |
| wire [3:0] soclinux_sdram_slave_p0_bank; |
| wire soclinux_sdram_slave_p0_cas_n; |
| wire soclinux_sdram_slave_p0_cs_n; |
| wire soclinux_sdram_slave_p0_ras_n; |
| wire soclinux_sdram_slave_p0_we_n; |
| wire soclinux_sdram_slave_p0_cke; |
| wire soclinux_sdram_slave_p0_odt; |
| wire soclinux_sdram_slave_p0_reset_n; |
| wire soclinux_sdram_slave_p0_act_n; |
| wire [63:0] soclinux_sdram_slave_p0_wrdata; |
| wire soclinux_sdram_slave_p0_wrdata_en; |
| wire [7:0] soclinux_sdram_slave_p0_wrdata_mask; |
| wire soclinux_sdram_slave_p0_rddata_en; |
| reg [63:0] soclinux_sdram_slave_p0_rddata = 64'd0; |
| reg soclinux_sdram_slave_p0_rddata_valid = 1'd0; |
| wire [14:0] soclinux_sdram_slave_p1_address; |
| wire [3:0] soclinux_sdram_slave_p1_bank; |
| wire soclinux_sdram_slave_p1_cas_n; |
| wire soclinux_sdram_slave_p1_cs_n; |
| wire soclinux_sdram_slave_p1_ras_n; |
| wire soclinux_sdram_slave_p1_we_n; |
| wire soclinux_sdram_slave_p1_cke; |
| wire soclinux_sdram_slave_p1_odt; |
| wire soclinux_sdram_slave_p1_reset_n; |
| wire soclinux_sdram_slave_p1_act_n; |
| wire [63:0] soclinux_sdram_slave_p1_wrdata; |
| wire soclinux_sdram_slave_p1_wrdata_en; |
| wire [7:0] soclinux_sdram_slave_p1_wrdata_mask; |
| wire soclinux_sdram_slave_p1_rddata_en; |
| reg [63:0] soclinux_sdram_slave_p1_rddata = 64'd0; |
| reg soclinux_sdram_slave_p1_rddata_valid = 1'd0; |
| wire [14:0] soclinux_sdram_slave_p2_address; |
| wire [3:0] soclinux_sdram_slave_p2_bank; |
| wire soclinux_sdram_slave_p2_cas_n; |
| wire soclinux_sdram_slave_p2_cs_n; |
| wire soclinux_sdram_slave_p2_ras_n; |
| wire soclinux_sdram_slave_p2_we_n; |
| wire soclinux_sdram_slave_p2_cke; |
| wire soclinux_sdram_slave_p2_odt; |
| wire soclinux_sdram_slave_p2_reset_n; |
| wire soclinux_sdram_slave_p2_act_n; |
| wire [63:0] soclinux_sdram_slave_p2_wrdata; |
| wire soclinux_sdram_slave_p2_wrdata_en; |
| wire [7:0] soclinux_sdram_slave_p2_wrdata_mask; |
| wire soclinux_sdram_slave_p2_rddata_en; |
| reg [63:0] soclinux_sdram_slave_p2_rddata = 64'd0; |
| reg soclinux_sdram_slave_p2_rddata_valid = 1'd0; |
| wire [14:0] soclinux_sdram_slave_p3_address; |
| wire [3:0] soclinux_sdram_slave_p3_bank; |
| wire soclinux_sdram_slave_p3_cas_n; |
| wire soclinux_sdram_slave_p3_cs_n; |
| wire soclinux_sdram_slave_p3_ras_n; |
| wire soclinux_sdram_slave_p3_we_n; |
| wire soclinux_sdram_slave_p3_cke; |
| wire soclinux_sdram_slave_p3_odt; |
| wire soclinux_sdram_slave_p3_reset_n; |
| wire soclinux_sdram_slave_p3_act_n; |
| wire [63:0] soclinux_sdram_slave_p3_wrdata; |
| wire soclinux_sdram_slave_p3_wrdata_en; |
| wire [7:0] soclinux_sdram_slave_p3_wrdata_mask; |
| wire soclinux_sdram_slave_p3_rddata_en; |
| reg [63:0] soclinux_sdram_slave_p3_rddata = 64'd0; |
| reg soclinux_sdram_slave_p3_rddata_valid = 1'd0; |
| reg [14:0] soclinux_sdram_master_p0_address = 15'd0; |
| reg [3:0] soclinux_sdram_master_p0_bank = 4'd0; |
| reg soclinux_sdram_master_p0_cas_n = 1'd1; |
| reg soclinux_sdram_master_p0_cs_n = 1'd1; |
| reg soclinux_sdram_master_p0_ras_n = 1'd1; |
| reg soclinux_sdram_master_p0_we_n = 1'd1; |
| reg soclinux_sdram_master_p0_cke = 1'd0; |
| reg soclinux_sdram_master_p0_odt = 1'd0; |
| reg soclinux_sdram_master_p0_reset_n = 1'd0; |
| reg soclinux_sdram_master_p0_act_n = 1'd1; |
| reg [63:0] soclinux_sdram_master_p0_wrdata = 64'd0; |
| reg soclinux_sdram_master_p0_wrdata_en = 1'd0; |
| reg [7:0] soclinux_sdram_master_p0_wrdata_mask = 8'd0; |
| reg soclinux_sdram_master_p0_rddata_en = 1'd0; |
| wire [63:0] soclinux_sdram_master_p0_rddata; |
| wire soclinux_sdram_master_p0_rddata_valid; |
| reg [14:0] soclinux_sdram_master_p1_address = 15'd0; |
| reg [3:0] soclinux_sdram_master_p1_bank = 4'd0; |
| reg soclinux_sdram_master_p1_cas_n = 1'd1; |
| reg soclinux_sdram_master_p1_cs_n = 1'd1; |
| reg soclinux_sdram_master_p1_ras_n = 1'd1; |
| reg soclinux_sdram_master_p1_we_n = 1'd1; |
| reg soclinux_sdram_master_p1_cke = 1'd0; |
| reg soclinux_sdram_master_p1_odt = 1'd0; |
| reg soclinux_sdram_master_p1_reset_n = 1'd0; |
| reg soclinux_sdram_master_p1_act_n = 1'd1; |
| reg [63:0] soclinux_sdram_master_p1_wrdata = 64'd0; |
| reg soclinux_sdram_master_p1_wrdata_en = 1'd0; |
| reg [7:0] soclinux_sdram_master_p1_wrdata_mask = 8'd0; |
| reg soclinux_sdram_master_p1_rddata_en = 1'd0; |
| wire [63:0] soclinux_sdram_master_p1_rddata; |
| wire soclinux_sdram_master_p1_rddata_valid; |
| reg [14:0] soclinux_sdram_master_p2_address = 15'd0; |
| reg [3:0] soclinux_sdram_master_p2_bank = 4'd0; |
| reg soclinux_sdram_master_p2_cas_n = 1'd1; |
| reg soclinux_sdram_master_p2_cs_n = 1'd1; |
| reg soclinux_sdram_master_p2_ras_n = 1'd1; |
| reg soclinux_sdram_master_p2_we_n = 1'd1; |
| reg soclinux_sdram_master_p2_cke = 1'd0; |
| reg soclinux_sdram_master_p2_odt = 1'd0; |
| reg soclinux_sdram_master_p2_reset_n = 1'd0; |
| reg soclinux_sdram_master_p2_act_n = 1'd1; |
| reg [63:0] soclinux_sdram_master_p2_wrdata = 64'd0; |
| reg soclinux_sdram_master_p2_wrdata_en = 1'd0; |
| reg [7:0] soclinux_sdram_master_p2_wrdata_mask = 8'd0; |
| reg soclinux_sdram_master_p2_rddata_en = 1'd0; |
| wire [63:0] soclinux_sdram_master_p2_rddata; |
| wire soclinux_sdram_master_p2_rddata_valid; |
| reg [14:0] soclinux_sdram_master_p3_address = 15'd0; |
| reg [3:0] soclinux_sdram_master_p3_bank = 4'd0; |
| reg soclinux_sdram_master_p3_cas_n = 1'd1; |
| reg soclinux_sdram_master_p3_cs_n = 1'd1; |
| reg soclinux_sdram_master_p3_ras_n = 1'd1; |
| reg soclinux_sdram_master_p3_we_n = 1'd1; |
| reg soclinux_sdram_master_p3_cke = 1'd0; |
| reg soclinux_sdram_master_p3_odt = 1'd0; |
| reg soclinux_sdram_master_p3_reset_n = 1'd0; |
| reg soclinux_sdram_master_p3_act_n = 1'd1; |
| reg [63:0] soclinux_sdram_master_p3_wrdata = 64'd0; |
| reg soclinux_sdram_master_p3_wrdata_en = 1'd0; |
| reg [7:0] soclinux_sdram_master_p3_wrdata_mask = 8'd0; |
| reg soclinux_sdram_master_p3_rddata_en = 1'd0; |
| wire [63:0] soclinux_sdram_master_p3_rddata; |
| wire soclinux_sdram_master_p3_rddata_valid; |
| reg [3:0] soclinux_sdram_storage = 4'd0; |
| reg soclinux_sdram_re = 1'd0; |
| reg [5:0] soclinux_sdram_phaseinjector0_command_storage = 6'd0; |
| reg soclinux_sdram_phaseinjector0_command_re = 1'd0; |
| wire soclinux_sdram_phaseinjector0_command_issue_re; |
| wire soclinux_sdram_phaseinjector0_command_issue_r; |
| wire soclinux_sdram_phaseinjector0_command_issue_we; |
| reg soclinux_sdram_phaseinjector0_command_issue_w = 1'd0; |
| reg [14:0] soclinux_sdram_phaseinjector0_address_storage = 15'd0; |
| reg soclinux_sdram_phaseinjector0_address_re = 1'd0; |
| reg [3:0] soclinux_sdram_phaseinjector0_baddress_storage = 4'd0; |
| reg soclinux_sdram_phaseinjector0_baddress_re = 1'd0; |
| reg [63:0] soclinux_sdram_phaseinjector0_wrdata_storage = 64'd0; |
| reg soclinux_sdram_phaseinjector0_wrdata_re = 1'd0; |
| reg [63:0] soclinux_sdram_phaseinjector0_status = 64'd0; |
| wire soclinux_sdram_phaseinjector0_we; |
| reg [5:0] soclinux_sdram_phaseinjector1_command_storage = 6'd0; |
| reg soclinux_sdram_phaseinjector1_command_re = 1'd0; |
| wire soclinux_sdram_phaseinjector1_command_issue_re; |
| wire soclinux_sdram_phaseinjector1_command_issue_r; |
| wire soclinux_sdram_phaseinjector1_command_issue_we; |
| reg soclinux_sdram_phaseinjector1_command_issue_w = 1'd0; |
| reg [14:0] soclinux_sdram_phaseinjector1_address_storage = 15'd0; |
| reg soclinux_sdram_phaseinjector1_address_re = 1'd0; |
| reg [3:0] soclinux_sdram_phaseinjector1_baddress_storage = 4'd0; |
| reg soclinux_sdram_phaseinjector1_baddress_re = 1'd0; |
| reg [63:0] soclinux_sdram_phaseinjector1_wrdata_storage = 64'd0; |
| reg soclinux_sdram_phaseinjector1_wrdata_re = 1'd0; |
| reg [63:0] soclinux_sdram_phaseinjector1_status = 64'd0; |
| wire soclinux_sdram_phaseinjector1_we; |
| reg [5:0] soclinux_sdram_phaseinjector2_command_storage = 6'd0; |
| reg soclinux_sdram_phaseinjector2_command_re = 1'd0; |
| wire soclinux_sdram_phaseinjector2_command_issue_re; |
| wire soclinux_sdram_phaseinjector2_command_issue_r; |
| wire soclinux_sdram_phaseinjector2_command_issue_we; |
| reg soclinux_sdram_phaseinjector2_command_issue_w = 1'd0; |
| reg [14:0] soclinux_sdram_phaseinjector2_address_storage = 15'd0; |
| reg soclinux_sdram_phaseinjector2_address_re = 1'd0; |
| reg [3:0] soclinux_sdram_phaseinjector2_baddress_storage = 4'd0; |
| reg soclinux_sdram_phaseinjector2_baddress_re = 1'd0; |
| reg [63:0] soclinux_sdram_phaseinjector2_wrdata_storage = 64'd0; |
| reg soclinux_sdram_phaseinjector2_wrdata_re = 1'd0; |
| reg [63:0] soclinux_sdram_phaseinjector2_status = 64'd0; |
| wire soclinux_sdram_phaseinjector2_we; |
| reg [5:0] soclinux_sdram_phaseinjector3_command_storage = 6'd0; |
| reg soclinux_sdram_phaseinjector3_command_re = 1'd0; |
| wire soclinux_sdram_phaseinjector3_command_issue_re; |
| wire soclinux_sdram_phaseinjector3_command_issue_r; |
| wire soclinux_sdram_phaseinjector3_command_issue_we; |
| reg soclinux_sdram_phaseinjector3_command_issue_w = 1'd0; |
| reg [14:0] soclinux_sdram_phaseinjector3_address_storage = 15'd0; |
| reg soclinux_sdram_phaseinjector3_address_re = 1'd0; |
| reg [3:0] soclinux_sdram_phaseinjector3_baddress_storage = 4'd0; |
| reg soclinux_sdram_phaseinjector3_baddress_re = 1'd0; |
| reg [63:0] soclinux_sdram_phaseinjector3_wrdata_storage = 64'd0; |
| reg soclinux_sdram_phaseinjector3_wrdata_re = 1'd0; |
| reg [63:0] soclinux_sdram_phaseinjector3_status = 64'd0; |
| wire soclinux_sdram_phaseinjector3_we; |
| wire soclinux_sdram_interface_bank0_valid; |
| wire soclinux_sdram_interface_bank0_ready; |
| wire soclinux_sdram_interface_bank0_we; |
| wire [21:0] soclinux_sdram_interface_bank0_addr; |
| wire soclinux_sdram_interface_bank0_lock; |
| wire soclinux_sdram_interface_bank0_wdata_ready; |
| wire soclinux_sdram_interface_bank0_rdata_valid; |
| wire soclinux_sdram_interface_bank1_valid; |
| wire soclinux_sdram_interface_bank1_ready; |
| wire soclinux_sdram_interface_bank1_we; |
| wire [21:0] soclinux_sdram_interface_bank1_addr; |
| wire soclinux_sdram_interface_bank1_lock; |
| wire soclinux_sdram_interface_bank1_wdata_ready; |
| wire soclinux_sdram_interface_bank1_rdata_valid; |
| wire soclinux_sdram_interface_bank2_valid; |
| wire soclinux_sdram_interface_bank2_ready; |
| wire soclinux_sdram_interface_bank2_we; |
| wire [21:0] soclinux_sdram_interface_bank2_addr; |
| wire soclinux_sdram_interface_bank2_lock; |
| wire soclinux_sdram_interface_bank2_wdata_ready; |
| wire soclinux_sdram_interface_bank2_rdata_valid; |
| wire soclinux_sdram_interface_bank3_valid; |
| wire soclinux_sdram_interface_bank3_ready; |
| wire soclinux_sdram_interface_bank3_we; |
| wire [21:0] soclinux_sdram_interface_bank3_addr; |
| wire soclinux_sdram_interface_bank3_lock; |
| wire soclinux_sdram_interface_bank3_wdata_ready; |
| wire soclinux_sdram_interface_bank3_rdata_valid; |
| wire soclinux_sdram_interface_bank4_valid; |
| wire soclinux_sdram_interface_bank4_ready; |
| wire soclinux_sdram_interface_bank4_we; |
| wire [21:0] soclinux_sdram_interface_bank4_addr; |
| wire soclinux_sdram_interface_bank4_lock; |
| wire soclinux_sdram_interface_bank4_wdata_ready; |
| wire soclinux_sdram_interface_bank4_rdata_valid; |
| wire soclinux_sdram_interface_bank5_valid; |
| wire soclinux_sdram_interface_bank5_ready; |
| wire soclinux_sdram_interface_bank5_we; |
| wire [21:0] soclinux_sdram_interface_bank5_addr; |
| wire soclinux_sdram_interface_bank5_lock; |
| wire soclinux_sdram_interface_bank5_wdata_ready; |
| wire soclinux_sdram_interface_bank5_rdata_valid; |
| wire soclinux_sdram_interface_bank6_valid; |
| wire soclinux_sdram_interface_bank6_ready; |
| wire soclinux_sdram_interface_bank6_we; |
| wire [21:0] soclinux_sdram_interface_bank6_addr; |
| wire soclinux_sdram_interface_bank6_lock; |
| wire soclinux_sdram_interface_bank6_wdata_ready; |
| wire soclinux_sdram_interface_bank6_rdata_valid; |
| wire soclinux_sdram_interface_bank7_valid; |
| wire soclinux_sdram_interface_bank7_ready; |
| wire soclinux_sdram_interface_bank7_we; |
| wire [21:0] soclinux_sdram_interface_bank7_addr; |
| wire soclinux_sdram_interface_bank7_lock; |
| wire soclinux_sdram_interface_bank7_wdata_ready; |
| wire soclinux_sdram_interface_bank7_rdata_valid; |
| wire soclinux_sdram_interface_bank8_valid; |
| wire soclinux_sdram_interface_bank8_ready; |
| wire soclinux_sdram_interface_bank8_we; |
| wire [21:0] soclinux_sdram_interface_bank8_addr; |
| wire soclinux_sdram_interface_bank8_lock; |
| wire soclinux_sdram_interface_bank8_wdata_ready; |
| wire soclinux_sdram_interface_bank8_rdata_valid; |
| wire soclinux_sdram_interface_bank9_valid; |
| wire soclinux_sdram_interface_bank9_ready; |
| wire soclinux_sdram_interface_bank9_we; |
| wire [21:0] soclinux_sdram_interface_bank9_addr; |
| wire soclinux_sdram_interface_bank9_lock; |
| wire soclinux_sdram_interface_bank9_wdata_ready; |
| wire soclinux_sdram_interface_bank9_rdata_valid; |
| wire soclinux_sdram_interface_bank10_valid; |
| wire soclinux_sdram_interface_bank10_ready; |
| wire soclinux_sdram_interface_bank10_we; |
| wire [21:0] soclinux_sdram_interface_bank10_addr; |
| wire soclinux_sdram_interface_bank10_lock; |
| wire soclinux_sdram_interface_bank10_wdata_ready; |
| wire soclinux_sdram_interface_bank10_rdata_valid; |
| wire soclinux_sdram_interface_bank11_valid; |
| wire soclinux_sdram_interface_bank11_ready; |
| wire soclinux_sdram_interface_bank11_we; |
| wire [21:0] soclinux_sdram_interface_bank11_addr; |
| wire soclinux_sdram_interface_bank11_lock; |
| wire soclinux_sdram_interface_bank11_wdata_ready; |
| wire soclinux_sdram_interface_bank11_rdata_valid; |
| wire soclinux_sdram_interface_bank12_valid; |
| wire soclinux_sdram_interface_bank12_ready; |
| wire soclinux_sdram_interface_bank12_we; |
| wire [21:0] soclinux_sdram_interface_bank12_addr; |
| wire soclinux_sdram_interface_bank12_lock; |
| wire soclinux_sdram_interface_bank12_wdata_ready; |
| wire soclinux_sdram_interface_bank12_rdata_valid; |
| wire soclinux_sdram_interface_bank13_valid; |
| wire soclinux_sdram_interface_bank13_ready; |
| wire soclinux_sdram_interface_bank13_we; |
| wire [21:0] soclinux_sdram_interface_bank13_addr; |
| wire soclinux_sdram_interface_bank13_lock; |
| wire soclinux_sdram_interface_bank13_wdata_ready; |
| wire soclinux_sdram_interface_bank13_rdata_valid; |
| wire soclinux_sdram_interface_bank14_valid; |
| wire soclinux_sdram_interface_bank14_ready; |
| wire soclinux_sdram_interface_bank14_we; |
| wire [21:0] soclinux_sdram_interface_bank14_addr; |
| wire soclinux_sdram_interface_bank14_lock; |
| wire soclinux_sdram_interface_bank14_wdata_ready; |
| wire soclinux_sdram_interface_bank14_rdata_valid; |
| wire soclinux_sdram_interface_bank15_valid; |
| wire soclinux_sdram_interface_bank15_ready; |
| wire soclinux_sdram_interface_bank15_we; |
| wire [21:0] soclinux_sdram_interface_bank15_addr; |
| wire soclinux_sdram_interface_bank15_lock; |
| wire soclinux_sdram_interface_bank15_wdata_ready; |
| wire soclinux_sdram_interface_bank15_rdata_valid; |
| reg [255:0] soclinux_sdram_interface_wdata = 256'd0; |
| reg [31:0] soclinux_sdram_interface_wdata_we = 32'd0; |
| wire [255:0] soclinux_sdram_interface_rdata; |
| reg [14:0] soclinux_sdram_dfi_p0_address = 15'd0; |
| reg [3:0] soclinux_sdram_dfi_p0_bank = 4'd0; |
| reg soclinux_sdram_dfi_p0_cas_n = 1'd1; |
| reg soclinux_sdram_dfi_p0_cs_n = 1'd1; |
| reg soclinux_sdram_dfi_p0_ras_n = 1'd1; |
| reg soclinux_sdram_dfi_p0_we_n = 1'd1; |
| wire soclinux_sdram_dfi_p0_cke; |
| wire soclinux_sdram_dfi_p0_odt; |
| wire soclinux_sdram_dfi_p0_reset_n; |
| reg soclinux_sdram_dfi_p0_act_n = 1'd1; |
| wire [63:0] soclinux_sdram_dfi_p0_wrdata; |
| reg soclinux_sdram_dfi_p0_wrdata_en = 1'd0; |
| wire [7:0] soclinux_sdram_dfi_p0_wrdata_mask; |
| reg soclinux_sdram_dfi_p0_rddata_en = 1'd0; |
| wire [63:0] soclinux_sdram_dfi_p0_rddata; |
| wire soclinux_sdram_dfi_p0_rddata_valid; |
| reg [14:0] soclinux_sdram_dfi_p1_address = 15'd0; |
| reg [3:0] soclinux_sdram_dfi_p1_bank = 4'd0; |
| reg soclinux_sdram_dfi_p1_cas_n = 1'd1; |
| reg soclinux_sdram_dfi_p1_cs_n = 1'd1; |
| reg soclinux_sdram_dfi_p1_ras_n = 1'd1; |
| reg soclinux_sdram_dfi_p1_we_n = 1'd1; |
| wire soclinux_sdram_dfi_p1_cke; |
| wire soclinux_sdram_dfi_p1_odt; |
| wire soclinux_sdram_dfi_p1_reset_n; |
| reg soclinux_sdram_dfi_p1_act_n = 1'd1; |
| wire [63:0] soclinux_sdram_dfi_p1_wrdata; |
| reg soclinux_sdram_dfi_p1_wrdata_en = 1'd0; |
| wire [7:0] soclinux_sdram_dfi_p1_wrdata_mask; |
| reg soclinux_sdram_dfi_p1_rddata_en = 1'd0; |
| wire [63:0] soclinux_sdram_dfi_p1_rddata; |
| wire soclinux_sdram_dfi_p1_rddata_valid; |
| reg [14:0] soclinux_sdram_dfi_p2_address = 15'd0; |
| reg [3:0] soclinux_sdram_dfi_p2_bank = 4'd0; |
| reg soclinux_sdram_dfi_p2_cas_n = 1'd1; |
| reg soclinux_sdram_dfi_p2_cs_n = 1'd1; |
| reg soclinux_sdram_dfi_p2_ras_n = 1'd1; |
| reg soclinux_sdram_dfi_p2_we_n = 1'd1; |
| wire soclinux_sdram_dfi_p2_cke; |
| wire soclinux_sdram_dfi_p2_odt; |
| wire soclinux_sdram_dfi_p2_reset_n; |
| reg soclinux_sdram_dfi_p2_act_n = 1'd1; |
| wire [63:0] soclinux_sdram_dfi_p2_wrdata; |
| reg soclinux_sdram_dfi_p2_wrdata_en = 1'd0; |
| wire [7:0] soclinux_sdram_dfi_p2_wrdata_mask; |
| reg soclinux_sdram_dfi_p2_rddata_en = 1'd0; |
| wire [63:0] soclinux_sdram_dfi_p2_rddata; |
| wire soclinux_sdram_dfi_p2_rddata_valid; |
| reg [14:0] soclinux_sdram_dfi_p3_address = 15'd0; |
| reg [3:0] soclinux_sdram_dfi_p3_bank = 4'd0; |
| reg soclinux_sdram_dfi_p3_cas_n = 1'd1; |
| reg soclinux_sdram_dfi_p3_cs_n = 1'd1; |
| reg soclinux_sdram_dfi_p3_ras_n = 1'd1; |
| reg soclinux_sdram_dfi_p3_we_n = 1'd1; |
| wire soclinux_sdram_dfi_p3_cke; |
| wire soclinux_sdram_dfi_p3_odt; |
| wire soclinux_sdram_dfi_p3_reset_n; |
| reg soclinux_sdram_dfi_p3_act_n = 1'd1; |
| wire [63:0] soclinux_sdram_dfi_p3_wrdata; |
| reg soclinux_sdram_dfi_p3_wrdata_en = 1'd0; |
| wire [7:0] soclinux_sdram_dfi_p3_wrdata_mask; |
| reg soclinux_sdram_dfi_p3_rddata_en = 1'd0; |
| wire [63:0] soclinux_sdram_dfi_p3_rddata; |
| wire soclinux_sdram_dfi_p3_rddata_valid; |
| reg soclinux_sdram_cmd_valid = 1'd0; |
| reg soclinux_sdram_cmd_ready = 1'd0; |
| reg soclinux_sdram_cmd_last = 1'd0; |
| reg [14:0] soclinux_sdram_cmd_payload_a = 15'd0; |
| reg [3:0] soclinux_sdram_cmd_payload_ba = 4'd0; |
| reg soclinux_sdram_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_cmd_payload_is_write = 1'd0; |
| wire soclinux_sdram_wants_refresh; |
| wire soclinux_sdram_wants_zqcs; |
| wire soclinux_sdram_timer_wait; |
| wire soclinux_sdram_timer_done0; |
| wire [9:0] soclinux_sdram_timer_count0; |
| wire soclinux_sdram_timer_done1; |
| reg [9:0] soclinux_sdram_timer_count1 = 10'd976; |
| wire soclinux_sdram_postponer_req_i; |
| reg soclinux_sdram_postponer_req_o = 1'd0; |
| reg soclinux_sdram_postponer_count = 1'd0; |
| reg soclinux_sdram_sequencer_start0 = 1'd0; |
| wire soclinux_sdram_sequencer_done0; |
| wire soclinux_sdram_sequencer_start1; |
| reg soclinux_sdram_sequencer_done1 = 1'd0; |
| reg [5:0] soclinux_sdram_sequencer_counter = 6'd0; |
| reg soclinux_sdram_sequencer_count = 1'd0; |
| wire soclinux_sdram_zqcs_timer_wait; |
| wire soclinux_sdram_zqcs_timer_done0; |
| wire [26:0] soclinux_sdram_zqcs_timer_count0; |
| wire soclinux_sdram_zqcs_timer_done1; |
| reg [26:0] soclinux_sdram_zqcs_timer_count1 = 27'd124999999; |
| reg soclinux_sdram_zqcs_executer_start = 1'd0; |
| reg soclinux_sdram_zqcs_executer_done = 1'd0; |
| reg [5:0] soclinux_sdram_zqcs_executer_counter = 6'd0; |
| wire soclinux_sdram_bankmachine0_req_valid; |
| wire soclinux_sdram_bankmachine0_req_ready; |
| wire soclinux_sdram_bankmachine0_req_we; |
| wire [21:0] soclinux_sdram_bankmachine0_req_addr; |
| wire soclinux_sdram_bankmachine0_req_lock; |
| reg soclinux_sdram_bankmachine0_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine0_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine0_refresh_req; |
| reg soclinux_sdram_bankmachine0_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine0_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine0_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine0_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine0_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine0_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine0_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine0_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine0_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine0_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine0_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine0_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_we; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_writable; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_re; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_readable; |
| wire [24:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_din; |
| wire [24:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_dout; |
| reg [3:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine0_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine0_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine0_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine0_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine0_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine0_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine0_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine0_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine0_row = 15'd0; |
| reg soclinux_sdram_bankmachine0_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine0_row_hit; |
| reg soclinux_sdram_bankmachine0_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine0_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine0_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine0_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine0_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine0_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine0_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine0_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine0_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine0_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine0_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine0_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine1_req_valid; |
| wire soclinux_sdram_bankmachine1_req_ready; |
| wire soclinux_sdram_bankmachine1_req_we; |
| wire [21:0] soclinux_sdram_bankmachine1_req_addr; |
| wire soclinux_sdram_bankmachine1_req_lock; |
| reg soclinux_sdram_bankmachine1_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine1_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine1_refresh_req; |
| reg soclinux_sdram_bankmachine1_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine1_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine1_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine1_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine1_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine1_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine1_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine1_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine1_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine1_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine1_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine1_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_we; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_writable; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_re; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_readable; |
| wire [24:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_din; |
| wire [24:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_dout; |
| reg [3:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine1_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine1_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine1_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine1_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine1_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine1_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine1_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine1_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine1_row = 15'd0; |
| reg soclinux_sdram_bankmachine1_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine1_row_hit; |
| reg soclinux_sdram_bankmachine1_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine1_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine1_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine1_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine1_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine1_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine1_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine1_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine1_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine1_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine1_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine1_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine2_req_valid; |
| wire soclinux_sdram_bankmachine2_req_ready; |
| wire soclinux_sdram_bankmachine2_req_we; |
| wire [21:0] soclinux_sdram_bankmachine2_req_addr; |
| wire soclinux_sdram_bankmachine2_req_lock; |
| reg soclinux_sdram_bankmachine2_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine2_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine2_refresh_req; |
| reg soclinux_sdram_bankmachine2_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine2_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine2_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine2_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine2_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine2_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine2_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine2_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine2_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine2_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine2_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine2_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_we; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_writable; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_re; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_readable; |
| wire [24:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_din; |
| wire [24:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_dout; |
| reg [3:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine2_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine2_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine2_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine2_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine2_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine2_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine2_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine2_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine2_row = 15'd0; |
| reg soclinux_sdram_bankmachine2_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine2_row_hit; |
| reg soclinux_sdram_bankmachine2_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine2_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine2_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine2_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine2_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine2_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine2_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine2_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine2_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine2_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine2_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine2_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine3_req_valid; |
| wire soclinux_sdram_bankmachine3_req_ready; |
| wire soclinux_sdram_bankmachine3_req_we; |
| wire [21:0] soclinux_sdram_bankmachine3_req_addr; |
| wire soclinux_sdram_bankmachine3_req_lock; |
| reg soclinux_sdram_bankmachine3_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine3_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine3_refresh_req; |
| reg soclinux_sdram_bankmachine3_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine3_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine3_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine3_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine3_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine3_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine3_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine3_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine3_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine3_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine3_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine3_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_we; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_writable; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_re; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_readable; |
| wire [24:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_din; |
| wire [24:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_dout; |
| reg [3:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine3_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine3_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine3_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine3_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine3_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine3_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine3_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine3_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine3_row = 15'd0; |
| reg soclinux_sdram_bankmachine3_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine3_row_hit; |
| reg soclinux_sdram_bankmachine3_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine3_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine3_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine3_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine3_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine3_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine3_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine3_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine3_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine3_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine3_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine3_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine4_req_valid; |
| wire soclinux_sdram_bankmachine4_req_ready; |
| wire soclinux_sdram_bankmachine4_req_we; |
| wire [21:0] soclinux_sdram_bankmachine4_req_addr; |
| wire soclinux_sdram_bankmachine4_req_lock; |
| reg soclinux_sdram_bankmachine4_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine4_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine4_refresh_req; |
| reg soclinux_sdram_bankmachine4_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine4_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine4_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine4_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine4_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine4_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine4_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine4_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine4_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine4_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine4_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine4_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_we; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_writable; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_re; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_readable; |
| wire [24:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_din; |
| wire [24:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_dout; |
| reg [3:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine4_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine4_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine4_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine4_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine4_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine4_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine4_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine4_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine4_row = 15'd0; |
| reg soclinux_sdram_bankmachine4_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine4_row_hit; |
| reg soclinux_sdram_bankmachine4_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine4_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine4_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine4_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine4_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine4_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine4_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine4_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine4_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine4_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine4_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine4_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine5_req_valid; |
| wire soclinux_sdram_bankmachine5_req_ready; |
| wire soclinux_sdram_bankmachine5_req_we; |
| wire [21:0] soclinux_sdram_bankmachine5_req_addr; |
| wire soclinux_sdram_bankmachine5_req_lock; |
| reg soclinux_sdram_bankmachine5_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine5_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine5_refresh_req; |
| reg soclinux_sdram_bankmachine5_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine5_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine5_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine5_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine5_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine5_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine5_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine5_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine5_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine5_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine5_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine5_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_we; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_writable; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_re; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_readable; |
| wire [24:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_din; |
| wire [24:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_dout; |
| reg [3:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine5_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine5_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine5_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine5_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine5_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine5_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine5_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine5_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine5_row = 15'd0; |
| reg soclinux_sdram_bankmachine5_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine5_row_hit; |
| reg soclinux_sdram_bankmachine5_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine5_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine5_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine5_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine5_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine5_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine5_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine5_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine5_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine5_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine5_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine5_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine6_req_valid; |
| wire soclinux_sdram_bankmachine6_req_ready; |
| wire soclinux_sdram_bankmachine6_req_we; |
| wire [21:0] soclinux_sdram_bankmachine6_req_addr; |
| wire soclinux_sdram_bankmachine6_req_lock; |
| reg soclinux_sdram_bankmachine6_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine6_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine6_refresh_req; |
| reg soclinux_sdram_bankmachine6_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine6_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine6_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine6_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine6_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine6_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine6_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine6_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine6_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine6_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine6_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine6_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_we; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_writable; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_re; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_readable; |
| wire [24:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_din; |
| wire [24:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_dout; |
| reg [3:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine6_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine6_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine6_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine6_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine6_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine6_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine6_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine6_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine6_row = 15'd0; |
| reg soclinux_sdram_bankmachine6_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine6_row_hit; |
| reg soclinux_sdram_bankmachine6_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine6_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine6_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine6_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine6_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine6_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine6_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine6_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine6_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine6_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine6_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine6_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine7_req_valid; |
| wire soclinux_sdram_bankmachine7_req_ready; |
| wire soclinux_sdram_bankmachine7_req_we; |
| wire [21:0] soclinux_sdram_bankmachine7_req_addr; |
| wire soclinux_sdram_bankmachine7_req_lock; |
| reg soclinux_sdram_bankmachine7_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine7_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine7_refresh_req; |
| reg soclinux_sdram_bankmachine7_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine7_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine7_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine7_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine7_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine7_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine7_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine7_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine7_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine7_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine7_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine7_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_we; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_writable; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_re; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_readable; |
| wire [24:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_din; |
| wire [24:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_dout; |
| reg [3:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine7_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine7_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine7_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine7_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine7_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine7_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine7_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine7_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine7_row = 15'd0; |
| reg soclinux_sdram_bankmachine7_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine7_row_hit; |
| reg soclinux_sdram_bankmachine7_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine7_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine7_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine7_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine7_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine7_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine7_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine7_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine7_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine7_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine7_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine7_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine8_req_valid; |
| wire soclinux_sdram_bankmachine8_req_ready; |
| wire soclinux_sdram_bankmachine8_req_we; |
| wire [21:0] soclinux_sdram_bankmachine8_req_addr; |
| wire soclinux_sdram_bankmachine8_req_lock; |
| reg soclinux_sdram_bankmachine8_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine8_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine8_refresh_req; |
| reg soclinux_sdram_bankmachine8_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine8_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine8_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine8_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine8_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine8_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine8_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine8_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine8_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine8_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine8_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine8_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_we; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_writable; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_re; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_readable; |
| wire [24:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_din; |
| wire [24:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_dout; |
| reg [3:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine8_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine8_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine8_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine8_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine8_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine8_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine8_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine8_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine8_row = 15'd0; |
| reg soclinux_sdram_bankmachine8_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine8_row_hit; |
| reg soclinux_sdram_bankmachine8_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine8_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine8_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine8_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine8_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine8_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine8_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine8_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine8_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine8_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine8_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine8_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine9_req_valid; |
| wire soclinux_sdram_bankmachine9_req_ready; |
| wire soclinux_sdram_bankmachine9_req_we; |
| wire [21:0] soclinux_sdram_bankmachine9_req_addr; |
| wire soclinux_sdram_bankmachine9_req_lock; |
| reg soclinux_sdram_bankmachine9_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine9_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine9_refresh_req; |
| reg soclinux_sdram_bankmachine9_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine9_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine9_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine9_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine9_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine9_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine9_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine9_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine9_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine9_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine9_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine9_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_we; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_writable; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_re; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_readable; |
| wire [24:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_din; |
| wire [24:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_dout; |
| reg [3:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine9_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine9_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine9_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine9_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine9_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine9_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine9_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine9_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine9_row = 15'd0; |
| reg soclinux_sdram_bankmachine9_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine9_row_hit; |
| reg soclinux_sdram_bankmachine9_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine9_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine9_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine9_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine9_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine9_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine9_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine9_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine9_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine9_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine9_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine9_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine10_req_valid; |
| wire soclinux_sdram_bankmachine10_req_ready; |
| wire soclinux_sdram_bankmachine10_req_we; |
| wire [21:0] soclinux_sdram_bankmachine10_req_addr; |
| wire soclinux_sdram_bankmachine10_req_lock; |
| reg soclinux_sdram_bankmachine10_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine10_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine10_refresh_req; |
| reg soclinux_sdram_bankmachine10_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine10_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine10_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine10_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine10_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine10_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine10_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine10_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine10_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine10_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine10_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine10_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_we; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_writable; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_re; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_readable; |
| wire [24:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_din; |
| wire [24:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_dout; |
| reg [3:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine10_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine10_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine10_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine10_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine10_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine10_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine10_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine10_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine10_row = 15'd0; |
| reg soclinux_sdram_bankmachine10_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine10_row_hit; |
| reg soclinux_sdram_bankmachine10_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine10_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine10_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine10_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine10_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine10_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine10_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine10_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine10_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine10_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine10_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine10_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine11_req_valid; |
| wire soclinux_sdram_bankmachine11_req_ready; |
| wire soclinux_sdram_bankmachine11_req_we; |
| wire [21:0] soclinux_sdram_bankmachine11_req_addr; |
| wire soclinux_sdram_bankmachine11_req_lock; |
| reg soclinux_sdram_bankmachine11_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine11_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine11_refresh_req; |
| reg soclinux_sdram_bankmachine11_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine11_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine11_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine11_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine11_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine11_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine11_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine11_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine11_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine11_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine11_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine11_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_we; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_writable; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_re; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_readable; |
| wire [24:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_din; |
| wire [24:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_dout; |
| reg [3:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine11_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine11_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine11_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine11_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine11_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine11_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine11_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine11_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine11_row = 15'd0; |
| reg soclinux_sdram_bankmachine11_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine11_row_hit; |
| reg soclinux_sdram_bankmachine11_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine11_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine11_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine11_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine11_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine11_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine11_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine11_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine11_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine11_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine11_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine11_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine12_req_valid; |
| wire soclinux_sdram_bankmachine12_req_ready; |
| wire soclinux_sdram_bankmachine12_req_we; |
| wire [21:0] soclinux_sdram_bankmachine12_req_addr; |
| wire soclinux_sdram_bankmachine12_req_lock; |
| reg soclinux_sdram_bankmachine12_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine12_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine12_refresh_req; |
| reg soclinux_sdram_bankmachine12_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine12_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine12_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine12_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine12_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine12_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine12_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine12_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine12_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine12_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine12_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine12_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_we; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_writable; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_re; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_readable; |
| wire [24:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_din; |
| wire [24:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_dout; |
| reg [3:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine12_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine12_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine12_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine12_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine12_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine12_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine12_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine12_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine12_row = 15'd0; |
| reg soclinux_sdram_bankmachine12_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine12_row_hit; |
| reg soclinux_sdram_bankmachine12_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine12_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine12_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine12_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine12_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine12_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine12_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine12_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine12_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine12_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine12_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine12_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine13_req_valid; |
| wire soclinux_sdram_bankmachine13_req_ready; |
| wire soclinux_sdram_bankmachine13_req_we; |
| wire [21:0] soclinux_sdram_bankmachine13_req_addr; |
| wire soclinux_sdram_bankmachine13_req_lock; |
| reg soclinux_sdram_bankmachine13_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine13_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine13_refresh_req; |
| reg soclinux_sdram_bankmachine13_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine13_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine13_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine13_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine13_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine13_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine13_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine13_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine13_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine13_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine13_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine13_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_we; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_writable; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_re; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_readable; |
| wire [24:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_din; |
| wire [24:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_dout; |
| reg [3:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine13_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine13_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine13_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine13_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine13_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine13_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine13_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine13_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine13_row = 15'd0; |
| reg soclinux_sdram_bankmachine13_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine13_row_hit; |
| reg soclinux_sdram_bankmachine13_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine13_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine13_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine13_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine13_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine13_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine13_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine13_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine13_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine13_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine13_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine13_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine14_req_valid; |
| wire soclinux_sdram_bankmachine14_req_ready; |
| wire soclinux_sdram_bankmachine14_req_we; |
| wire [21:0] soclinux_sdram_bankmachine14_req_addr; |
| wire soclinux_sdram_bankmachine14_req_lock; |
| reg soclinux_sdram_bankmachine14_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine14_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine14_refresh_req; |
| reg soclinux_sdram_bankmachine14_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine14_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine14_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine14_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine14_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine14_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine14_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine14_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine14_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine14_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine14_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine14_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_we; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_writable; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_re; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_readable; |
| wire [24:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_din; |
| wire [24:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_dout; |
| reg [3:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine14_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine14_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine14_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine14_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine14_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine14_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine14_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine14_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine14_row = 15'd0; |
| reg soclinux_sdram_bankmachine14_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine14_row_hit; |
| reg soclinux_sdram_bankmachine14_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine14_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine14_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine14_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine14_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine14_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine14_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine14_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine14_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine14_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine14_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine14_trascon_count = 3'd0; |
| wire soclinux_sdram_bankmachine15_req_valid; |
| wire soclinux_sdram_bankmachine15_req_ready; |
| wire soclinux_sdram_bankmachine15_req_we; |
| wire [21:0] soclinux_sdram_bankmachine15_req_addr; |
| wire soclinux_sdram_bankmachine15_req_lock; |
| reg soclinux_sdram_bankmachine15_req_wdata_ready = 1'd0; |
| reg soclinux_sdram_bankmachine15_req_rdata_valid = 1'd0; |
| wire soclinux_sdram_bankmachine15_refresh_req; |
| reg soclinux_sdram_bankmachine15_refresh_gnt = 1'd0; |
| reg soclinux_sdram_bankmachine15_cmd_valid = 1'd0; |
| reg soclinux_sdram_bankmachine15_cmd_ready = 1'd0; |
| reg [14:0] soclinux_sdram_bankmachine15_cmd_payload_a = 15'd0; |
| wire [3:0] soclinux_sdram_bankmachine15_cmd_payload_ba; |
| reg soclinux_sdram_bankmachine15_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_bankmachine15_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_bankmachine15_cmd_payload_we = 1'd0; |
| reg soclinux_sdram_bankmachine15_cmd_payload_is_cmd = 1'd0; |
| reg soclinux_sdram_bankmachine15_cmd_payload_is_read = 1'd0; |
| reg soclinux_sdram_bankmachine15_cmd_payload_is_write = 1'd0; |
| reg soclinux_sdram_bankmachine15_auto_precharge = 1'd0; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_valid; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_ready; |
| reg soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_first = 1'd0; |
| reg soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_last = 1'd0; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_payload_addr; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_valid; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_ready; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_first; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_last; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_payload_addr; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_we; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_writable; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_re; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_readable; |
| wire [24:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_din; |
| wire [24:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_dout; |
| reg [3:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_level = 4'd0; |
| reg soclinux_sdram_bankmachine15_cmd_buffer_lookahead_replace = 1'd0; |
| reg [2:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_produce = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_consume = 3'd0; |
| reg [2:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_adr = 3'd0; |
| wire [24:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_dat_r; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_we; |
| wire [24:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_dat_w; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_do_read; |
| wire [2:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_rdport_adr; |
| wire [24:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_rdport_dat_r; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_in_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_in_payload_addr; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_in_first; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_in_last; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_out_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_out_payload_addr; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_out_first; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_out_last; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_sink_valid; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_sink_ready; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_sink_first; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_sink_last; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_sink_payload_we; |
| wire [21:0] soclinux_sdram_bankmachine15_cmd_buffer_sink_payload_addr; |
| reg soclinux_sdram_bankmachine15_cmd_buffer_source_valid = 1'd0; |
| wire soclinux_sdram_bankmachine15_cmd_buffer_source_ready; |
| reg soclinux_sdram_bankmachine15_cmd_buffer_source_first = 1'd0; |
| reg soclinux_sdram_bankmachine15_cmd_buffer_source_last = 1'd0; |
| reg soclinux_sdram_bankmachine15_cmd_buffer_source_payload_we = 1'd0; |
| reg [21:0] soclinux_sdram_bankmachine15_cmd_buffer_source_payload_addr = 22'd0; |
| reg [14:0] soclinux_sdram_bankmachine15_row = 15'd0; |
| reg soclinux_sdram_bankmachine15_row_opened = 1'd0; |
| wire soclinux_sdram_bankmachine15_row_hit; |
| reg soclinux_sdram_bankmachine15_row_open = 1'd0; |
| reg soclinux_sdram_bankmachine15_row_close = 1'd0; |
| reg soclinux_sdram_bankmachine15_row_col_n_addr_sel = 1'd0; |
| wire soclinux_sdram_bankmachine15_twtpcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine15_twtpcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine15_twtpcon_count = 3'd0; |
| wire soclinux_sdram_bankmachine15_trccon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine15_trccon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine15_trccon_count = 3'd0; |
| wire soclinux_sdram_bankmachine15_trascon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_bankmachine15_trascon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_bankmachine15_trascon_count = 3'd0; |
| wire soclinux_sdram_ras_allowed; |
| wire soclinux_sdram_cas_allowed; |
| reg soclinux_sdram_choose_cmd_want_reads = 1'd0; |
| reg soclinux_sdram_choose_cmd_want_writes = 1'd0; |
| reg soclinux_sdram_choose_cmd_want_cmds = 1'd0; |
| reg soclinux_sdram_choose_cmd_want_activates = 1'd0; |
| wire soclinux_sdram_choose_cmd_cmd_valid; |
| reg soclinux_sdram_choose_cmd_cmd_ready = 1'd0; |
| wire [14:0] soclinux_sdram_choose_cmd_cmd_payload_a; |
| wire [3:0] soclinux_sdram_choose_cmd_cmd_payload_ba; |
| reg soclinux_sdram_choose_cmd_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_choose_cmd_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_choose_cmd_cmd_payload_we = 1'd0; |
| wire soclinux_sdram_choose_cmd_cmd_payload_is_cmd; |
| wire soclinux_sdram_choose_cmd_cmd_payload_is_read; |
| wire soclinux_sdram_choose_cmd_cmd_payload_is_write; |
| reg [15:0] soclinux_sdram_choose_cmd_valids = 16'd0; |
| wire [15:0] soclinux_sdram_choose_cmd_request; |
| reg [3:0] soclinux_sdram_choose_cmd_grant = 4'd0; |
| wire soclinux_sdram_choose_cmd_ce; |
| reg soclinux_sdram_choose_req_want_reads = 1'd0; |
| reg soclinux_sdram_choose_req_want_writes = 1'd0; |
| reg soclinux_sdram_choose_req_want_cmds = 1'd0; |
| reg soclinux_sdram_choose_req_want_activates = 1'd0; |
| wire soclinux_sdram_choose_req_cmd_valid; |
| reg soclinux_sdram_choose_req_cmd_ready = 1'd0; |
| wire [14:0] soclinux_sdram_choose_req_cmd_payload_a; |
| wire [3:0] soclinux_sdram_choose_req_cmd_payload_ba; |
| reg soclinux_sdram_choose_req_cmd_payload_cas = 1'd0; |
| reg soclinux_sdram_choose_req_cmd_payload_ras = 1'd0; |
| reg soclinux_sdram_choose_req_cmd_payload_we = 1'd0; |
| wire soclinux_sdram_choose_req_cmd_payload_is_cmd; |
| wire soclinux_sdram_choose_req_cmd_payload_is_read; |
| wire soclinux_sdram_choose_req_cmd_payload_is_write; |
| reg [15:0] soclinux_sdram_choose_req_valids = 16'd0; |
| wire [15:0] soclinux_sdram_choose_req_request; |
| reg [3:0] soclinux_sdram_choose_req_grant = 4'd0; |
| wire soclinux_sdram_choose_req_ce; |
| reg [14:0] soclinux_sdram_nop_a = 15'd0; |
| reg [3:0] soclinux_sdram_nop_ba = 4'd0; |
| reg [1:0] soclinux_sdram_steerer_sel0 = 2'd0; |
| reg [1:0] soclinux_sdram_steerer_sel1 = 2'd0; |
| reg [1:0] soclinux_sdram_steerer_sel2 = 2'd0; |
| reg [1:0] soclinux_sdram_steerer_sel3 = 2'd0; |
| reg soclinux_sdram_steerer0 = 1'd1; |
| reg soclinux_sdram_steerer1 = 1'd1; |
| reg soclinux_sdram_steerer2 = 1'd1; |
| reg soclinux_sdram_steerer3 = 1'd1; |
| reg soclinux_sdram_steerer4 = 1'd1; |
| reg soclinux_sdram_steerer5 = 1'd1; |
| reg soclinux_sdram_steerer6 = 1'd1; |
| reg soclinux_sdram_steerer7 = 1'd1; |
| wire soclinux_sdram_trrdcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_trrdcon_ready = 1'd1; |
| reg soclinux_sdram_trrdcon_count = 1'd0; |
| wire soclinux_sdram_tfawcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_tfawcon_ready = 1'd1; |
| wire [2:0] soclinux_sdram_tfawcon_count; |
| reg [4:0] soclinux_sdram_tfawcon_window = 5'd0; |
| wire soclinux_sdram_tccdcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_tccdcon_ready = 1'd1; |
| reg soclinux_sdram_tccdcon_count = 1'd0; |
| wire soclinux_sdram_twtrcon_valid; |
| (* dont_touch = "true" *) reg soclinux_sdram_twtrcon_ready = 1'd1; |
| reg [2:0] soclinux_sdram_twtrcon_count = 3'd0; |
| wire soclinux_sdram_read_available; |
| wire soclinux_sdram_write_available; |
| reg soclinux_sdram_en0 = 1'd0; |
| wire soclinux_sdram_max_time0; |
| reg [4:0] soclinux_sdram_time0 = 5'd0; |
| reg soclinux_sdram_en1 = 1'd0; |
| wire soclinux_sdram_max_time1; |
| reg [3:0] soclinux_sdram_time1 = 4'd0; |
| wire soclinux_sdram_go_to_refresh; |
| reg soclinux_port_cmd_valid = 1'd0; |
| wire soclinux_port_cmd_ready; |
| reg soclinux_port_cmd_payload_we = 1'd0; |
| reg [25:0] soclinux_port_cmd_payload_addr = 26'd0; |
| wire soclinux_port_wdata_valid; |
| wire soclinux_port_wdata_ready; |
| wire soclinux_port_wdata_first; |
| wire soclinux_port_wdata_last; |
| wire [255:0] soclinux_port_wdata_payload_data; |
| wire [31:0] soclinux_port_wdata_payload_we; |
| wire soclinux_port_rdata_valid; |
| wire soclinux_port_rdata_ready; |
| reg soclinux_port_rdata_first = 1'd0; |
| reg soclinux_port_rdata_last = 1'd0; |
| wire [255:0] soclinux_port_rdata_payload_data; |
| wire [29:0] soclinux_wb_sdram_adr; |
| wire [31:0] soclinux_wb_sdram_dat_w; |
| reg [31:0] soclinux_wb_sdram_dat_r = 32'd0; |
| wire [3:0] soclinux_wb_sdram_sel; |
| wire soclinux_wb_sdram_cyc; |
| wire soclinux_wb_sdram_stb; |
| reg soclinux_wb_sdram_ack = 1'd0; |
| wire soclinux_wb_sdram_we; |
| wire [2:0] soclinux_wb_sdram_cti; |
| wire [1:0] soclinux_wb_sdram_bte; |
| reg soclinux_wb_sdram_err = 1'd0; |
| wire [29:0] soclinux_adr; |
| wire [255:0] soclinux_dat_w; |
| wire [255:0] soclinux_dat_r; |
| wire [31:0] soclinux_sel; |
| reg soclinux_cyc = 1'd0; |
| reg soclinux_stb = 1'd0; |
| reg soclinux_ack = 1'd0; |
| reg soclinux_we = 1'd0; |
| wire [7:0] soclinux_data_port_adr; |
| wire [255:0] soclinux_data_port_dat_r; |
| reg [31:0] soclinux_data_port_we = 32'd0; |
| reg [255:0] soclinux_data_port_dat_w = 256'd0; |
| reg soclinux_write_from_slave = 1'd0; |
| reg [2:0] soclinux_adr_offset_r = 3'd0; |
| wire [7:0] soclinux_tag_port_adr; |
| wire [25:0] soclinux_tag_port_dat_r; |
| reg soclinux_tag_port_we = 1'd0; |
| wire [25:0] soclinux_tag_port_dat_w; |
| wire [24:0] soclinux_tag_do_tag; |
| wire soclinux_tag_do_dirty; |
| wire [24:0] soclinux_tag_di_tag; |
| reg soclinux_tag_di_dirty = 1'd0; |
| reg soclinux_word_clr = 1'd0; |
| reg soclinux_word_inc = 1'd0; |
| wire soclinux_wdata_converter_sink_valid; |
| wire soclinux_wdata_converter_sink_ready; |
| reg soclinux_wdata_converter_sink_first = 1'd0; |
| reg soclinux_wdata_converter_sink_last = 1'd0; |
| wire [255:0] soclinux_wdata_converter_sink_payload_data; |
| wire [31:0] soclinux_wdata_converter_sink_payload_we; |
| wire soclinux_wdata_converter_source_valid; |
| wire soclinux_wdata_converter_source_ready; |
| wire soclinux_wdata_converter_source_first; |
| wire soclinux_wdata_converter_source_last; |
| wire [255:0] soclinux_wdata_converter_source_payload_data; |
| wire [31:0] soclinux_wdata_converter_source_payload_we; |
| wire soclinux_wdata_converter_converter_sink_valid; |
| wire soclinux_wdata_converter_converter_sink_ready; |
| wire soclinux_wdata_converter_converter_sink_first; |
| wire soclinux_wdata_converter_converter_sink_last; |
| wire [287:0] soclinux_wdata_converter_converter_sink_payload_data; |
| wire soclinux_wdata_converter_converter_source_valid; |
| wire soclinux_wdata_converter_converter_source_ready; |
| wire soclinux_wdata_converter_converter_source_first; |
| wire soclinux_wdata_converter_converter_source_last; |
| wire [287:0] soclinux_wdata_converter_converter_source_payload_data; |
| wire soclinux_wdata_converter_converter_source_payload_valid_token_count; |
| wire soclinux_wdata_converter_source_source_valid; |
| wire soclinux_wdata_converter_source_source_ready; |
| wire soclinux_wdata_converter_source_source_first; |
| wire soclinux_wdata_converter_source_source_last; |
| wire [287:0] soclinux_wdata_converter_source_source_payload_data; |
| wire soclinux_rdata_converter_sink_valid; |
| wire soclinux_rdata_converter_sink_ready; |
| wire soclinux_rdata_converter_sink_first; |
| wire soclinux_rdata_converter_sink_last; |
| wire [255:0] soclinux_rdata_converter_sink_payload_data; |
| wire soclinux_rdata_converter_source_valid; |
| wire soclinux_rdata_converter_source_ready; |
| wire soclinux_rdata_converter_source_first; |
| wire soclinux_rdata_converter_source_last; |
| wire [255:0] soclinux_rdata_converter_source_payload_data; |
| wire soclinux_rdata_converter_converter_sink_valid; |
| wire soclinux_rdata_converter_converter_sink_ready; |
| wire soclinux_rdata_converter_converter_sink_first; |
| wire soclinux_rdata_converter_converter_sink_last; |
| wire [255:0] soclinux_rdata_converter_converter_sink_payload_data; |
| wire soclinux_rdata_converter_converter_source_valid; |
| wire soclinux_rdata_converter_converter_source_ready; |
| wire soclinux_rdata_converter_converter_source_first; |
| wire soclinux_rdata_converter_converter_source_last; |
| wire [255:0] soclinux_rdata_converter_converter_source_payload_data; |
| wire soclinux_rdata_converter_converter_source_payload_valid_token_count; |
| wire soclinux_rdata_converter_source_source_valid; |
| wire soclinux_rdata_converter_source_source_ready; |
| wire soclinux_rdata_converter_source_source_first; |
| wire soclinux_rdata_converter_source_source_last; |
| wire [255:0] soclinux_rdata_converter_source_source_payload_data; |
| reg soclinux_count = 1'd0; |
| wire [29:0] emulator_ram_bus_adr; |
| wire [31:0] emulator_ram_bus_dat_w; |
| wire [31:0] emulator_ram_bus_dat_r; |
| wire [3:0] emulator_ram_bus_sel; |
| wire emulator_ram_bus_cyc; |
| wire emulator_ram_bus_stb; |
| reg emulator_ram_bus_ack = 1'd0; |
| wire emulator_ram_bus_we; |
| wire [2:0] emulator_ram_bus_cti; |
| wire [1:0] emulator_ram_bus_bte; |
| reg emulator_ram_bus_err = 1'd0; |
| wire [11:0] emulator_ram_adr; |
| wire [31:0] emulator_ram_dat_r; |
| reg [3:0] emulator_ram_we = 4'd0; |
| wire [31:0] emulator_ram_dat_w; |
| reg wb2csr_state = 1'd0; |
| reg wb2csr_next_state = 1'd0; |
| wire mmcm_fb; |
| reg [1:0] refresher_state = 2'd0; |
| reg [1:0] refresher_next_state = 2'd0; |
| reg [3:0] bankmachine0_state = 4'd0; |
| reg [3:0] bankmachine0_next_state = 4'd0; |
| reg [3:0] bankmachine1_state = 4'd0; |
| reg [3:0] bankmachine1_next_state = 4'd0; |
| reg [3:0] bankmachine2_state = 4'd0; |
| reg [3:0] bankmachine2_next_state = 4'd0; |
| reg [3:0] bankmachine3_state = 4'd0; |
| reg [3:0] bankmachine3_next_state = 4'd0; |
| reg [3:0] bankmachine4_state = 4'd0; |
| reg [3:0] bankmachine4_next_state = 4'd0; |
| reg [3:0] bankmachine5_state = 4'd0; |
| reg [3:0] bankmachine5_next_state = 4'd0; |
| reg [3:0] bankmachine6_state = 4'd0; |
| reg [3:0] bankmachine6_next_state = 4'd0; |
| reg [3:0] bankmachine7_state = 4'd0; |
| reg [3:0] bankmachine7_next_state = 4'd0; |
| reg [3:0] bankmachine8_state = 4'd0; |
| reg [3:0] bankmachine8_next_state = 4'd0; |
| reg [3:0] bankmachine9_state = 4'd0; |
| reg [3:0] bankmachine9_next_state = 4'd0; |
| reg [3:0] bankmachine10_state = 4'd0; |
| reg [3:0] bankmachine10_next_state = 4'd0; |
| reg [3:0] bankmachine11_state = 4'd0; |
| reg [3:0] bankmachine11_next_state = 4'd0; |
| reg [3:0] bankmachine12_state = 4'd0; |
| reg [3:0] bankmachine12_next_state = 4'd0; |
| reg [3:0] bankmachine13_state = 4'd0; |
| reg [3:0] bankmachine13_next_state = 4'd0; |
| reg [3:0] bankmachine14_state = 4'd0; |
| reg [3:0] bankmachine14_next_state = 4'd0; |
| reg [3:0] bankmachine15_state = 4'd0; |
| reg [3:0] bankmachine15_next_state = 4'd0; |
| reg [3:0] multiplexer_state = 4'd0; |
| reg [3:0] multiplexer_next_state = 4'd0; |
| wire roundrobin0_request; |
| wire roundrobin0_grant; |
| wire roundrobin0_ce; |
| wire roundrobin1_request; |
| wire roundrobin1_grant; |
| wire roundrobin1_ce; |
| wire roundrobin2_request; |
| wire roundrobin2_grant; |
| wire roundrobin2_ce; |
| wire roundrobin3_request; |
| wire roundrobin3_grant; |
| wire roundrobin3_ce; |
| wire roundrobin4_request; |
| wire roundrobin4_grant; |
| wire roundrobin4_ce; |
| wire roundrobin5_request; |
| wire roundrobin5_grant; |
| wire roundrobin5_ce; |
| wire roundrobin6_request; |
| wire roundrobin6_grant; |
| wire roundrobin6_ce; |
| wire roundrobin7_request; |
| wire roundrobin7_grant; |
| wire roundrobin7_ce; |
| wire roundrobin8_request; |
| wire roundrobin8_grant; |
| wire roundrobin8_ce; |
| wire roundrobin9_request; |
| wire roundrobin9_grant; |
| wire roundrobin9_ce; |
| wire roundrobin10_request; |
| wire roundrobin10_grant; |
| wire roundrobin10_ce; |
| wire roundrobin11_request; |
| wire roundrobin11_grant; |
| wire roundrobin11_ce; |
| wire roundrobin12_request; |
| wire roundrobin12_grant; |
| wire roundrobin12_ce; |
| wire roundrobin13_request; |
| wire roundrobin13_grant; |
| wire roundrobin13_ce; |
| wire roundrobin14_request; |
| wire roundrobin14_grant; |
| wire roundrobin14_ce; |
| wire roundrobin15_request; |
| wire roundrobin15_grant; |
| wire roundrobin15_ce; |
| reg [3:0] rbank = 4'd0; |
| reg [3:0] wbank = 4'd0; |
| reg locked0 = 1'd0; |
| reg locked1 = 1'd0; |
| reg locked2 = 1'd0; |
| reg locked3 = 1'd0; |
| reg locked4 = 1'd0; |
| reg locked5 = 1'd0; |
| reg locked6 = 1'd0; |
| reg locked7 = 1'd0; |
| reg locked8 = 1'd0; |
| reg locked9 = 1'd0; |
| reg locked10 = 1'd0; |
| reg locked11 = 1'd0; |
| reg locked12 = 1'd0; |
| reg locked13 = 1'd0; |
| reg locked14 = 1'd0; |
| reg locked15 = 1'd0; |
| reg new_master_wdata_ready0 = 1'd0; |
| reg new_master_wdata_ready1 = 1'd0; |
| reg new_master_wdata_ready2 = 1'd0; |
| reg new_master_wdata_ready3 = 1'd0; |
| reg new_master_rdata_valid0 = 1'd0; |
| reg new_master_rdata_valid1 = 1'd0; |
| reg new_master_rdata_valid2 = 1'd0; |
| reg new_master_rdata_valid3 = 1'd0; |
| reg new_master_rdata_valid4 = 1'd0; |
| reg new_master_rdata_valid5 = 1'd0; |
| reg new_master_rdata_valid6 = 1'd0; |
| reg new_master_rdata_valid7 = 1'd0; |
| reg new_master_rdata_valid8 = 1'd0; |
| reg [1:0] fullmemorywe_state = 2'd0; |
| reg [1:0] fullmemorywe_next_state = 2'd0; |
| reg [1:0] litedramwishbone2native_state = 2'd0; |
| reg [1:0] litedramwishbone2native_next_state = 2'd0; |
| reg soclinux_count_next_value = 1'd0; |
| reg soclinux_count_next_value_ce = 1'd0; |
| wire [29:0] shared_adr; |
| wire [31:0] shared_dat_w; |
| reg [31:0] shared_dat_r = 32'd0; |
| wire [3:0] shared_sel; |
| wire shared_cyc; |
| wire shared_stb; |
| reg shared_ack = 1'd0; |
| wire shared_we; |
| wire [2:0] shared_cti; |
| wire [1:0] shared_bte; |
| wire shared_err; |
| wire [1:0] request; |
| reg grant = 1'd0; |
| reg [4:0] slave_sel = 5'd0; |
| reg [4:0] slave_sel_r = 5'd0; |
| reg error = 1'd0; |
| wire wait_1; |
| wire done; |
| reg [19:0] count = 20'd1000000; |
| wire [13:0] interface0_bank_bus_adr; |
| wire interface0_bank_bus_we; |
| wire [7:0] interface0_bank_bus_dat_w; |
| reg [7:0] interface0_bank_bus_dat_r = 8'd0; |
| wire csrbank0_timer_time7_re; |
| wire [7:0] csrbank0_timer_time7_r; |
| wire csrbank0_timer_time7_we; |
| wire [7:0] csrbank0_timer_time7_w; |
| wire csrbank0_timer_time6_re; |
| wire [7:0] csrbank0_timer_time6_r; |
| wire csrbank0_timer_time6_we; |
| wire [7:0] csrbank0_timer_time6_w; |
| wire csrbank0_timer_time5_re; |
| wire [7:0] csrbank0_timer_time5_r; |
| wire csrbank0_timer_time5_we; |
| wire [7:0] csrbank0_timer_time5_w; |
| wire csrbank0_timer_time4_re; |
| wire [7:0] csrbank0_timer_time4_r; |
| wire csrbank0_timer_time4_we; |
| wire [7:0] csrbank0_timer_time4_w; |
| wire csrbank0_timer_time3_re; |
| wire [7:0] csrbank0_timer_time3_r; |
| wire csrbank0_timer_time3_we; |
| wire [7:0] csrbank0_timer_time3_w; |
| wire csrbank0_timer_time2_re; |
| wire [7:0] csrbank0_timer_time2_r; |
| wire csrbank0_timer_time2_we; |
| wire [7:0] csrbank0_timer_time2_w; |
| wire csrbank0_timer_time1_re; |
| wire [7:0] csrbank0_timer_time1_r; |
| wire csrbank0_timer_time1_we; |
| wire [7:0] csrbank0_timer_time1_w; |
| wire csrbank0_timer_time0_re; |
| wire [7:0] csrbank0_timer_time0_r; |
| wire csrbank0_timer_time0_we; |
| wire [7:0] csrbank0_timer_time0_w; |
| wire csrbank0_timer_time_cmp7_re; |
| wire [7:0] csrbank0_timer_time_cmp7_r; |
| wire csrbank0_timer_time_cmp7_we; |
| wire [7:0] csrbank0_timer_time_cmp7_w; |
| wire csrbank0_timer_time_cmp6_re; |
| wire [7:0] csrbank0_timer_time_cmp6_r; |
| wire csrbank0_timer_time_cmp6_we; |
| wire [7:0] csrbank0_timer_time_cmp6_w; |
| wire csrbank0_timer_time_cmp5_re; |
| wire [7:0] csrbank0_timer_time_cmp5_r; |
| wire csrbank0_timer_time_cmp5_we; |
| wire [7:0] csrbank0_timer_time_cmp5_w; |
| wire csrbank0_timer_time_cmp4_re; |
| wire [7:0] csrbank0_timer_time_cmp4_r; |
| wire csrbank0_timer_time_cmp4_we; |
| wire [7:0] csrbank0_timer_time_cmp4_w; |
| wire csrbank0_timer_time_cmp3_re; |
| wire [7:0] csrbank0_timer_time_cmp3_r; |
| wire csrbank0_timer_time_cmp3_we; |
| wire [7:0] csrbank0_timer_time_cmp3_w; |
| wire csrbank0_timer_time_cmp2_re; |
| wire [7:0] csrbank0_timer_time_cmp2_r; |
| wire csrbank0_timer_time_cmp2_we; |
| wire [7:0] csrbank0_timer_time_cmp2_w; |
| wire csrbank0_timer_time_cmp1_re; |
| wire [7:0] csrbank0_timer_time_cmp1_r; |
| wire csrbank0_timer_time_cmp1_we; |
| wire [7:0] csrbank0_timer_time_cmp1_w; |
| wire csrbank0_timer_time_cmp0_re; |
| wire [7:0] csrbank0_timer_time_cmp0_r; |
| wire csrbank0_timer_time_cmp0_we; |
| wire [7:0] csrbank0_timer_time_cmp0_w; |
| wire csrbank0_sel; |
| wire [13:0] interface1_bank_bus_adr; |
| wire interface1_bank_bus_we; |
| wire [7:0] interface1_bank_bus_dat_w; |
| reg [7:0] interface1_bank_bus_dat_r = 8'd0; |
| wire csrbank1_reset0_re; |
| wire csrbank1_reset0_r; |
| wire csrbank1_reset0_we; |
| wire csrbank1_reset0_w; |
| wire csrbank1_scratch3_re; |
| wire [7:0] csrbank1_scratch3_r; |
| wire csrbank1_scratch3_we; |
| wire [7:0] csrbank1_scratch3_w; |
| wire csrbank1_scratch2_re; |
| wire [7:0] csrbank1_scratch2_r; |
| wire csrbank1_scratch2_we; |
| wire [7:0] csrbank1_scratch2_w; |
| wire csrbank1_scratch1_re; |
| wire [7:0] csrbank1_scratch1_r; |
| wire csrbank1_scratch1_we; |
| wire [7:0] csrbank1_scratch1_w; |
| wire csrbank1_scratch0_re; |
| wire [7:0] csrbank1_scratch0_r; |
| wire csrbank1_scratch0_we; |
| wire [7:0] csrbank1_scratch0_w; |
| wire csrbank1_bus_errors3_re; |
| wire [7:0] csrbank1_bus_errors3_r; |
| wire csrbank1_bus_errors3_we; |
| wire [7:0] csrbank1_bus_errors3_w; |
| wire csrbank1_bus_errors2_re; |
| wire [7:0] csrbank1_bus_errors2_r; |
| wire csrbank1_bus_errors2_we; |
| wire [7:0] csrbank1_bus_errors2_w; |
| wire csrbank1_bus_errors1_re; |
| wire [7:0] csrbank1_bus_errors1_r; |
| wire csrbank1_bus_errors1_we; |
| wire [7:0] csrbank1_bus_errors1_w; |
| wire csrbank1_bus_errors0_re; |
| wire [7:0] csrbank1_bus_errors0_r; |
| wire csrbank1_bus_errors0_we; |
| wire [7:0] csrbank1_bus_errors0_w; |
| wire csrbank1_sel; |
| wire [13:0] interface2_bank_bus_adr; |
| wire interface2_bank_bus_we; |
| wire [7:0] interface2_bank_bus_dat_w; |
| reg [7:0] interface2_bank_bus_dat_r = 8'd0; |
| wire csrbank2_en_vtc0_re; |
| wire csrbank2_en_vtc0_r; |
| wire csrbank2_en_vtc0_we; |
| wire csrbank2_en_vtc0_w; |
| wire csrbank2_half_sys8x_taps1_re; |
| wire csrbank2_half_sys8x_taps1_r; |
| wire csrbank2_half_sys8x_taps1_we; |
| wire csrbank2_half_sys8x_taps1_w; |
| wire csrbank2_half_sys8x_taps0_re; |
| wire [7:0] csrbank2_half_sys8x_taps0_r; |
| wire csrbank2_half_sys8x_taps0_we; |
| wire [7:0] csrbank2_half_sys8x_taps0_w; |
| wire csrbank2_wlevel_en0_re; |
| wire csrbank2_wlevel_en0_r; |
| wire csrbank2_wlevel_en0_we; |
| wire csrbank2_wlevel_en0_w; |
| wire csrbank2_dly_sel0_re; |
| wire [3:0] csrbank2_dly_sel0_r; |
| wire csrbank2_dly_sel0_we; |
| wire [3:0] csrbank2_dly_sel0_w; |
| wire csrbank2_sel; |
| wire [13:0] interface3_bank_bus_adr; |
| wire interface3_bank_bus_we; |
| wire [7:0] interface3_bank_bus_dat_w; |
| reg [7:0] interface3_bank_bus_dat_r = 8'd0; |
| wire csrbank3_dfii_control0_re; |
| wire [3:0] csrbank3_dfii_control0_r; |
| wire csrbank3_dfii_control0_we; |
| wire [3:0] csrbank3_dfii_control0_w; |
| wire csrbank3_dfii_pi0_command0_re; |
| wire [5:0] csrbank3_dfii_pi0_command0_r; |
| wire csrbank3_dfii_pi0_command0_we; |
| wire [5:0] csrbank3_dfii_pi0_command0_w; |
| wire csrbank3_dfii_pi0_address1_re; |
| wire [6:0] csrbank3_dfii_pi0_address1_r; |
| wire csrbank3_dfii_pi0_address1_we; |
| wire [6:0] csrbank3_dfii_pi0_address1_w; |
| wire csrbank3_dfii_pi0_address0_re; |
| wire [7:0] csrbank3_dfii_pi0_address0_r; |
| wire csrbank3_dfii_pi0_address0_we; |
| wire [7:0] csrbank3_dfii_pi0_address0_w; |
| wire csrbank3_dfii_pi0_baddress0_re; |
| wire [3:0] csrbank3_dfii_pi0_baddress0_r; |
| wire csrbank3_dfii_pi0_baddress0_we; |
| wire [3:0] csrbank3_dfii_pi0_baddress0_w; |
| wire csrbank3_dfii_pi0_wrdata7_re; |
| wire [7:0] csrbank3_dfii_pi0_wrdata7_r; |
| wire csrbank3_dfii_pi0_wrdata7_we; |
| wire [7:0] csrbank3_dfii_pi0_wrdata7_w; |
| wire csrbank3_dfii_pi0_wrdata6_re; |
| wire [7:0] csrbank3_dfii_pi0_wrdata6_r; |
| wire csrbank3_dfii_pi0_wrdata6_we; |
| wire [7:0] csrbank3_dfii_pi0_wrdata6_w; |
| wire csrbank3_dfii_pi0_wrdata5_re; |
| wire [7:0] csrbank3_dfii_pi0_wrdata5_r; |
| wire csrbank3_dfii_pi0_wrdata5_we; |
| wire [7:0] csrbank3_dfii_pi0_wrdata5_w; |
| wire csrbank3_dfii_pi0_wrdata4_re; |
| wire [7:0] csrbank3_dfii_pi0_wrdata4_r; |
| wire csrbank3_dfii_pi0_wrdata4_we; |
| wire [7:0] csrbank3_dfii_pi0_wrdata4_w; |
| wire csrbank3_dfii_pi0_wrdata3_re; |
| wire [7:0] csrbank3_dfii_pi0_wrdata3_r; |
| wire csrbank3_dfii_pi0_wrdata3_we; |
| wire [7:0] csrbank3_dfii_pi0_wrdata3_w; |
| wire csrbank3_dfii_pi0_wrdata2_re; |
| wire [7:0] csrbank3_dfii_pi0_wrdata2_r; |
| wire csrbank3_dfii_pi0_wrdata2_we; |
| wire [7:0] csrbank3_dfii_pi0_wrdata2_w; |
| wire csrbank3_dfii_pi0_wrdata1_re; |
| wire [7:0] csrbank3_dfii_pi0_wrdata1_r; |
| wire csrbank3_dfii_pi0_wrdata1_we; |
| wire [7:0] csrbank3_dfii_pi0_wrdata1_w; |
| wire csrbank3_dfii_pi0_wrdata0_re; |
| wire [7:0] csrbank3_dfii_pi0_wrdata0_r; |
| wire csrbank3_dfii_pi0_wrdata0_we; |
| wire [7:0] csrbank3_dfii_pi0_wrdata0_w; |
| wire csrbank3_dfii_pi0_rddata7_re; |
| wire [7:0] csrbank3_dfii_pi0_rddata7_r; |
| wire csrbank3_dfii_pi0_rddata7_we; |
| wire [7:0] csrbank3_dfii_pi0_rddata7_w; |
| wire csrbank3_dfii_pi0_rddata6_re; |
| wire [7:0] csrbank3_dfii_pi0_rddata6_r; |
| wire csrbank3_dfii_pi0_rddata6_we; |
| wire [7:0] csrbank3_dfii_pi0_rddata6_w; |
| wire csrbank3_dfii_pi0_rddata5_re; |
| wire [7:0] csrbank3_dfii_pi0_rddata5_r; |
| wire csrbank3_dfii_pi0_rddata5_we; |
| wire [7:0] csrbank3_dfii_pi0_rddata5_w; |
| wire csrbank3_dfii_pi0_rddata4_re; |
| wire [7:0] csrbank3_dfii_pi0_rddata4_r; |
| wire csrbank3_dfii_pi0_rddata4_we; |
| wire [7:0] csrbank3_dfii_pi0_rddata4_w; |
| wire csrbank3_dfii_pi0_rddata3_re; |
| wire [7:0] csrbank3_dfii_pi0_rddata3_r; |
| wire csrbank3_dfii_pi0_rddata3_we; |
| wire [7:0] csrbank3_dfii_pi0_rddata3_w; |
| wire csrbank3_dfii_pi0_rddata2_re; |
| wire [7:0] csrbank3_dfii_pi0_rddata2_r; |
| wire csrbank3_dfii_pi0_rddata2_we; |
| wire [7:0] csrbank3_dfii_pi0_rddata2_w; |
| wire csrbank3_dfii_pi0_rddata1_re; |
| wire [7:0] csrbank3_dfii_pi0_rddata1_r; |
| wire csrbank3_dfii_pi0_rddata1_we; |
| wire [7:0] csrbank3_dfii_pi0_rddata1_w; |
| wire csrbank3_dfii_pi0_rddata0_re; |
| wire [7:0] csrbank3_dfii_pi0_rddata0_r; |
| wire csrbank3_dfii_pi0_rddata0_we; |
| wire [7:0] csrbank3_dfii_pi0_rddata0_w; |
| wire csrbank3_dfii_pi1_command0_re; |
| wire [5:0] csrbank3_dfii_pi1_command0_r; |
| wire csrbank3_dfii_pi1_command0_we; |
| wire [5:0] csrbank3_dfii_pi1_command0_w; |
| wire csrbank3_dfii_pi1_address1_re; |
| wire [6:0] csrbank3_dfii_pi1_address1_r; |
| wire csrbank3_dfii_pi1_address1_we; |
| wire [6:0] csrbank3_dfii_pi1_address1_w; |
| wire csrbank3_dfii_pi1_address0_re; |
| wire [7:0] csrbank3_dfii_pi1_address0_r; |
| wire csrbank3_dfii_pi1_address0_we; |
| wire [7:0] csrbank3_dfii_pi1_address0_w; |
| wire csrbank3_dfii_pi1_baddress0_re; |
| wire [3:0] csrbank3_dfii_pi1_baddress0_r; |
| wire csrbank3_dfii_pi1_baddress0_we; |
| wire [3:0] csrbank3_dfii_pi1_baddress0_w; |
| wire csrbank3_dfii_pi1_wrdata7_re; |
| wire [7:0] csrbank3_dfii_pi1_wrdata7_r; |
| wire csrbank3_dfii_pi1_wrdata7_we; |
| wire [7:0] csrbank3_dfii_pi1_wrdata7_w; |
| wire csrbank3_dfii_pi1_wrdata6_re; |
| wire [7:0] csrbank3_dfii_pi1_wrdata6_r; |
| wire csrbank3_dfii_pi1_wrdata6_we; |
| wire [7:0] csrbank3_dfii_pi1_wrdata6_w; |
| wire csrbank3_dfii_pi1_wrdata5_re; |
| wire [7:0] csrbank3_dfii_pi1_wrdata5_r; |
| wire csrbank3_dfii_pi1_wrdata5_we; |
| wire [7:0] csrbank3_dfii_pi1_wrdata5_w; |
| wire csrbank3_dfii_pi1_wrdata4_re; |
| wire [7:0] csrbank3_dfii_pi1_wrdata4_r; |
| wire csrbank3_dfii_pi1_wrdata4_we; |
| wire [7:0] csrbank3_dfii_pi1_wrdata4_w; |
| wire csrbank3_dfii_pi1_wrdata3_re; |
| wire [7:0] csrbank3_dfii_pi1_wrdata3_r; |
| wire csrbank3_dfii_pi1_wrdata3_we; |
| wire [7:0] csrbank3_dfii_pi1_wrdata3_w; |
| wire csrbank3_dfii_pi1_wrdata2_re; |
| wire [7:0] csrbank3_dfii_pi1_wrdata2_r; |
| wire csrbank3_dfii_pi1_wrdata2_we; |
| wire [7:0] csrbank3_dfii_pi1_wrdata2_w; |
| wire csrbank3_dfii_pi1_wrdata1_re; |
| wire [7:0] csrbank3_dfii_pi1_wrdata1_r; |
| wire csrbank3_dfii_pi1_wrdata1_we; |
| wire [7:0] csrbank3_dfii_pi1_wrdata1_w; |
| wire csrbank3_dfii_pi1_wrdata0_re; |
| wire [7:0] csrbank3_dfii_pi1_wrdata0_r; |
| wire csrbank3_dfii_pi1_wrdata0_we; |
| wire [7:0] csrbank3_dfii_pi1_wrdata0_w; |
| wire csrbank3_dfii_pi1_rddata7_re; |
| wire [7:0] csrbank3_dfii_pi1_rddata7_r; |
| wire csrbank3_dfii_pi1_rddata7_we; |
| wire [7:0] csrbank3_dfii_pi1_rddata7_w; |
| wire csrbank3_dfii_pi1_rddata6_re; |
| wire [7:0] csrbank3_dfii_pi1_rddata6_r; |
| wire csrbank3_dfii_pi1_rddata6_we; |
| wire [7:0] csrbank3_dfii_pi1_rddata6_w; |
| wire csrbank3_dfii_pi1_rddata5_re; |
| wire [7:0] csrbank3_dfii_pi1_rddata5_r; |
| wire csrbank3_dfii_pi1_rddata5_we; |
| wire [7:0] csrbank3_dfii_pi1_rddata5_w; |
| wire csrbank3_dfii_pi1_rddata4_re; |
| wire [7:0] csrbank3_dfii_pi1_rddata4_r; |
| wire csrbank3_dfii_pi1_rddata4_we; |
| wire [7:0] csrbank3_dfii_pi1_rddata4_w; |
| wire csrbank3_dfii_pi1_rddata3_re; |
| wire [7:0] csrbank3_dfii_pi1_rddata3_r; |
| wire csrbank3_dfii_pi1_rddata3_we; |
| wire [7:0] csrbank3_dfii_pi1_rddata3_w; |
| wire csrbank3_dfii_pi1_rddata2_re; |
| wire [7:0] csrbank3_dfii_pi1_rddata2_r; |
| wire csrbank3_dfii_pi1_rddata2_we; |
| wire [7:0] csrbank3_dfii_pi1_rddata2_w; |
| wire csrbank3_dfii_pi1_rddata1_re; |
| wire [7:0] csrbank3_dfii_pi1_rddata1_r; |
| wire csrbank3_dfii_pi1_rddata1_we; |
| wire [7:0] csrbank3_dfii_pi1_rddata1_w; |
| wire csrbank3_dfii_pi1_rddata0_re; |
| wire [7:0] csrbank3_dfii_pi1_rddata0_r; |
| wire csrbank3_dfii_pi1_rddata0_we; |
| wire [7:0] csrbank3_dfii_pi1_rddata0_w; |
| wire csrbank3_dfii_pi2_command0_re; |
| wire [5:0] csrbank3_dfii_pi2_command0_r; |
| wire csrbank3_dfii_pi2_command0_we; |
| wire [5:0] csrbank3_dfii_pi2_command0_w; |
| wire csrbank3_dfii_pi2_address1_re; |
| wire [6:0] csrbank3_dfii_pi2_address1_r; |
| wire csrbank3_dfii_pi2_address1_we; |
| wire [6:0] csrbank3_dfii_pi2_address1_w; |
| wire csrbank3_dfii_pi2_address0_re; |
| wire [7:0] csrbank3_dfii_pi2_address0_r; |
| wire csrbank3_dfii_pi2_address0_we; |
| wire [7:0] csrbank3_dfii_pi2_address0_w; |
| wire csrbank3_dfii_pi2_baddress0_re; |
| wire [3:0] csrbank3_dfii_pi2_baddress0_r; |
| wire csrbank3_dfii_pi2_baddress0_we; |
| wire [3:0] csrbank3_dfii_pi2_baddress0_w; |
| wire csrbank3_dfii_pi2_wrdata7_re; |
| wire [7:0] csrbank3_dfii_pi2_wrdata7_r; |
| wire csrbank3_dfii_pi2_wrdata7_we; |
| wire [7:0] csrbank3_dfii_pi2_wrdata7_w; |
| wire csrbank3_dfii_pi2_wrdata6_re; |
| wire [7:0] csrbank3_dfii_pi2_wrdata6_r; |
| wire csrbank3_dfii_pi2_wrdata6_we; |
| wire [7:0] csrbank3_dfii_pi2_wrdata6_w; |
| wire csrbank3_dfii_pi2_wrdata5_re; |
| wire [7:0] csrbank3_dfii_pi2_wrdata5_r; |
| wire csrbank3_dfii_pi2_wrdata5_we; |
| wire [7:0] csrbank3_dfii_pi2_wrdata5_w; |
| wire csrbank3_dfii_pi2_wrdata4_re; |
| wire [7:0] csrbank3_dfii_pi2_wrdata4_r; |
| wire csrbank3_dfii_pi2_wrdata4_we; |
| wire [7:0] csrbank3_dfii_pi2_wrdata4_w; |
| wire csrbank3_dfii_pi2_wrdata3_re; |
| wire [7:0] csrbank3_dfii_pi2_wrdata3_r; |
| wire csrbank3_dfii_pi2_wrdata3_we; |
| wire [7:0] csrbank3_dfii_pi2_wrdata3_w; |
| wire csrbank3_dfii_pi2_wrdata2_re; |
| wire [7:0] csrbank3_dfii_pi2_wrdata2_r; |
| wire csrbank3_dfii_pi2_wrdata2_we; |
| wire [7:0] csrbank3_dfii_pi2_wrdata2_w; |
| wire csrbank3_dfii_pi2_wrdata1_re; |
| wire [7:0] csrbank3_dfii_pi2_wrdata1_r; |
| wire csrbank3_dfii_pi2_wrdata1_we; |
| wire [7:0] csrbank3_dfii_pi2_wrdata1_w; |
| wire csrbank3_dfii_pi2_wrdata0_re; |
| wire [7:0] csrbank3_dfii_pi2_wrdata0_r; |
| wire csrbank3_dfii_pi2_wrdata0_we; |
| wire [7:0] csrbank3_dfii_pi2_wrdata0_w; |
| wire csrbank3_dfii_pi2_rddata7_re; |
| wire [7:0] csrbank3_dfii_pi2_rddata7_r; |
| wire csrbank3_dfii_pi2_rddata7_we; |
| wire [7:0] csrbank3_dfii_pi2_rddata7_w; |
| wire csrbank3_dfii_pi2_rddata6_re; |
| wire [7:0] csrbank3_dfii_pi2_rddata6_r; |
| wire csrbank3_dfii_pi2_rddata6_we; |
| wire [7:0] csrbank3_dfii_pi2_rddata6_w; |
| wire csrbank3_dfii_pi2_rddata5_re; |
| wire [7:0] csrbank3_dfii_pi2_rddata5_r; |
| wire csrbank3_dfii_pi2_rddata5_we; |
| wire [7:0] csrbank3_dfii_pi2_rddata5_w; |
| wire csrbank3_dfii_pi2_rddata4_re; |
| wire [7:0] csrbank3_dfii_pi2_rddata4_r; |
| wire csrbank3_dfii_pi2_rddata4_we; |
| wire [7:0] csrbank3_dfii_pi2_rddata4_w; |
| wire csrbank3_dfii_pi2_rddata3_re; |
| wire [7:0] csrbank3_dfii_pi2_rddata3_r; |
| wire csrbank3_dfii_pi2_rddata3_we; |
| wire [7:0] csrbank3_dfii_pi2_rddata3_w; |
| wire csrbank3_dfii_pi2_rddata2_re; |
| wire [7:0] csrbank3_dfii_pi2_rddata2_r; |
| wire csrbank3_dfii_pi2_rddata2_we; |
| wire [7:0] csrbank3_dfii_pi2_rddata2_w; |
| wire csrbank3_dfii_pi2_rddata1_re; |
| wire [7:0] csrbank3_dfii_pi2_rddata1_r; |
| wire csrbank3_dfii_pi2_rddata1_we; |
| wire [7:0] csrbank3_dfii_pi2_rddata1_w; |
| wire csrbank3_dfii_pi2_rddata0_re; |
| wire [7:0] csrbank3_dfii_pi2_rddata0_r; |
| wire csrbank3_dfii_pi2_rddata0_we; |
| wire [7:0] csrbank3_dfii_pi2_rddata0_w; |
| wire csrbank3_dfii_pi3_command0_re; |
| wire [5:0] csrbank3_dfii_pi3_command0_r; |
| wire csrbank3_dfii_pi3_command0_we; |
| wire [5:0] csrbank3_dfii_pi3_command0_w; |
| wire csrbank3_dfii_pi3_address1_re; |
| wire [6:0] csrbank3_dfii_pi3_address1_r; |
| wire csrbank3_dfii_pi3_address1_we; |
| wire [6:0] csrbank3_dfii_pi3_address1_w; |
| wire csrbank3_dfii_pi3_address0_re; |
| wire [7:0] csrbank3_dfii_pi3_address0_r; |
| wire csrbank3_dfii_pi3_address0_we; |
| wire [7:0] csrbank3_dfii_pi3_address0_w; |
| wire csrbank3_dfii_pi3_baddress0_re; |
| wire [3:0] csrbank3_dfii_pi3_baddress0_r; |
| wire csrbank3_dfii_pi3_baddress0_we; |
| wire [3:0] csrbank3_dfii_pi3_baddress0_w; |
| wire csrbank3_dfii_pi3_wrdata7_re; |
| wire [7:0] csrbank3_dfii_pi3_wrdata7_r; |
| wire csrbank3_dfii_pi3_wrdata7_we; |
| wire [7:0] csrbank3_dfii_pi3_wrdata7_w; |
| wire csrbank3_dfii_pi3_wrdata6_re; |
| wire [7:0] csrbank3_dfii_pi3_wrdata6_r; |
| wire csrbank3_dfii_pi3_wrdata6_we; |
| wire [7:0] csrbank3_dfii_pi3_wrdata6_w; |
| wire csrbank3_dfii_pi3_wrdata5_re; |
| wire [7:0] csrbank3_dfii_pi3_wrdata5_r; |
| wire csrbank3_dfii_pi3_wrdata5_we; |
| wire [7:0] csrbank3_dfii_pi3_wrdata5_w; |
| wire csrbank3_dfii_pi3_wrdata4_re; |
| wire [7:0] csrbank3_dfii_pi3_wrdata4_r; |
| wire csrbank3_dfii_pi3_wrdata4_we; |
| wire [7:0] csrbank3_dfii_pi3_wrdata4_w; |
| wire csrbank3_dfii_pi3_wrdata3_re; |
| wire [7:0] csrbank3_dfii_pi3_wrdata3_r; |
| wire csrbank3_dfii_pi3_wrdata3_we; |
| wire [7:0] csrbank3_dfii_pi3_wrdata3_w; |
| wire csrbank3_dfii_pi3_wrdata2_re; |
| wire [7:0] csrbank3_dfii_pi3_wrdata2_r; |
| wire csrbank3_dfii_pi3_wrdata2_we; |
| wire [7:0] csrbank3_dfii_pi3_wrdata2_w; |
| wire csrbank3_dfii_pi3_wrdata1_re; |
| wire [7:0] csrbank3_dfii_pi3_wrdata1_r; |
| wire csrbank3_dfii_pi3_wrdata1_we; |
| wire [7:0] csrbank3_dfii_pi3_wrdata1_w; |
| wire csrbank3_dfii_pi3_wrdata0_re; |
| wire [7:0] csrbank3_dfii_pi3_wrdata0_r; |
| wire csrbank3_dfii_pi3_wrdata0_we; |
| wire [7:0] csrbank3_dfii_pi3_wrdata0_w; |
| wire csrbank3_dfii_pi3_rddata7_re; |
| wire [7:0] csrbank3_dfii_pi3_rddata7_r; |
| wire csrbank3_dfii_pi3_rddata7_we; |
| wire [7:0] csrbank3_dfii_pi3_rddata7_w; |
| wire csrbank3_dfii_pi3_rddata6_re; |
| wire [7:0] csrbank3_dfii_pi3_rddata6_r; |
| wire csrbank3_dfii_pi3_rddata6_we; |
| wire [7:0] csrbank3_dfii_pi3_rddata6_w; |
| wire csrbank3_dfii_pi3_rddata5_re; |
| wire [7:0] csrbank3_dfii_pi3_rddata5_r; |
| wire csrbank3_dfii_pi3_rddata5_we; |
| wire [7:0] csrbank3_dfii_pi3_rddata5_w; |
| wire csrbank3_dfii_pi3_rddata4_re; |
| wire [7:0] csrbank3_dfii_pi3_rddata4_r; |
| wire csrbank3_dfii_pi3_rddata4_we; |
| wire [7:0] csrbank3_dfii_pi3_rddata4_w; |
| wire csrbank3_dfii_pi3_rddata3_re; |
| wire [7:0] csrbank3_dfii_pi3_rddata3_r; |
| wire csrbank3_dfii_pi3_rddata3_we; |
| wire [7:0] csrbank3_dfii_pi3_rddata3_w; |
| wire csrbank3_dfii_pi3_rddata2_re; |
| wire [7:0] csrbank3_dfii_pi3_rddata2_r; |
| wire csrbank3_dfii_pi3_rddata2_we; |
| wire [7:0] csrbank3_dfii_pi3_rddata2_w; |
| wire csrbank3_dfii_pi3_rddata1_re; |
| wire [7:0] csrbank3_dfii_pi3_rddata1_r; |
| wire csrbank3_dfii_pi3_rddata1_we; |
| wire [7:0] csrbank3_dfii_pi3_rddata1_w; |
| wire csrbank3_dfii_pi3_rddata0_re; |
| wire [7:0] csrbank3_dfii_pi3_rddata0_r; |
| wire csrbank3_dfii_pi3_rddata0_we; |
| wire [7:0] csrbank3_dfii_pi3_rddata0_w; |
| wire csrbank3_sel; |
| wire [13:0] interface4_bank_bus_adr; |
| wire interface4_bank_bus_we; |
| wire [7:0] interface4_bank_bus_dat_w; |
| reg [7:0] interface4_bank_bus_dat_r = 8'd0; |
| wire csrbank4_load3_re; |
| wire [7:0] csrbank4_load3_r; |
| wire csrbank4_load3_we; |
| wire [7:0] csrbank4_load3_w; |
| wire csrbank4_load2_re; |
| wire [7:0] csrbank4_load2_r; |
| wire csrbank4_load2_we; |
| wire [7:0] csrbank4_load2_w; |
| wire csrbank4_load1_re; |
| wire [7:0] csrbank4_load1_r; |
| wire csrbank4_load1_we; |
| wire [7:0] csrbank4_load1_w; |
| wire csrbank4_load0_re; |
| wire [7:0] csrbank4_load0_r; |
| wire csrbank4_load0_we; |
| wire [7:0] csrbank4_load0_w; |
| wire csrbank4_reload3_re; |
| wire [7:0] csrbank4_reload3_r; |
| wire csrbank4_reload3_we; |
| wire [7:0] csrbank4_reload3_w; |
| wire csrbank4_reload2_re; |
| wire [7:0] csrbank4_reload2_r; |
| wire csrbank4_reload2_we; |
| wire [7:0] csrbank4_reload2_w; |
| wire csrbank4_reload1_re; |
| wire [7:0] csrbank4_reload1_r; |
| wire csrbank4_reload1_we; |
| wire [7:0] csrbank4_reload1_w; |
| wire csrbank4_reload0_re; |
| wire [7:0] csrbank4_reload0_r; |
| wire csrbank4_reload0_we; |
| wire [7:0] csrbank4_reload0_w; |
| wire csrbank4_en0_re; |
| wire csrbank4_en0_r; |
| wire csrbank4_en0_we; |
| wire csrbank4_en0_w; |
| wire csrbank4_update_value0_re; |
| wire csrbank4_update_value0_r; |
| wire csrbank4_update_value0_we; |
| wire csrbank4_update_value0_w; |
| wire csrbank4_value3_re; |
| wire [7:0] csrbank4_value3_r; |
| wire csrbank4_value3_we; |
| wire [7:0] csrbank4_value3_w; |
| wire csrbank4_value2_re; |
| wire [7:0] csrbank4_value2_r; |
| wire csrbank4_value2_we; |
| wire [7:0] csrbank4_value2_w; |
| wire csrbank4_value1_re; |
| wire [7:0] csrbank4_value1_r; |
| wire csrbank4_value1_we; |
| wire [7:0] csrbank4_value1_w; |
| wire csrbank4_value0_re; |
| wire [7:0] csrbank4_value0_r; |
| wire csrbank4_value0_we; |
| wire [7:0] csrbank4_value0_w; |
| wire csrbank4_ev_enable0_re; |
| wire csrbank4_ev_enable0_r; |
| wire csrbank4_ev_enable0_we; |
| wire csrbank4_ev_enable0_w; |
| wire csrbank4_sel; |
| wire [13:0] interface5_bank_bus_adr; |
| wire interface5_bank_bus_we; |
| wire [7:0] interface5_bank_bus_dat_w; |
| reg [7:0] interface5_bank_bus_dat_r = 8'd0; |
| wire csrbank5_txfull_re; |
| wire csrbank5_txfull_r; |
| wire csrbank5_txfull_we; |
| wire csrbank5_txfull_w; |
| wire csrbank5_rxempty_re; |
| wire csrbank5_rxempty_r; |
| wire csrbank5_rxempty_we; |
| wire csrbank5_rxempty_w; |
| wire csrbank5_ev_enable0_re; |
| wire [1:0] csrbank5_ev_enable0_r; |
| wire csrbank5_ev_enable0_we; |
| wire [1:0] csrbank5_ev_enable0_w; |
| wire csrbank5_sel; |
| wire [13:0] interface6_bank_bus_adr; |
| wire interface6_bank_bus_we; |
| wire [7:0] interface6_bank_bus_dat_w; |
| reg [7:0] interface6_bank_bus_dat_r = 8'd0; |
| wire csrbank6_tuning_word3_re; |
| wire [7:0] csrbank6_tuning_word3_r; |
| wire csrbank6_tuning_word3_we; |
| wire [7:0] csrbank6_tuning_word3_w; |
| wire csrbank6_tuning_word2_re; |
| wire [7:0] csrbank6_tuning_word2_r; |
| wire csrbank6_tuning_word2_we; |
| wire [7:0] csrbank6_tuning_word2_w; |
| wire csrbank6_tuning_word1_re; |
| wire [7:0] csrbank6_tuning_word1_r; |
| wire csrbank6_tuning_word1_we; |
| wire [7:0] csrbank6_tuning_word1_w; |
| wire csrbank6_tuning_word0_re; |
| wire [7:0] csrbank6_tuning_word0_r; |
| wire csrbank6_tuning_word0_we; |
| wire [7:0] csrbank6_tuning_word0_w; |
| wire csrbank6_sel; |
| wire [13:0] adr; |
| wire we; |
| wire [7:0] dat_w; |
| wire [7:0] dat_r; |
| reg rhs_array_muxed0 = 1'd0; |
| reg [14:0] rhs_array_muxed1 = 15'd0; |
| reg [3:0] rhs_array_muxed2 = 4'd0; |
| reg rhs_array_muxed3 = 1'd0; |
| reg rhs_array_muxed4 = 1'd0; |
| reg rhs_array_muxed5 = 1'd0; |
| reg t_array_muxed0 = 1'd0; |
| reg t_array_muxed1 = 1'd0; |
| reg t_array_muxed2 = 1'd0; |
| reg rhs_array_muxed6 = 1'd0; |
| reg [14:0] rhs_array_muxed7 = 15'd0; |
| reg [3:0] rhs_array_muxed8 = 4'd0; |
| reg rhs_array_muxed9 = 1'd0; |
| reg rhs_array_muxed10 = 1'd0; |
| reg rhs_array_muxed11 = 1'd0; |
| reg t_array_muxed3 = 1'd0; |
| reg t_array_muxed4 = 1'd0; |
| reg t_array_muxed5 = 1'd0; |
| reg [21:0] rhs_array_muxed12 = 22'd0; |
| reg rhs_array_muxed13 = 1'd0; |
| reg rhs_array_muxed14 = 1'd0; |
| reg [21:0] rhs_array_muxed15 = 22'd0; |
| reg rhs_array_muxed16 = 1'd0; |
| reg rhs_array_muxed17 = 1'd0; |
| reg [21:0] rhs_array_muxed18 = 22'd0; |
| reg rhs_array_muxed19 = 1'd0; |
| reg rhs_array_muxed20 = 1'd0; |
| reg [21:0] rhs_array_muxed21 = 22'd0; |
| reg rhs_array_muxed22 = 1'd0; |
| reg rhs_array_muxed23 = 1'd0; |
| reg [21:0] rhs_array_muxed24 = 22'd0; |
| reg rhs_array_muxed25 = 1'd0; |
| reg rhs_array_muxed26 = 1'd0; |
| reg [21:0] rhs_array_muxed27 = 22'd0; |
| reg rhs_array_muxed28 = 1'd0; |
| reg rhs_array_muxed29 = 1'd0; |
| reg [21:0] rhs_array_muxed30 = 22'd0; |
| reg rhs_array_muxed31 = 1'd0; |
| reg rhs_array_muxed32 = 1'd0; |
| reg [21:0] rhs_array_muxed33 = 22'd0; |
| reg rhs_array_muxed34 = 1'd0; |
| reg rhs_array_muxed35 = 1'd0; |
| reg [21:0] rhs_array_muxed36 = 22'd0; |
| reg rhs_array_muxed37 = 1'd0; |
| reg rhs_array_muxed38 = 1'd0; |
| reg [21:0] rhs_array_muxed39 = 22'd0; |
| reg rhs_array_muxed40 = 1'd0; |
| reg rhs_array_muxed41 = 1'd0; |
| reg [21:0] rhs_array_muxed42 = 22'd0; |
| reg rhs_array_muxed43 = 1'd0; |
| reg rhs_array_muxed44 = 1'd0; |
| reg [21:0] rhs_array_muxed45 = 22'd0; |
| reg rhs_array_muxed46 = 1'd0; |
| reg rhs_array_muxed47 = 1'd0; |
| reg [21:0] rhs_array_muxed48 = 22'd0; |
| reg rhs_array_muxed49 = 1'd0; |
| reg rhs_array_muxed50 = 1'd0; |
| reg [21:0] rhs_array_muxed51 = 22'd0; |
| reg rhs_array_muxed52 = 1'd0; |
| reg rhs_array_muxed53 = 1'd0; |
| reg [21:0] rhs_array_muxed54 = 22'd0; |
| reg rhs_array_muxed55 = 1'd0; |
| reg rhs_array_muxed56 = 1'd0; |
| reg [21:0] rhs_array_muxed57 = 22'd0; |
| reg rhs_array_muxed58 = 1'd0; |
| reg rhs_array_muxed59 = 1'd0; |
| reg [29:0] rhs_array_muxed60 = 30'd0; |
| reg [31:0] rhs_array_muxed61 = 32'd0; |
| reg [3:0] rhs_array_muxed62 = 4'd0; |
| reg rhs_array_muxed63 = 1'd0; |
| reg rhs_array_muxed64 = 1'd0; |
| reg rhs_array_muxed65 = 1'd0; |
| reg [2:0] rhs_array_muxed66 = 3'd0; |
| reg [1:0] rhs_array_muxed67 = 2'd0; |
| reg [3:0] array_muxed0 = 4'd0; |
| reg [14:0] array_muxed1 = 15'd0; |
| reg array_muxed2 = 1'd0; |
| reg array_muxed3 = 1'd0; |
| reg array_muxed4 = 1'd0; |
| reg array_muxed5 = 1'd0; |
| reg array_muxed6 = 1'd0; |
| reg [3:0] array_muxed7 = 4'd0; |
| reg [14:0] array_muxed8 = 15'd0; |
| reg array_muxed9 = 1'd0; |
| reg array_muxed10 = 1'd0; |
| reg array_muxed11 = 1'd0; |
| reg array_muxed12 = 1'd0; |
| reg array_muxed13 = 1'd0; |
| reg [3:0] array_muxed14 = 4'd0; |
| reg [14:0] array_muxed15 = 15'd0; |
| reg array_muxed16 = 1'd0; |
| reg array_muxed17 = 1'd0; |
| reg array_muxed18 = 1'd0; |
| reg array_muxed19 = 1'd0; |
| reg array_muxed20 = 1'd0; |
| reg [3:0] array_muxed21 = 4'd0; |
| reg [14:0] array_muxed22 = 15'd0; |
| reg array_muxed23 = 1'd0; |
| reg array_muxed24 = 1'd0; |
| reg array_muxed25 = 1'd0; |
| reg array_muxed26 = 1'd0; |
| reg array_muxed27 = 1'd0; |
| (* async_reg = "true", mr_ff = "true", dont_touch = "true" *) reg regs0 = 1'd0; |
| (* async_reg = "true", dont_touch = "true" *) reg regs1 = 1'd0; |
| wire xilinxasyncresetsynchronizerimpl0; |
| wire xilinxasyncresetsynchronizerimpl0_rst_meta; |
| wire xilinxasyncresetsynchronizerimpl1_rst_meta; |
| |
| assign soclinux_soclinux_cpu_reset = soclinux_soclinux_soccontroller_reset; |
| assign soclinux_soclinux_soccontroller_bus_error = error; |
| always @(*) begin |
| soclinux_soclinux_cpu_interrupt0 <= 32'd0; |
| soclinux_soclinux_cpu_interrupt0[1] <= soclinux_soclinux_timer_irq; |
| soclinux_soclinux_cpu_interrupt0[0] <= soclinux_soclinux_uart_irq; |
| end |
| assign soclinux_soclinux_soccontroller_reset = soclinux_soclinux_soccontroller_reset_re; |
| assign soclinux_soclinux_soccontroller_bus_errors_status = soclinux_soclinux_soccontroller_bus_errors; |
| assign soclinux_soclinux_cpu_interrupt1 = (soclinux_soclinux_cpu_time >= soclinux_soclinux_cpu_time_cmp); |
| assign soclinux_soclinux_soclinux_adr = soclinux_soclinux_soclinux_ram_bus_adr[12:0]; |
| assign soclinux_soclinux_soclinux_ram_bus_dat_r = soclinux_soclinux_soclinux_dat_r; |
| always @(*) begin |
| soclinux_soclinux_ram_we <= 4'd0; |
| soclinux_soclinux_ram_we[0] <= (((soclinux_soclinux_ram_bus_ram_bus_cyc & soclinux_soclinux_ram_bus_ram_bus_stb) & soclinux_soclinux_ram_bus_ram_bus_we) & soclinux_soclinux_ram_bus_ram_bus_sel[0]); |
| soclinux_soclinux_ram_we[1] <= (((soclinux_soclinux_ram_bus_ram_bus_cyc & soclinux_soclinux_ram_bus_ram_bus_stb) & soclinux_soclinux_ram_bus_ram_bus_we) & soclinux_soclinux_ram_bus_ram_bus_sel[1]); |
| soclinux_soclinux_ram_we[2] <= (((soclinux_soclinux_ram_bus_ram_bus_cyc & soclinux_soclinux_ram_bus_ram_bus_stb) & soclinux_soclinux_ram_bus_ram_bus_we) & soclinux_soclinux_ram_bus_ram_bus_sel[2]); |
| soclinux_soclinux_ram_we[3] <= (((soclinux_soclinux_ram_bus_ram_bus_cyc & soclinux_soclinux_ram_bus_ram_bus_stb) & soclinux_soclinux_ram_bus_ram_bus_we) & soclinux_soclinux_ram_bus_ram_bus_sel[3]); |
| end |
| assign soclinux_soclinux_ram_adr = soclinux_soclinux_ram_bus_ram_bus_adr[9:0]; |
| assign soclinux_soclinux_ram_bus_ram_bus_dat_r = soclinux_soclinux_ram_dat_r; |
| assign soclinux_soclinux_ram_dat_w = soclinux_soclinux_ram_bus_ram_bus_dat_w; |
| assign soclinux_soclinux_uart_uart_sink_valid = soclinux_soclinux_source_valid; |
| assign soclinux_soclinux_source_ready = soclinux_soclinux_uart_uart_sink_ready; |
| assign soclinux_soclinux_uart_uart_sink_first = soclinux_soclinux_source_first; |
| assign soclinux_soclinux_uart_uart_sink_last = soclinux_soclinux_source_last; |
| assign soclinux_soclinux_uart_uart_sink_payload_data = soclinux_soclinux_source_payload_data; |
| assign soclinux_soclinux_sink_valid = soclinux_soclinux_uart_uart_source_valid; |
| assign soclinux_soclinux_uart_uart_source_ready = soclinux_soclinux_sink_ready; |
| assign soclinux_soclinux_sink_first = soclinux_soclinux_uart_uart_source_first; |
| assign soclinux_soclinux_sink_last = soclinux_soclinux_uart_uart_source_last; |
| assign soclinux_soclinux_sink_payload_data = soclinux_soclinux_uart_uart_source_payload_data; |
| assign soclinux_soclinux_uart_tx_fifo_sink_valid = soclinux_soclinux_uart_rxtx_re; |
| assign soclinux_soclinux_uart_tx_fifo_sink_payload_data = soclinux_soclinux_uart_rxtx_r; |
| assign soclinux_soclinux_uart_txfull_status = (~soclinux_soclinux_uart_tx_fifo_sink_ready); |
| assign soclinux_soclinux_uart_uart_source_valid = soclinux_soclinux_uart_tx_fifo_source_valid; |
| assign soclinux_soclinux_uart_tx_fifo_source_ready = soclinux_soclinux_uart_uart_source_ready; |
| assign soclinux_soclinux_uart_uart_source_first = soclinux_soclinux_uart_tx_fifo_source_first; |
| assign soclinux_soclinux_uart_uart_source_last = soclinux_soclinux_uart_tx_fifo_source_last; |
| assign soclinux_soclinux_uart_uart_source_payload_data = soclinux_soclinux_uart_tx_fifo_source_payload_data; |
| assign soclinux_soclinux_uart_tx_trigger = (~soclinux_soclinux_uart_tx_fifo_sink_ready); |
| assign soclinux_soclinux_uart_rx_fifo_sink_valid = soclinux_soclinux_uart_uart_sink_valid; |
| assign soclinux_soclinux_uart_uart_sink_ready = soclinux_soclinux_uart_rx_fifo_sink_ready; |
| assign soclinux_soclinux_uart_rx_fifo_sink_first = soclinux_soclinux_uart_uart_sink_first; |
| assign soclinux_soclinux_uart_rx_fifo_sink_last = soclinux_soclinux_uart_uart_sink_last; |
| assign soclinux_soclinux_uart_rx_fifo_sink_payload_data = soclinux_soclinux_uart_uart_sink_payload_data; |
| assign soclinux_soclinux_uart_rxempty_status = (~soclinux_soclinux_uart_rx_fifo_source_valid); |
| assign soclinux_soclinux_uart_rxtx_w = soclinux_soclinux_uart_rx_fifo_source_payload_data; |
| assign soclinux_soclinux_uart_rx_fifo_source_ready = (soclinux_soclinux_uart_rx_clear | (1'd0 & soclinux_soclinux_uart_rxtx_we)); |
| assign soclinux_soclinux_uart_rx_trigger = (~soclinux_soclinux_uart_rx_fifo_source_valid); |
| always @(*) begin |
| soclinux_soclinux_uart_tx_clear <= 1'd0; |
| if ((soclinux_soclinux_uart_eventmanager_pending_re & soclinux_soclinux_uart_eventmanager_pending_r[0])) begin |
| soclinux_soclinux_uart_tx_clear <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_soclinux_uart_eventmanager_status_w <= 2'd0; |
| soclinux_soclinux_uart_eventmanager_status_w[0] <= soclinux_soclinux_uart_tx_status; |
| soclinux_soclinux_uart_eventmanager_status_w[1] <= soclinux_soclinux_uart_rx_status; |
| end |
| always @(*) begin |
| soclinux_soclinux_uart_rx_clear <= 1'd0; |
| if ((soclinux_soclinux_uart_eventmanager_pending_re & soclinux_soclinux_uart_eventmanager_pending_r[1])) begin |
| soclinux_soclinux_uart_rx_clear <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_soclinux_uart_eventmanager_pending_w <= 2'd0; |
| soclinux_soclinux_uart_eventmanager_pending_w[0] <= soclinux_soclinux_uart_tx_pending; |
| soclinux_soclinux_uart_eventmanager_pending_w[1] <= soclinux_soclinux_uart_rx_pending; |
| end |
| assign soclinux_soclinux_uart_irq = ((soclinux_soclinux_uart_eventmanager_pending_w[0] & soclinux_soclinux_uart_eventmanager_storage[0]) | (soclinux_soclinux_uart_eventmanager_pending_w[1] & soclinux_soclinux_uart_eventmanager_storage[1])); |
| assign soclinux_soclinux_uart_tx_status = soclinux_soclinux_uart_tx_trigger; |
| assign soclinux_soclinux_uart_rx_status = soclinux_soclinux_uart_rx_trigger; |
| assign soclinux_soclinux_uart_tx_fifo_syncfifo_din = {soclinux_soclinux_uart_tx_fifo_fifo_in_last, soclinux_soclinux_uart_tx_fifo_fifo_in_first, soclinux_soclinux_uart_tx_fifo_fifo_in_payload_data}; |
| assign {soclinux_soclinux_uart_tx_fifo_fifo_out_last, soclinux_soclinux_uart_tx_fifo_fifo_out_first, soclinux_soclinux_uart_tx_fifo_fifo_out_payload_data} = soclinux_soclinux_uart_tx_fifo_syncfifo_dout; |
| assign soclinux_soclinux_uart_tx_fifo_sink_ready = soclinux_soclinux_uart_tx_fifo_syncfifo_writable; |
| assign soclinux_soclinux_uart_tx_fifo_syncfifo_we = soclinux_soclinux_uart_tx_fifo_sink_valid; |
| assign soclinux_soclinux_uart_tx_fifo_fifo_in_first = soclinux_soclinux_uart_tx_fifo_sink_first; |
| assign soclinux_soclinux_uart_tx_fifo_fifo_in_last = soclinux_soclinux_uart_tx_fifo_sink_last; |
| assign soclinux_soclinux_uart_tx_fifo_fifo_in_payload_data = soclinux_soclinux_uart_tx_fifo_sink_payload_data; |
| assign soclinux_soclinux_uart_tx_fifo_source_valid = soclinux_soclinux_uart_tx_fifo_readable; |
| assign soclinux_soclinux_uart_tx_fifo_source_first = soclinux_soclinux_uart_tx_fifo_fifo_out_first; |
| assign soclinux_soclinux_uart_tx_fifo_source_last = soclinux_soclinux_uart_tx_fifo_fifo_out_last; |
| assign soclinux_soclinux_uart_tx_fifo_source_payload_data = soclinux_soclinux_uart_tx_fifo_fifo_out_payload_data; |
| assign soclinux_soclinux_uart_tx_fifo_re = soclinux_soclinux_uart_tx_fifo_source_ready; |
| assign soclinux_soclinux_uart_tx_fifo_syncfifo_re = (soclinux_soclinux_uart_tx_fifo_syncfifo_readable & ((~soclinux_soclinux_uart_tx_fifo_readable) | soclinux_soclinux_uart_tx_fifo_re)); |
| assign soclinux_soclinux_uart_tx_fifo_level1 = (soclinux_soclinux_uart_tx_fifo_level0 + soclinux_soclinux_uart_tx_fifo_readable); |
| always @(*) begin |
| soclinux_soclinux_uart_tx_fifo_wrport_adr <= 4'd0; |
| if (soclinux_soclinux_uart_tx_fifo_replace) begin |
| soclinux_soclinux_uart_tx_fifo_wrport_adr <= (soclinux_soclinux_uart_tx_fifo_produce - 1'd1); |
| end else begin |
| soclinux_soclinux_uart_tx_fifo_wrport_adr <= soclinux_soclinux_uart_tx_fifo_produce; |
| end |
| end |
| assign soclinux_soclinux_uart_tx_fifo_wrport_dat_w = soclinux_soclinux_uart_tx_fifo_syncfifo_din; |
| assign soclinux_soclinux_uart_tx_fifo_wrport_we = (soclinux_soclinux_uart_tx_fifo_syncfifo_we & (soclinux_soclinux_uart_tx_fifo_syncfifo_writable | soclinux_soclinux_uart_tx_fifo_replace)); |
| assign soclinux_soclinux_uart_tx_fifo_do_read = (soclinux_soclinux_uart_tx_fifo_syncfifo_readable & soclinux_soclinux_uart_tx_fifo_syncfifo_re); |
| assign soclinux_soclinux_uart_tx_fifo_rdport_adr = soclinux_soclinux_uart_tx_fifo_consume; |
| assign soclinux_soclinux_uart_tx_fifo_syncfifo_dout = soclinux_soclinux_uart_tx_fifo_rdport_dat_r; |
| assign soclinux_soclinux_uart_tx_fifo_rdport_re = soclinux_soclinux_uart_tx_fifo_do_read; |
| assign soclinux_soclinux_uart_tx_fifo_syncfifo_writable = (soclinux_soclinux_uart_tx_fifo_level0 != 5'd16); |
| assign soclinux_soclinux_uart_tx_fifo_syncfifo_readable = (soclinux_soclinux_uart_tx_fifo_level0 != 1'd0); |
| assign soclinux_soclinux_uart_rx_fifo_syncfifo_din = {soclinux_soclinux_uart_rx_fifo_fifo_in_last, soclinux_soclinux_uart_rx_fifo_fifo_in_first, soclinux_soclinux_uart_rx_fifo_fifo_in_payload_data}; |
| assign {soclinux_soclinux_uart_rx_fifo_fifo_out_last, soclinux_soclinux_uart_rx_fifo_fifo_out_first, soclinux_soclinux_uart_rx_fifo_fifo_out_payload_data} = soclinux_soclinux_uart_rx_fifo_syncfifo_dout; |
| assign soclinux_soclinux_uart_rx_fifo_sink_ready = soclinux_soclinux_uart_rx_fifo_syncfifo_writable; |
| assign soclinux_soclinux_uart_rx_fifo_syncfifo_we = soclinux_soclinux_uart_rx_fifo_sink_valid; |
| assign soclinux_soclinux_uart_rx_fifo_fifo_in_first = soclinux_soclinux_uart_rx_fifo_sink_first; |
| assign soclinux_soclinux_uart_rx_fifo_fifo_in_last = soclinux_soclinux_uart_rx_fifo_sink_last; |
| assign soclinux_soclinux_uart_rx_fifo_fifo_in_payload_data = soclinux_soclinux_uart_rx_fifo_sink_payload_data; |
| assign soclinux_soclinux_uart_rx_fifo_source_valid = soclinux_soclinux_uart_rx_fifo_readable; |
| assign soclinux_soclinux_uart_rx_fifo_source_first = soclinux_soclinux_uart_rx_fifo_fifo_out_first; |
| assign soclinux_soclinux_uart_rx_fifo_source_last = soclinux_soclinux_uart_rx_fifo_fifo_out_last; |
| assign soclinux_soclinux_uart_rx_fifo_source_payload_data = soclinux_soclinux_uart_rx_fifo_fifo_out_payload_data; |
| assign soclinux_soclinux_uart_rx_fifo_re = soclinux_soclinux_uart_rx_fifo_source_ready; |
| assign soclinux_soclinux_uart_rx_fifo_syncfifo_re = (soclinux_soclinux_uart_rx_fifo_syncfifo_readable & ((~soclinux_soclinux_uart_rx_fifo_readable) | soclinux_soclinux_uart_rx_fifo_re)); |
| assign soclinux_soclinux_uart_rx_fifo_level1 = (soclinux_soclinux_uart_rx_fifo_level0 + soclinux_soclinux_uart_rx_fifo_readable); |
| always @(*) begin |
| soclinux_soclinux_uart_rx_fifo_wrport_adr <= 4'd0; |
| if (soclinux_soclinux_uart_rx_fifo_replace) begin |
| soclinux_soclinux_uart_rx_fifo_wrport_adr <= (soclinux_soclinux_uart_rx_fifo_produce - 1'd1); |
| end else begin |
| soclinux_soclinux_uart_rx_fifo_wrport_adr <= soclinux_soclinux_uart_rx_fifo_produce; |
| end |
| end |
| assign soclinux_soclinux_uart_rx_fifo_wrport_dat_w = soclinux_soclinux_uart_rx_fifo_syncfifo_din; |
| assign soclinux_soclinux_uart_rx_fifo_wrport_we = (soclinux_soclinux_uart_rx_fifo_syncfifo_we & (soclinux_soclinux_uart_rx_fifo_syncfifo_writable | soclinux_soclinux_uart_rx_fifo_replace)); |
| assign soclinux_soclinux_uart_rx_fifo_do_read = (soclinux_soclinux_uart_rx_fifo_syncfifo_readable & soclinux_soclinux_uart_rx_fifo_syncfifo_re); |
| assign soclinux_soclinux_uart_rx_fifo_rdport_adr = soclinux_soclinux_uart_rx_fifo_consume; |
| assign soclinux_soclinux_uart_rx_fifo_syncfifo_dout = soclinux_soclinux_uart_rx_fifo_rdport_dat_r; |
| assign soclinux_soclinux_uart_rx_fifo_rdport_re = soclinux_soclinux_uart_rx_fifo_do_read; |
| assign soclinux_soclinux_uart_rx_fifo_syncfifo_writable = (soclinux_soclinux_uart_rx_fifo_level0 != 5'd16); |
| assign soclinux_soclinux_uart_rx_fifo_syncfifo_readable = (soclinux_soclinux_uart_rx_fifo_level0 != 1'd0); |
| assign soclinux_soclinux_timer_zero_trigger = (soclinux_soclinux_timer_value != 1'd0); |
| assign soclinux_soclinux_timer_eventmanager_status_w = soclinux_soclinux_timer_zero_status; |
| always @(*) begin |
| soclinux_soclinux_timer_zero_clear <= 1'd0; |
| if ((soclinux_soclinux_timer_eventmanager_pending_re & soclinux_soclinux_timer_eventmanager_pending_r)) begin |
| soclinux_soclinux_timer_zero_clear <= 1'd1; |
| end |
| end |
| assign soclinux_soclinux_timer_eventmanager_pending_w = soclinux_soclinux_timer_zero_pending; |
| assign soclinux_soclinux_timer_irq = (soclinux_soclinux_timer_eventmanager_pending_w & soclinux_soclinux_timer_eventmanager_storage); |
| assign soclinux_soclinux_timer_zero_status = soclinux_soclinux_timer_zero_trigger; |
| assign soclinux_soclinux_interface_dat_w = soclinux_soclinux_bus_wishbone_dat_w; |
| assign soclinux_soclinux_bus_wishbone_dat_r = soclinux_soclinux_interface_dat_r; |
| always @(*) begin |
| soclinux_soclinux_bus_wishbone_ack <= 1'd0; |
| wb2csr_next_state <= 1'd0; |
| soclinux_soclinux_interface_adr <= 14'd0; |
| soclinux_soclinux_interface_we <= 1'd0; |
| wb2csr_next_state <= wb2csr_state; |
| case (wb2csr_state) |
| 1'd1: begin |
| soclinux_soclinux_bus_wishbone_ack <= 1'd1; |
| wb2csr_next_state <= 1'd0; |
| end |
| default: begin |
| if ((soclinux_soclinux_bus_wishbone_cyc & soclinux_soclinux_bus_wishbone_stb)) begin |
| soclinux_soclinux_interface_adr <= soclinux_soclinux_bus_wishbone_adr; |
| soclinux_soclinux_interface_we <= soclinux_soclinux_bus_wishbone_we; |
| wb2csr_next_state <= 1'd1; |
| end |
| end |
| endcase |
| end |
| assign ic_clk = sys_clk; |
| assign pll4x_clk = soclinux_clkout0; |
| assign clk500_clk = soclinux_clkout_buf; |
| assign ddram_ba = soclinux_usddrphy_pads_ba[1:0]; |
| assign ddram_bg = soclinux_usddrphy_pads_ba[3:2]; |
| always @(*) begin |
| soclinux_usddrphy_dqs_serdes_pattern <= 8'd0; |
| soclinux_usddrphy_dqs_serdes_pattern <= 7'd85; |
| if (soclinux_usddrphy_wlevel_en_storage) begin |
| soclinux_usddrphy_dqs_serdes_pattern <= 1'd0; |
| if (soclinux_usddrphy_wlevel_strobe_re) begin |
| soclinux_usddrphy_dqs_serdes_pattern <= 1'd1; |
| end |
| end |
| end |
| assign soclinux_usddrphy_wait = (~soclinux_usddrphy_dqs_taps_done); |
| always @(*) begin |
| soclinux_usddrphy_interface1_dfi_p0_rddata <= 64'd0; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[0] <= soclinux_usddrphy_bitslip0_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[32] <= soclinux_usddrphy_bitslip0_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[1] <= soclinux_usddrphy_bitslip1_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[33] <= soclinux_usddrphy_bitslip1_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[2] <= soclinux_usddrphy_bitslip2_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[34] <= soclinux_usddrphy_bitslip2_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[3] <= soclinux_usddrphy_bitslip3_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[35] <= soclinux_usddrphy_bitslip3_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[4] <= soclinux_usddrphy_bitslip4_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[36] <= soclinux_usddrphy_bitslip4_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[5] <= soclinux_usddrphy_bitslip5_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[37] <= soclinux_usddrphy_bitslip5_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[6] <= soclinux_usddrphy_bitslip6_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[38] <= soclinux_usddrphy_bitslip6_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[7] <= soclinux_usddrphy_bitslip7_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[39] <= soclinux_usddrphy_bitslip7_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[8] <= soclinux_usddrphy_bitslip8_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[40] <= soclinux_usddrphy_bitslip8_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[9] <= soclinux_usddrphy_bitslip9_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[41] <= soclinux_usddrphy_bitslip9_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[10] <= soclinux_usddrphy_bitslip10_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[42] <= soclinux_usddrphy_bitslip10_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[11] <= soclinux_usddrphy_bitslip11_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[43] <= soclinux_usddrphy_bitslip11_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[12] <= soclinux_usddrphy_bitslip12_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[44] <= soclinux_usddrphy_bitslip12_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[13] <= soclinux_usddrphy_bitslip13_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[45] <= soclinux_usddrphy_bitslip13_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[14] <= soclinux_usddrphy_bitslip14_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[46] <= soclinux_usddrphy_bitslip14_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[15] <= soclinux_usddrphy_bitslip15_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[47] <= soclinux_usddrphy_bitslip15_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[16] <= soclinux_usddrphy_bitslip16_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[48] <= soclinux_usddrphy_bitslip16_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[17] <= soclinux_usddrphy_bitslip17_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[49] <= soclinux_usddrphy_bitslip17_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[18] <= soclinux_usddrphy_bitslip18_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[50] <= soclinux_usddrphy_bitslip18_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[19] <= soclinux_usddrphy_bitslip19_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[51] <= soclinux_usddrphy_bitslip19_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[20] <= soclinux_usddrphy_bitslip20_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[52] <= soclinux_usddrphy_bitslip20_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[21] <= soclinux_usddrphy_bitslip21_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[53] <= soclinux_usddrphy_bitslip21_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[22] <= soclinux_usddrphy_bitslip22_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[54] <= soclinux_usddrphy_bitslip22_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[23] <= soclinux_usddrphy_bitslip23_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[55] <= soclinux_usddrphy_bitslip23_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[24] <= soclinux_usddrphy_bitslip24_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[56] <= soclinux_usddrphy_bitslip24_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[25] <= soclinux_usddrphy_bitslip25_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[57] <= soclinux_usddrphy_bitslip25_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[26] <= soclinux_usddrphy_bitslip26_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[58] <= soclinux_usddrphy_bitslip26_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[27] <= soclinux_usddrphy_bitslip27_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[59] <= soclinux_usddrphy_bitslip27_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[28] <= soclinux_usddrphy_bitslip28_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[60] <= soclinux_usddrphy_bitslip28_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[29] <= soclinux_usddrphy_bitslip29_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[61] <= soclinux_usddrphy_bitslip29_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[30] <= soclinux_usddrphy_bitslip30_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[62] <= soclinux_usddrphy_bitslip30_o[1]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[31] <= soclinux_usddrphy_bitslip31_o[0]; |
| soclinux_usddrphy_interface1_dfi_p0_rddata[63] <= soclinux_usddrphy_bitslip31_o[1]; |
| end |
| always @(*) begin |
| soclinux_usddrphy_interface1_dfi_p1_rddata <= 64'd0; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[0] <= soclinux_usddrphy_bitslip0_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[32] <= soclinux_usddrphy_bitslip0_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[1] <= soclinux_usddrphy_bitslip1_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[33] <= soclinux_usddrphy_bitslip1_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[2] <= soclinux_usddrphy_bitslip2_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[34] <= soclinux_usddrphy_bitslip2_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[3] <= soclinux_usddrphy_bitslip3_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[35] <= soclinux_usddrphy_bitslip3_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[4] <= soclinux_usddrphy_bitslip4_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[36] <= soclinux_usddrphy_bitslip4_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[5] <= soclinux_usddrphy_bitslip5_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[37] <= soclinux_usddrphy_bitslip5_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[6] <= soclinux_usddrphy_bitslip6_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[38] <= soclinux_usddrphy_bitslip6_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[7] <= soclinux_usddrphy_bitslip7_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[39] <= soclinux_usddrphy_bitslip7_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[8] <= soclinux_usddrphy_bitslip8_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[40] <= soclinux_usddrphy_bitslip8_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[9] <= soclinux_usddrphy_bitslip9_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[41] <= soclinux_usddrphy_bitslip9_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[10] <= soclinux_usddrphy_bitslip10_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[42] <= soclinux_usddrphy_bitslip10_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[11] <= soclinux_usddrphy_bitslip11_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[43] <= soclinux_usddrphy_bitslip11_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[12] <= soclinux_usddrphy_bitslip12_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[44] <= soclinux_usddrphy_bitslip12_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[13] <= soclinux_usddrphy_bitslip13_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[45] <= soclinux_usddrphy_bitslip13_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[14] <= soclinux_usddrphy_bitslip14_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[46] <= soclinux_usddrphy_bitslip14_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[15] <= soclinux_usddrphy_bitslip15_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[47] <= soclinux_usddrphy_bitslip15_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[16] <= soclinux_usddrphy_bitslip16_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[48] <= soclinux_usddrphy_bitslip16_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[17] <= soclinux_usddrphy_bitslip17_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[49] <= soclinux_usddrphy_bitslip17_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[18] <= soclinux_usddrphy_bitslip18_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[50] <= soclinux_usddrphy_bitslip18_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[19] <= soclinux_usddrphy_bitslip19_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[51] <= soclinux_usddrphy_bitslip19_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[20] <= soclinux_usddrphy_bitslip20_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[52] <= soclinux_usddrphy_bitslip20_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[21] <= soclinux_usddrphy_bitslip21_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[53] <= soclinux_usddrphy_bitslip21_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[22] <= soclinux_usddrphy_bitslip22_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[54] <= soclinux_usddrphy_bitslip22_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[23] <= soclinux_usddrphy_bitslip23_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[55] <= soclinux_usddrphy_bitslip23_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[24] <= soclinux_usddrphy_bitslip24_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[56] <= soclinux_usddrphy_bitslip24_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[25] <= soclinux_usddrphy_bitslip25_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[57] <= soclinux_usddrphy_bitslip25_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[26] <= soclinux_usddrphy_bitslip26_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[58] <= soclinux_usddrphy_bitslip26_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[27] <= soclinux_usddrphy_bitslip27_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[59] <= soclinux_usddrphy_bitslip27_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[28] <= soclinux_usddrphy_bitslip28_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[60] <= soclinux_usddrphy_bitslip28_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[29] <= soclinux_usddrphy_bitslip29_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[61] <= soclinux_usddrphy_bitslip29_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[30] <= soclinux_usddrphy_bitslip30_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[62] <= soclinux_usddrphy_bitslip30_o[3]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[31] <= soclinux_usddrphy_bitslip31_o[2]; |
| soclinux_usddrphy_interface1_dfi_p1_rddata[63] <= soclinux_usddrphy_bitslip31_o[3]; |
| end |
| always @(*) begin |
| soclinux_usddrphy_interface1_dfi_p2_rddata <= 64'd0; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[0] <= soclinux_usddrphy_bitslip0_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[32] <= soclinux_usddrphy_bitslip0_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[1] <= soclinux_usddrphy_bitslip1_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[33] <= soclinux_usddrphy_bitslip1_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[2] <= soclinux_usddrphy_bitslip2_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[34] <= soclinux_usddrphy_bitslip2_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[3] <= soclinux_usddrphy_bitslip3_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[35] <= soclinux_usddrphy_bitslip3_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[4] <= soclinux_usddrphy_bitslip4_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[36] <= soclinux_usddrphy_bitslip4_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[5] <= soclinux_usddrphy_bitslip5_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[37] <= soclinux_usddrphy_bitslip5_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[6] <= soclinux_usddrphy_bitslip6_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[38] <= soclinux_usddrphy_bitslip6_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[7] <= soclinux_usddrphy_bitslip7_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[39] <= soclinux_usddrphy_bitslip7_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[8] <= soclinux_usddrphy_bitslip8_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[40] <= soclinux_usddrphy_bitslip8_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[9] <= soclinux_usddrphy_bitslip9_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[41] <= soclinux_usddrphy_bitslip9_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[10] <= soclinux_usddrphy_bitslip10_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[42] <= soclinux_usddrphy_bitslip10_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[11] <= soclinux_usddrphy_bitslip11_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[43] <= soclinux_usddrphy_bitslip11_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[12] <= soclinux_usddrphy_bitslip12_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[44] <= soclinux_usddrphy_bitslip12_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[13] <= soclinux_usddrphy_bitslip13_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[45] <= soclinux_usddrphy_bitslip13_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[14] <= soclinux_usddrphy_bitslip14_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[46] <= soclinux_usddrphy_bitslip14_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[15] <= soclinux_usddrphy_bitslip15_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[47] <= soclinux_usddrphy_bitslip15_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[16] <= soclinux_usddrphy_bitslip16_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[48] <= soclinux_usddrphy_bitslip16_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[17] <= soclinux_usddrphy_bitslip17_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[49] <= soclinux_usddrphy_bitslip17_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[18] <= soclinux_usddrphy_bitslip18_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[50] <= soclinux_usddrphy_bitslip18_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[19] <= soclinux_usddrphy_bitslip19_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[51] <= soclinux_usddrphy_bitslip19_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[20] <= soclinux_usddrphy_bitslip20_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[52] <= soclinux_usddrphy_bitslip20_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[21] <= soclinux_usddrphy_bitslip21_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[53] <= soclinux_usddrphy_bitslip21_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[22] <= soclinux_usddrphy_bitslip22_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[54] <= soclinux_usddrphy_bitslip22_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[23] <= soclinux_usddrphy_bitslip23_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[55] <= soclinux_usddrphy_bitslip23_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[24] <= soclinux_usddrphy_bitslip24_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[56] <= soclinux_usddrphy_bitslip24_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[25] <= soclinux_usddrphy_bitslip25_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[57] <= soclinux_usddrphy_bitslip25_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[26] <= soclinux_usddrphy_bitslip26_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[58] <= soclinux_usddrphy_bitslip26_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[27] <= soclinux_usddrphy_bitslip27_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[59] <= soclinux_usddrphy_bitslip27_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[28] <= soclinux_usddrphy_bitslip28_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[60] <= soclinux_usddrphy_bitslip28_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[29] <= soclinux_usddrphy_bitslip29_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[61] <= soclinux_usddrphy_bitslip29_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[30] <= soclinux_usddrphy_bitslip30_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[62] <= soclinux_usddrphy_bitslip30_o[5]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[31] <= soclinux_usddrphy_bitslip31_o[4]; |
| soclinux_usddrphy_interface1_dfi_p2_rddata[63] <= soclinux_usddrphy_bitslip31_o[5]; |
| end |
| always @(*) begin |
| soclinux_usddrphy_interface1_dfi_p3_rddata <= 64'd0; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[0] <= soclinux_usddrphy_bitslip0_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[32] <= soclinux_usddrphy_bitslip0_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[1] <= soclinux_usddrphy_bitslip1_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[33] <= soclinux_usddrphy_bitslip1_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[2] <= soclinux_usddrphy_bitslip2_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[34] <= soclinux_usddrphy_bitslip2_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[3] <= soclinux_usddrphy_bitslip3_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[35] <= soclinux_usddrphy_bitslip3_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[4] <= soclinux_usddrphy_bitslip4_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[36] <= soclinux_usddrphy_bitslip4_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[5] <= soclinux_usddrphy_bitslip5_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[37] <= soclinux_usddrphy_bitslip5_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[6] <= soclinux_usddrphy_bitslip6_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[38] <= soclinux_usddrphy_bitslip6_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[7] <= soclinux_usddrphy_bitslip7_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[39] <= soclinux_usddrphy_bitslip7_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[8] <= soclinux_usddrphy_bitslip8_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[40] <= soclinux_usddrphy_bitslip8_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[9] <= soclinux_usddrphy_bitslip9_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[41] <= soclinux_usddrphy_bitslip9_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[10] <= soclinux_usddrphy_bitslip10_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[42] <= soclinux_usddrphy_bitslip10_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[11] <= soclinux_usddrphy_bitslip11_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[43] <= soclinux_usddrphy_bitslip11_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[12] <= soclinux_usddrphy_bitslip12_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[44] <= soclinux_usddrphy_bitslip12_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[13] <= soclinux_usddrphy_bitslip13_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[45] <= soclinux_usddrphy_bitslip13_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[14] <= soclinux_usddrphy_bitslip14_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[46] <= soclinux_usddrphy_bitslip14_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[15] <= soclinux_usddrphy_bitslip15_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[47] <= soclinux_usddrphy_bitslip15_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[16] <= soclinux_usddrphy_bitslip16_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[48] <= soclinux_usddrphy_bitslip16_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[17] <= soclinux_usddrphy_bitslip17_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[49] <= soclinux_usddrphy_bitslip17_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[18] <= soclinux_usddrphy_bitslip18_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[50] <= soclinux_usddrphy_bitslip18_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[19] <= soclinux_usddrphy_bitslip19_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[51] <= soclinux_usddrphy_bitslip19_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[20] <= soclinux_usddrphy_bitslip20_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[52] <= soclinux_usddrphy_bitslip20_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[21] <= soclinux_usddrphy_bitslip21_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[53] <= soclinux_usddrphy_bitslip21_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[22] <= soclinux_usddrphy_bitslip22_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[54] <= soclinux_usddrphy_bitslip22_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[23] <= soclinux_usddrphy_bitslip23_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[55] <= soclinux_usddrphy_bitslip23_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[24] <= soclinux_usddrphy_bitslip24_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[56] <= soclinux_usddrphy_bitslip24_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[25] <= soclinux_usddrphy_bitslip25_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[57] <= soclinux_usddrphy_bitslip25_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[26] <= soclinux_usddrphy_bitslip26_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[58] <= soclinux_usddrphy_bitslip26_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[27] <= soclinux_usddrphy_bitslip27_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[59] <= soclinux_usddrphy_bitslip27_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[28] <= soclinux_usddrphy_bitslip28_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[60] <= soclinux_usddrphy_bitslip28_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[29] <= soclinux_usddrphy_bitslip29_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[61] <= soclinux_usddrphy_bitslip29_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[30] <= soclinux_usddrphy_bitslip30_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[62] <= soclinux_usddrphy_bitslip30_o[7]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[31] <= soclinux_usddrphy_bitslip31_o[6]; |
| soclinux_usddrphy_interface1_dfi_p3_rddata[63] <= soclinux_usddrphy_bitslip31_o[7]; |
| end |
| assign soclinux_usddrphy_interface1_dfi_p0_rddata_valid = soclinux_usddrphy_phase_rddata_valid0; |
| assign soclinux_usddrphy_interface1_dfi_p1_rddata_valid = soclinux_usddrphy_phase_rddata_valid1; |
| assign soclinux_usddrphy_interface1_dfi_p2_rddata_valid = soclinux_usddrphy_phase_rddata_valid2; |
| assign soclinux_usddrphy_interface1_dfi_p3_rddata_valid = soclinux_usddrphy_phase_rddata_valid3; |
| assign soclinux_usddrphy_oe = ((soclinux_usddrphy_last_wrdata_en[2] | soclinux_usddrphy_last_wrdata_en[3]) | soclinux_usddrphy_last_wrdata_en[4]); |
| assign soclinux_usddrphy_interface1_dfi_p0_address = soclinux_usddrphy_interface0_dfi_p0_address; |
| assign soclinux_usddrphy_interface1_dfi_p0_bank = soclinux_usddrphy_interface0_dfi_p0_bank; |
| assign soclinux_usddrphy_interface1_dfi_p0_cs_n = soclinux_usddrphy_interface0_dfi_p0_cs_n; |
| assign soclinux_usddrphy_interface1_dfi_p0_cke = soclinux_usddrphy_interface0_dfi_p0_cke; |
| assign soclinux_usddrphy_interface1_dfi_p0_odt = soclinux_usddrphy_interface0_dfi_p0_odt; |
| assign soclinux_usddrphy_interface1_dfi_p0_reset_n = soclinux_usddrphy_interface0_dfi_p0_reset_n; |
| assign soclinux_usddrphy_interface1_dfi_p0_wrdata = soclinux_usddrphy_interface0_dfi_p0_wrdata; |
| assign soclinux_usddrphy_interface1_dfi_p0_wrdata_en = soclinux_usddrphy_interface0_dfi_p0_wrdata_en; |
| assign soclinux_usddrphy_interface1_dfi_p0_wrdata_mask = soclinux_usddrphy_interface0_dfi_p0_wrdata_mask; |
| assign soclinux_usddrphy_interface1_dfi_p0_rddata_en = soclinux_usddrphy_interface0_dfi_p0_rddata_en; |
| assign soclinux_usddrphy_interface0_dfi_p0_rddata = soclinux_usddrphy_interface1_dfi_p0_rddata; |
| assign soclinux_usddrphy_interface0_dfi_p0_rddata_valid = soclinux_usddrphy_interface1_dfi_p0_rddata_valid; |
| always @(*) begin |
| soclinux_usddrphy_interface1_dfi_p0_ras_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p0_we_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p0_act_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p0_cas_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p0_cas_n <= soclinux_usddrphy_interface0_dfi_p0_cas_n; |
| soclinux_usddrphy_interface1_dfi_p0_ras_n <= soclinux_usddrphy_interface0_dfi_p0_ras_n; |
| soclinux_usddrphy_interface1_dfi_p0_we_n <= soclinux_usddrphy_interface0_dfi_p0_we_n; |
| soclinux_usddrphy_interface1_dfi_p0_act_n <= soclinux_usddrphy_interface0_dfi_p0_act_n; |
| if ((((~soclinux_usddrphy_interface0_dfi_p0_ras_n) & soclinux_usddrphy_interface0_dfi_p0_cas_n) & soclinux_usddrphy_interface0_dfi_p0_we_n)) begin |
| soclinux_usddrphy_interface1_dfi_p0_act_n <= 1'd0; |
| soclinux_usddrphy_interface1_dfi_p0_we_n <= soclinux_usddrphy_interface0_dfi_p0_address[14]; |
| soclinux_usddrphy_interface1_dfi_p0_cas_n <= soclinux_usddrphy_interface0_dfi_p0_address[15]; |
| soclinux_usddrphy_interface1_dfi_p0_ras_n <= soclinux_usddrphy_interface0_dfi_p0_address[16]; |
| end else begin |
| soclinux_usddrphy_interface1_dfi_p0_act_n <= 1'd1; |
| end |
| end |
| assign soclinux_usddrphy_interface1_dfi_p1_address = soclinux_usddrphy_interface0_dfi_p1_address; |
| assign soclinux_usddrphy_interface1_dfi_p1_bank = soclinux_usddrphy_interface0_dfi_p1_bank; |
| assign soclinux_usddrphy_interface1_dfi_p1_cs_n = soclinux_usddrphy_interface0_dfi_p1_cs_n; |
| assign soclinux_usddrphy_interface1_dfi_p1_cke = soclinux_usddrphy_interface0_dfi_p1_cke; |
| assign soclinux_usddrphy_interface1_dfi_p1_odt = soclinux_usddrphy_interface0_dfi_p1_odt; |
| assign soclinux_usddrphy_interface1_dfi_p1_reset_n = soclinux_usddrphy_interface0_dfi_p1_reset_n; |
| assign soclinux_usddrphy_interface1_dfi_p1_wrdata = soclinux_usddrphy_interface0_dfi_p1_wrdata; |
| assign soclinux_usddrphy_interface1_dfi_p1_wrdata_en = soclinux_usddrphy_interface0_dfi_p1_wrdata_en; |
| assign soclinux_usddrphy_interface1_dfi_p1_wrdata_mask = soclinux_usddrphy_interface0_dfi_p1_wrdata_mask; |
| assign soclinux_usddrphy_interface1_dfi_p1_rddata_en = soclinux_usddrphy_interface0_dfi_p1_rddata_en; |
| assign soclinux_usddrphy_interface0_dfi_p1_rddata = soclinux_usddrphy_interface1_dfi_p1_rddata; |
| assign soclinux_usddrphy_interface0_dfi_p1_rddata_valid = soclinux_usddrphy_interface1_dfi_p1_rddata_valid; |
| always @(*) begin |
| soclinux_usddrphy_interface1_dfi_p1_ras_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p1_we_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p1_act_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p1_cas_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p1_cas_n <= soclinux_usddrphy_interface0_dfi_p1_cas_n; |
| soclinux_usddrphy_interface1_dfi_p1_ras_n <= soclinux_usddrphy_interface0_dfi_p1_ras_n; |
| soclinux_usddrphy_interface1_dfi_p1_we_n <= soclinux_usddrphy_interface0_dfi_p1_we_n; |
| soclinux_usddrphy_interface1_dfi_p1_act_n <= soclinux_usddrphy_interface0_dfi_p1_act_n; |
| if ((((~soclinux_usddrphy_interface0_dfi_p1_ras_n) & soclinux_usddrphy_interface0_dfi_p1_cas_n) & soclinux_usddrphy_interface0_dfi_p1_we_n)) begin |
| soclinux_usddrphy_interface1_dfi_p1_act_n <= 1'd0; |
| soclinux_usddrphy_interface1_dfi_p1_we_n <= soclinux_usddrphy_interface0_dfi_p1_address[14]; |
| soclinux_usddrphy_interface1_dfi_p1_cas_n <= soclinux_usddrphy_interface0_dfi_p1_address[15]; |
| soclinux_usddrphy_interface1_dfi_p1_ras_n <= soclinux_usddrphy_interface0_dfi_p1_address[16]; |
| end else begin |
| soclinux_usddrphy_interface1_dfi_p1_act_n <= 1'd1; |
| end |
| end |
| assign soclinux_usddrphy_interface1_dfi_p2_address = soclinux_usddrphy_interface0_dfi_p2_address; |
| assign soclinux_usddrphy_interface1_dfi_p2_bank = soclinux_usddrphy_interface0_dfi_p2_bank; |
| assign soclinux_usddrphy_interface1_dfi_p2_cs_n = soclinux_usddrphy_interface0_dfi_p2_cs_n; |
| assign soclinux_usddrphy_interface1_dfi_p2_cke = soclinux_usddrphy_interface0_dfi_p2_cke; |
| assign soclinux_usddrphy_interface1_dfi_p2_odt = soclinux_usddrphy_interface0_dfi_p2_odt; |
| assign soclinux_usddrphy_interface1_dfi_p2_reset_n = soclinux_usddrphy_interface0_dfi_p2_reset_n; |
| assign soclinux_usddrphy_interface1_dfi_p2_wrdata = soclinux_usddrphy_interface0_dfi_p2_wrdata; |
| assign soclinux_usddrphy_interface1_dfi_p2_wrdata_en = soclinux_usddrphy_interface0_dfi_p2_wrdata_en; |
| assign soclinux_usddrphy_interface1_dfi_p2_wrdata_mask = soclinux_usddrphy_interface0_dfi_p2_wrdata_mask; |
| assign soclinux_usddrphy_interface1_dfi_p2_rddata_en = soclinux_usddrphy_interface0_dfi_p2_rddata_en; |
| assign soclinux_usddrphy_interface0_dfi_p2_rddata = soclinux_usddrphy_interface1_dfi_p2_rddata; |
| assign soclinux_usddrphy_interface0_dfi_p2_rddata_valid = soclinux_usddrphy_interface1_dfi_p2_rddata_valid; |
| always @(*) begin |
| soclinux_usddrphy_interface1_dfi_p2_ras_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p2_we_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p2_act_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p2_cas_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p2_cas_n <= soclinux_usddrphy_interface0_dfi_p2_cas_n; |
| soclinux_usddrphy_interface1_dfi_p2_ras_n <= soclinux_usddrphy_interface0_dfi_p2_ras_n; |
| soclinux_usddrphy_interface1_dfi_p2_we_n <= soclinux_usddrphy_interface0_dfi_p2_we_n; |
| soclinux_usddrphy_interface1_dfi_p2_act_n <= soclinux_usddrphy_interface0_dfi_p2_act_n; |
| if ((((~soclinux_usddrphy_interface0_dfi_p2_ras_n) & soclinux_usddrphy_interface0_dfi_p2_cas_n) & soclinux_usddrphy_interface0_dfi_p2_we_n)) begin |
| soclinux_usddrphy_interface1_dfi_p2_act_n <= 1'd0; |
| soclinux_usddrphy_interface1_dfi_p2_we_n <= soclinux_usddrphy_interface0_dfi_p2_address[14]; |
| soclinux_usddrphy_interface1_dfi_p2_cas_n <= soclinux_usddrphy_interface0_dfi_p2_address[15]; |
| soclinux_usddrphy_interface1_dfi_p2_ras_n <= soclinux_usddrphy_interface0_dfi_p2_address[16]; |
| end else begin |
| soclinux_usddrphy_interface1_dfi_p2_act_n <= 1'd1; |
| end |
| end |
| assign soclinux_usddrphy_interface1_dfi_p3_address = soclinux_usddrphy_interface0_dfi_p3_address; |
| assign soclinux_usddrphy_interface1_dfi_p3_bank = soclinux_usddrphy_interface0_dfi_p3_bank; |
| assign soclinux_usddrphy_interface1_dfi_p3_cs_n = soclinux_usddrphy_interface0_dfi_p3_cs_n; |
| assign soclinux_usddrphy_interface1_dfi_p3_cke = soclinux_usddrphy_interface0_dfi_p3_cke; |
| assign soclinux_usddrphy_interface1_dfi_p3_odt = soclinux_usddrphy_interface0_dfi_p3_odt; |
| assign soclinux_usddrphy_interface1_dfi_p3_reset_n = soclinux_usddrphy_interface0_dfi_p3_reset_n; |
| assign soclinux_usddrphy_interface1_dfi_p3_wrdata = soclinux_usddrphy_interface0_dfi_p3_wrdata; |
| assign soclinux_usddrphy_interface1_dfi_p3_wrdata_en = soclinux_usddrphy_interface0_dfi_p3_wrdata_en; |
| assign soclinux_usddrphy_interface1_dfi_p3_wrdata_mask = soclinux_usddrphy_interface0_dfi_p3_wrdata_mask; |
| assign soclinux_usddrphy_interface1_dfi_p3_rddata_en = soclinux_usddrphy_interface0_dfi_p3_rddata_en; |
| assign soclinux_usddrphy_interface0_dfi_p3_rddata = soclinux_usddrphy_interface1_dfi_p3_rddata; |
| assign soclinux_usddrphy_interface0_dfi_p3_rddata_valid = soclinux_usddrphy_interface1_dfi_p3_rddata_valid; |
| always @(*) begin |
| soclinux_usddrphy_interface1_dfi_p3_ras_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p3_we_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p3_act_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p3_cas_n <= 1'd1; |
| soclinux_usddrphy_interface1_dfi_p3_cas_n <= soclinux_usddrphy_interface0_dfi_p3_cas_n; |
| soclinux_usddrphy_interface1_dfi_p3_ras_n <= soclinux_usddrphy_interface0_dfi_p3_ras_n; |
| soclinux_usddrphy_interface1_dfi_p3_we_n <= soclinux_usddrphy_interface0_dfi_p3_we_n; |
| soclinux_usddrphy_interface1_dfi_p3_act_n <= soclinux_usddrphy_interface0_dfi_p3_act_n; |
| if ((((~soclinux_usddrphy_interface0_dfi_p3_ras_n) & soclinux_usddrphy_interface0_dfi_p3_cas_n) & soclinux_usddrphy_interface0_dfi_p3_we_n)) begin |
| soclinux_usddrphy_interface1_dfi_p3_act_n <= 1'd0; |
| soclinux_usddrphy_interface1_dfi_p3_we_n <= soclinux_usddrphy_interface0_dfi_p3_address[14]; |
| soclinux_usddrphy_interface1_dfi_p3_cas_n <= soclinux_usddrphy_interface0_dfi_p3_address[15]; |
| soclinux_usddrphy_interface1_dfi_p3_ras_n <= soclinux_usddrphy_interface0_dfi_p3_address[16]; |
| end else begin |
| soclinux_usddrphy_interface1_dfi_p3_act_n <= 1'd1; |
| end |
| end |
| assign soclinux_usddrphy_done = (soclinux_usddrphy_count == 1'd0); |
| always @(*) begin |
| soclinux_usddrphy_bitslip0_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip0_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip0_o <= soclinux_usddrphy_bitslip0_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip0_o <= soclinux_usddrphy_bitslip0_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip0_o <= soclinux_usddrphy_bitslip0_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip0_o <= soclinux_usddrphy_bitslip0_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip0_o <= soclinux_usddrphy_bitslip0_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip0_o <= soclinux_usddrphy_bitslip0_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip0_o <= soclinux_usddrphy_bitslip0_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip0_o <= soclinux_usddrphy_bitslip0_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip1_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip1_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip1_o <= soclinux_usddrphy_bitslip1_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip1_o <= soclinux_usddrphy_bitslip1_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip1_o <= soclinux_usddrphy_bitslip1_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip1_o <= soclinux_usddrphy_bitslip1_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip1_o <= soclinux_usddrphy_bitslip1_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip1_o <= soclinux_usddrphy_bitslip1_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip1_o <= soclinux_usddrphy_bitslip1_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip1_o <= soclinux_usddrphy_bitslip1_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip2_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip2_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip2_o <= soclinux_usddrphy_bitslip2_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip2_o <= soclinux_usddrphy_bitslip2_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip2_o <= soclinux_usddrphy_bitslip2_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip2_o <= soclinux_usddrphy_bitslip2_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip2_o <= soclinux_usddrphy_bitslip2_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip2_o <= soclinux_usddrphy_bitslip2_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip2_o <= soclinux_usddrphy_bitslip2_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip2_o <= soclinux_usddrphy_bitslip2_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip3_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip3_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip3_o <= soclinux_usddrphy_bitslip3_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip3_o <= soclinux_usddrphy_bitslip3_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip3_o <= soclinux_usddrphy_bitslip3_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip3_o <= soclinux_usddrphy_bitslip3_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip3_o <= soclinux_usddrphy_bitslip3_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip3_o <= soclinux_usddrphy_bitslip3_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip3_o <= soclinux_usddrphy_bitslip3_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip3_o <= soclinux_usddrphy_bitslip3_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip4_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip4_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip4_o <= soclinux_usddrphy_bitslip4_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip4_o <= soclinux_usddrphy_bitslip4_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip4_o <= soclinux_usddrphy_bitslip4_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip4_o <= soclinux_usddrphy_bitslip4_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip4_o <= soclinux_usddrphy_bitslip4_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip4_o <= soclinux_usddrphy_bitslip4_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip4_o <= soclinux_usddrphy_bitslip4_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip4_o <= soclinux_usddrphy_bitslip4_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip5_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip5_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip5_o <= soclinux_usddrphy_bitslip5_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip5_o <= soclinux_usddrphy_bitslip5_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip5_o <= soclinux_usddrphy_bitslip5_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip5_o <= soclinux_usddrphy_bitslip5_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip5_o <= soclinux_usddrphy_bitslip5_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip5_o <= soclinux_usddrphy_bitslip5_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip5_o <= soclinux_usddrphy_bitslip5_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip5_o <= soclinux_usddrphy_bitslip5_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip6_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip6_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip6_o <= soclinux_usddrphy_bitslip6_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip6_o <= soclinux_usddrphy_bitslip6_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip6_o <= soclinux_usddrphy_bitslip6_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip6_o <= soclinux_usddrphy_bitslip6_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip6_o <= soclinux_usddrphy_bitslip6_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip6_o <= soclinux_usddrphy_bitslip6_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip6_o <= soclinux_usddrphy_bitslip6_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip6_o <= soclinux_usddrphy_bitslip6_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip7_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip7_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip7_o <= soclinux_usddrphy_bitslip7_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip7_o <= soclinux_usddrphy_bitslip7_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip7_o <= soclinux_usddrphy_bitslip7_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip7_o <= soclinux_usddrphy_bitslip7_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip7_o <= soclinux_usddrphy_bitslip7_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip7_o <= soclinux_usddrphy_bitslip7_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip7_o <= soclinux_usddrphy_bitslip7_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip7_o <= soclinux_usddrphy_bitslip7_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip8_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip8_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip8_o <= soclinux_usddrphy_bitslip8_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip8_o <= soclinux_usddrphy_bitslip8_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip8_o <= soclinux_usddrphy_bitslip8_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip8_o <= soclinux_usddrphy_bitslip8_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip8_o <= soclinux_usddrphy_bitslip8_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip8_o <= soclinux_usddrphy_bitslip8_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip8_o <= soclinux_usddrphy_bitslip8_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip8_o <= soclinux_usddrphy_bitslip8_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip9_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip9_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip9_o <= soclinux_usddrphy_bitslip9_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip9_o <= soclinux_usddrphy_bitslip9_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip9_o <= soclinux_usddrphy_bitslip9_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip9_o <= soclinux_usddrphy_bitslip9_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip9_o <= soclinux_usddrphy_bitslip9_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip9_o <= soclinux_usddrphy_bitslip9_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip9_o <= soclinux_usddrphy_bitslip9_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip9_o <= soclinux_usddrphy_bitslip9_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip10_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip10_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip10_o <= soclinux_usddrphy_bitslip10_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip10_o <= soclinux_usddrphy_bitslip10_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip10_o <= soclinux_usddrphy_bitslip10_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip10_o <= soclinux_usddrphy_bitslip10_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip10_o <= soclinux_usddrphy_bitslip10_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip10_o <= soclinux_usddrphy_bitslip10_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip10_o <= soclinux_usddrphy_bitslip10_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip10_o <= soclinux_usddrphy_bitslip10_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip11_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip11_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip11_o <= soclinux_usddrphy_bitslip11_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip11_o <= soclinux_usddrphy_bitslip11_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip11_o <= soclinux_usddrphy_bitslip11_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip11_o <= soclinux_usddrphy_bitslip11_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip11_o <= soclinux_usddrphy_bitslip11_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip11_o <= soclinux_usddrphy_bitslip11_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip11_o <= soclinux_usddrphy_bitslip11_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip11_o <= soclinux_usddrphy_bitslip11_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip12_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip12_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip12_o <= soclinux_usddrphy_bitslip12_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip12_o <= soclinux_usddrphy_bitslip12_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip12_o <= soclinux_usddrphy_bitslip12_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip12_o <= soclinux_usddrphy_bitslip12_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip12_o <= soclinux_usddrphy_bitslip12_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip12_o <= soclinux_usddrphy_bitslip12_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip12_o <= soclinux_usddrphy_bitslip12_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip12_o <= soclinux_usddrphy_bitslip12_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip13_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip13_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip13_o <= soclinux_usddrphy_bitslip13_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip13_o <= soclinux_usddrphy_bitslip13_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip13_o <= soclinux_usddrphy_bitslip13_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip13_o <= soclinux_usddrphy_bitslip13_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip13_o <= soclinux_usddrphy_bitslip13_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip13_o <= soclinux_usddrphy_bitslip13_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip13_o <= soclinux_usddrphy_bitslip13_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip13_o <= soclinux_usddrphy_bitslip13_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip14_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip14_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip14_o <= soclinux_usddrphy_bitslip14_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip14_o <= soclinux_usddrphy_bitslip14_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip14_o <= soclinux_usddrphy_bitslip14_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip14_o <= soclinux_usddrphy_bitslip14_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip14_o <= soclinux_usddrphy_bitslip14_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip14_o <= soclinux_usddrphy_bitslip14_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip14_o <= soclinux_usddrphy_bitslip14_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip14_o <= soclinux_usddrphy_bitslip14_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip15_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip15_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip15_o <= soclinux_usddrphy_bitslip15_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip15_o <= soclinux_usddrphy_bitslip15_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip15_o <= soclinux_usddrphy_bitslip15_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip15_o <= soclinux_usddrphy_bitslip15_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip15_o <= soclinux_usddrphy_bitslip15_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip15_o <= soclinux_usddrphy_bitslip15_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip15_o <= soclinux_usddrphy_bitslip15_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip15_o <= soclinux_usddrphy_bitslip15_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip16_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip16_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip16_o <= soclinux_usddrphy_bitslip16_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip16_o <= soclinux_usddrphy_bitslip16_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip16_o <= soclinux_usddrphy_bitslip16_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip16_o <= soclinux_usddrphy_bitslip16_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip16_o <= soclinux_usddrphy_bitslip16_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip16_o <= soclinux_usddrphy_bitslip16_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip16_o <= soclinux_usddrphy_bitslip16_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip16_o <= soclinux_usddrphy_bitslip16_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip17_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip17_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip17_o <= soclinux_usddrphy_bitslip17_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip17_o <= soclinux_usddrphy_bitslip17_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip17_o <= soclinux_usddrphy_bitslip17_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip17_o <= soclinux_usddrphy_bitslip17_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip17_o <= soclinux_usddrphy_bitslip17_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip17_o <= soclinux_usddrphy_bitslip17_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip17_o <= soclinux_usddrphy_bitslip17_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip17_o <= soclinux_usddrphy_bitslip17_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip18_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip18_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip18_o <= soclinux_usddrphy_bitslip18_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip18_o <= soclinux_usddrphy_bitslip18_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip18_o <= soclinux_usddrphy_bitslip18_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip18_o <= soclinux_usddrphy_bitslip18_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip18_o <= soclinux_usddrphy_bitslip18_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip18_o <= soclinux_usddrphy_bitslip18_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip18_o <= soclinux_usddrphy_bitslip18_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip18_o <= soclinux_usddrphy_bitslip18_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip19_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip19_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip19_o <= soclinux_usddrphy_bitslip19_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip19_o <= soclinux_usddrphy_bitslip19_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip19_o <= soclinux_usddrphy_bitslip19_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip19_o <= soclinux_usddrphy_bitslip19_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip19_o <= soclinux_usddrphy_bitslip19_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip19_o <= soclinux_usddrphy_bitslip19_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip19_o <= soclinux_usddrphy_bitslip19_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip19_o <= soclinux_usddrphy_bitslip19_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip20_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip20_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip20_o <= soclinux_usddrphy_bitslip20_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip20_o <= soclinux_usddrphy_bitslip20_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip20_o <= soclinux_usddrphy_bitslip20_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip20_o <= soclinux_usddrphy_bitslip20_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip20_o <= soclinux_usddrphy_bitslip20_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip20_o <= soclinux_usddrphy_bitslip20_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip20_o <= soclinux_usddrphy_bitslip20_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip20_o <= soclinux_usddrphy_bitslip20_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip21_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip21_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip21_o <= soclinux_usddrphy_bitslip21_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip21_o <= soclinux_usddrphy_bitslip21_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip21_o <= soclinux_usddrphy_bitslip21_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip21_o <= soclinux_usddrphy_bitslip21_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip21_o <= soclinux_usddrphy_bitslip21_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip21_o <= soclinux_usddrphy_bitslip21_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip21_o <= soclinux_usddrphy_bitslip21_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip21_o <= soclinux_usddrphy_bitslip21_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip22_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip22_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip22_o <= soclinux_usddrphy_bitslip22_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip22_o <= soclinux_usddrphy_bitslip22_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip22_o <= soclinux_usddrphy_bitslip22_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip22_o <= soclinux_usddrphy_bitslip22_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip22_o <= soclinux_usddrphy_bitslip22_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip22_o <= soclinux_usddrphy_bitslip22_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip22_o <= soclinux_usddrphy_bitslip22_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip22_o <= soclinux_usddrphy_bitslip22_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip23_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip23_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip23_o <= soclinux_usddrphy_bitslip23_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip23_o <= soclinux_usddrphy_bitslip23_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip23_o <= soclinux_usddrphy_bitslip23_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip23_o <= soclinux_usddrphy_bitslip23_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip23_o <= soclinux_usddrphy_bitslip23_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip23_o <= soclinux_usddrphy_bitslip23_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip23_o <= soclinux_usddrphy_bitslip23_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip23_o <= soclinux_usddrphy_bitslip23_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip24_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip24_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip24_o <= soclinux_usddrphy_bitslip24_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip24_o <= soclinux_usddrphy_bitslip24_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip24_o <= soclinux_usddrphy_bitslip24_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip24_o <= soclinux_usddrphy_bitslip24_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip24_o <= soclinux_usddrphy_bitslip24_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip24_o <= soclinux_usddrphy_bitslip24_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip24_o <= soclinux_usddrphy_bitslip24_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip24_o <= soclinux_usddrphy_bitslip24_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip25_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip25_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip25_o <= soclinux_usddrphy_bitslip25_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip25_o <= soclinux_usddrphy_bitslip25_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip25_o <= soclinux_usddrphy_bitslip25_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip25_o <= soclinux_usddrphy_bitslip25_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip25_o <= soclinux_usddrphy_bitslip25_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip25_o <= soclinux_usddrphy_bitslip25_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip25_o <= soclinux_usddrphy_bitslip25_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip25_o <= soclinux_usddrphy_bitslip25_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip26_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip26_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip26_o <= soclinux_usddrphy_bitslip26_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip26_o <= soclinux_usddrphy_bitslip26_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip26_o <= soclinux_usddrphy_bitslip26_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip26_o <= soclinux_usddrphy_bitslip26_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip26_o <= soclinux_usddrphy_bitslip26_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip26_o <= soclinux_usddrphy_bitslip26_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip26_o <= soclinux_usddrphy_bitslip26_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip26_o <= soclinux_usddrphy_bitslip26_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip27_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip27_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip27_o <= soclinux_usddrphy_bitslip27_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip27_o <= soclinux_usddrphy_bitslip27_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip27_o <= soclinux_usddrphy_bitslip27_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip27_o <= soclinux_usddrphy_bitslip27_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip27_o <= soclinux_usddrphy_bitslip27_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip27_o <= soclinux_usddrphy_bitslip27_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip27_o <= soclinux_usddrphy_bitslip27_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip27_o <= soclinux_usddrphy_bitslip27_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip28_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip28_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip28_o <= soclinux_usddrphy_bitslip28_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip28_o <= soclinux_usddrphy_bitslip28_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip28_o <= soclinux_usddrphy_bitslip28_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip28_o <= soclinux_usddrphy_bitslip28_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip28_o <= soclinux_usddrphy_bitslip28_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip28_o <= soclinux_usddrphy_bitslip28_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip28_o <= soclinux_usddrphy_bitslip28_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip28_o <= soclinux_usddrphy_bitslip28_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip29_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip29_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip29_o <= soclinux_usddrphy_bitslip29_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip29_o <= soclinux_usddrphy_bitslip29_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip29_o <= soclinux_usddrphy_bitslip29_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip29_o <= soclinux_usddrphy_bitslip29_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip29_o <= soclinux_usddrphy_bitslip29_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip29_o <= soclinux_usddrphy_bitslip29_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip29_o <= soclinux_usddrphy_bitslip29_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip29_o <= soclinux_usddrphy_bitslip29_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip30_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip30_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip30_o <= soclinux_usddrphy_bitslip30_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip30_o <= soclinux_usddrphy_bitslip30_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip30_o <= soclinux_usddrphy_bitslip30_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip30_o <= soclinux_usddrphy_bitslip30_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip30_o <= soclinux_usddrphy_bitslip30_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip30_o <= soclinux_usddrphy_bitslip30_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip30_o <= soclinux_usddrphy_bitslip30_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip30_o <= soclinux_usddrphy_bitslip30_r[14:7]; |
| end |
| endcase |
| end |
| always @(*) begin |
| soclinux_usddrphy_bitslip31_o <= 8'd0; |
| case (soclinux_usddrphy_bitslip31_value) |
| 1'd0: begin |
| soclinux_usddrphy_bitslip31_o <= soclinux_usddrphy_bitslip31_r[7:0]; |
| end |
| 1'd1: begin |
| soclinux_usddrphy_bitslip31_o <= soclinux_usddrphy_bitslip31_r[8:1]; |
| end |
| 2'd2: begin |
| soclinux_usddrphy_bitslip31_o <= soclinux_usddrphy_bitslip31_r[9:2]; |
| end |
| 2'd3: begin |
| soclinux_usddrphy_bitslip31_o <= soclinux_usddrphy_bitslip31_r[10:3]; |
| end |
| 3'd4: begin |
| soclinux_usddrphy_bitslip31_o <= soclinux_usddrphy_bitslip31_r[11:4]; |
| end |
| 3'd5: begin |
| soclinux_usddrphy_bitslip31_o <= soclinux_usddrphy_bitslip31_r[12:5]; |
| end |
| 3'd6: begin |
| soclinux_usddrphy_bitslip31_o <= soclinux_usddrphy_bitslip31_r[13:6]; |
| end |
| 3'd7: begin |
| soclinux_usddrphy_bitslip31_o <= soclinux_usddrphy_bitslip31_r[14:7]; |
| end |
| endcase |
| end |
| assign soclinux_usddrphy_interface0_dfi_p0_address = soclinux_sdram_master_p0_address; |
| assign soclinux_usddrphy_interface0_dfi_p0_bank = soclinux_sdram_master_p0_bank; |
| assign soclinux_usddrphy_interface0_dfi_p0_cas_n = soclinux_sdram_master_p0_cas_n; |
| assign soclinux_usddrphy_interface0_dfi_p0_cs_n = soclinux_sdram_master_p0_cs_n; |
| assign soclinux_usddrphy_interface0_dfi_p0_ras_n = soclinux_sdram_master_p0_ras_n; |
| assign soclinux_usddrphy_interface0_dfi_p0_we_n = soclinux_sdram_master_p0_we_n; |
| assign soclinux_usddrphy_interface0_dfi_p0_cke = soclinux_sdram_master_p0_cke; |
| assign soclinux_usddrphy_interface0_dfi_p0_odt = soclinux_sdram_master_p0_odt; |
| assign soclinux_usddrphy_interface0_dfi_p0_reset_n = soclinux_sdram_master_p0_reset_n; |
| assign soclinux_usddrphy_interface0_dfi_p0_act_n = soclinux_sdram_master_p0_act_n; |
| assign soclinux_usddrphy_interface0_dfi_p0_wrdata = soclinux_sdram_master_p0_wrdata; |
| assign soclinux_usddrphy_interface0_dfi_p0_wrdata_en = soclinux_sdram_master_p0_wrdata_en; |
| assign soclinux_usddrphy_interface0_dfi_p0_wrdata_mask = soclinux_sdram_master_p0_wrdata_mask; |
| assign soclinux_usddrphy_interface0_dfi_p0_rddata_en = soclinux_sdram_master_p0_rddata_en; |
| assign soclinux_sdram_master_p0_rddata = soclinux_usddrphy_interface0_dfi_p0_rddata; |
| assign soclinux_sdram_master_p0_rddata_valid = soclinux_usddrphy_interface0_dfi_p0_rddata_valid; |
| assign soclinux_usddrphy_interface0_dfi_p1_address = soclinux_sdram_master_p1_address; |
| assign soclinux_usddrphy_interface0_dfi_p1_bank = soclinux_sdram_master_p1_bank; |
| assign soclinux_usddrphy_interface0_dfi_p1_cas_n = soclinux_sdram_master_p1_cas_n; |
| assign soclinux_usddrphy_interface0_dfi_p1_cs_n = soclinux_sdram_master_p1_cs_n; |
| assign soclinux_usddrphy_interface0_dfi_p1_ras_n = soclinux_sdram_master_p1_ras_n; |
| assign soclinux_usddrphy_interface0_dfi_p1_we_n = soclinux_sdram_master_p1_we_n; |
| assign soclinux_usddrphy_interface0_dfi_p1_cke = soclinux_sdram_master_p1_cke; |
| assign soclinux_usddrphy_interface0_dfi_p1_odt = soclinux_sdram_master_p1_odt; |
| assign soclinux_usddrphy_interface0_dfi_p1_reset_n = soclinux_sdram_master_p1_reset_n; |
| assign soclinux_usddrphy_interface0_dfi_p1_act_n = soclinux_sdram_master_p1_act_n; |
| assign soclinux_usddrphy_interface0_dfi_p1_wrdata = soclinux_sdram_master_p1_wrdata; |
| assign soclinux_usddrphy_interface0_dfi_p1_wrdata_en = soclinux_sdram_master_p1_wrdata_en; |
| assign soclinux_usddrphy_interface0_dfi_p1_wrdata_mask = soclinux_sdram_master_p1_wrdata_mask; |
| assign soclinux_usddrphy_interface0_dfi_p1_rddata_en = soclinux_sdram_master_p1_rddata_en; |
| assign soclinux_sdram_master_p1_rddata = soclinux_usddrphy_interface0_dfi_p1_rddata; |
| assign soclinux_sdram_master_p1_rddata_valid = soclinux_usddrphy_interface0_dfi_p1_rddata_valid; |
| assign soclinux_usddrphy_interface0_dfi_p2_address = soclinux_sdram_master_p2_address; |
| assign soclinux_usddrphy_interface0_dfi_p2_bank = soclinux_sdram_master_p2_bank; |
| assign soclinux_usddrphy_interface0_dfi_p2_cas_n = soclinux_sdram_master_p2_cas_n; |
| assign soclinux_usddrphy_interface0_dfi_p2_cs_n = soclinux_sdram_master_p2_cs_n; |
| assign soclinux_usddrphy_interface0_dfi_p2_ras_n = soclinux_sdram_master_p2_ras_n; |
| assign soclinux_usddrphy_interface0_dfi_p2_we_n = soclinux_sdram_master_p2_we_n; |
| assign soclinux_usddrphy_interface0_dfi_p2_cke = soclinux_sdram_master_p2_cke; |
| assign soclinux_usddrphy_interface0_dfi_p2_odt = soclinux_sdram_master_p2_odt; |
| assign soclinux_usddrphy_interface0_dfi_p2_reset_n = soclinux_sdram_master_p2_reset_n; |
| assign soclinux_usddrphy_interface0_dfi_p2_act_n = soclinux_sdram_master_p2_act_n; |
| assign soclinux_usddrphy_interface0_dfi_p2_wrdata = soclinux_sdram_master_p2_wrdata; |
| assign soclinux_usddrphy_interface0_dfi_p2_wrdata_en = soclinux_sdram_master_p2_wrdata_en; |
| assign soclinux_usddrphy_interface0_dfi_p2_wrdata_mask = soclinux_sdram_master_p2_wrdata_mask; |
| assign soclinux_usddrphy_interface0_dfi_p2_rddata_en = soclinux_sdram_master_p2_rddata_en; |
| assign soclinux_sdram_master_p2_rddata = soclinux_usddrphy_interface0_dfi_p2_rddata; |
| assign soclinux_sdram_master_p2_rddata_valid = soclinux_usddrphy_interface0_dfi_p2_rddata_valid; |
| assign soclinux_usddrphy_interface0_dfi_p3_address = soclinux_sdram_master_p3_address; |
| assign soclinux_usddrphy_interface0_dfi_p3_bank = soclinux_sdram_master_p3_bank; |
| assign soclinux_usddrphy_interface0_dfi_p3_cas_n = soclinux_sdram_master_p3_cas_n; |
| assign soclinux_usddrphy_interface0_dfi_p3_cs_n = soclinux_sdram_master_p3_cs_n; |
| assign soclinux_usddrphy_interface0_dfi_p3_ras_n = soclinux_sdram_master_p3_ras_n; |
| assign soclinux_usddrphy_interface0_dfi_p3_we_n = soclinux_sdram_master_p3_we_n; |
| assign soclinux_usddrphy_interface0_dfi_p3_cke = soclinux_sdram_master_p3_cke; |
| assign soclinux_usddrphy_interface0_dfi_p3_odt = soclinux_sdram_master_p3_odt; |
| assign soclinux_usddrphy_interface0_dfi_p3_reset_n = soclinux_sdram_master_p3_reset_n; |
| assign soclinux_usddrphy_interface0_dfi_p3_act_n = soclinux_sdram_master_p3_act_n; |
| assign soclinux_usddrphy_interface0_dfi_p3_wrdata = soclinux_sdram_master_p3_wrdata; |
| assign soclinux_usddrphy_interface0_dfi_p3_wrdata_en = soclinux_sdram_master_p3_wrdata_en; |
| assign soclinux_usddrphy_interface0_dfi_p3_wrdata_mask = soclinux_sdram_master_p3_wrdata_mask; |
| assign soclinux_usddrphy_interface0_dfi_p3_rddata_en = soclinux_sdram_master_p3_rddata_en; |
| assign soclinux_sdram_master_p3_rddata = soclinux_usddrphy_interface0_dfi_p3_rddata; |
| assign soclinux_sdram_master_p3_rddata_valid = soclinux_usddrphy_interface0_dfi_p3_rddata_valid; |
| assign soclinux_sdram_slave_p0_address = soclinux_sdram_dfi_p0_address; |
| assign soclinux_sdram_slave_p0_bank = soclinux_sdram_dfi_p0_bank; |
| assign soclinux_sdram_slave_p0_cas_n = soclinux_sdram_dfi_p0_cas_n; |
| assign soclinux_sdram_slave_p0_cs_n = soclinux_sdram_dfi_p0_cs_n; |
| assign soclinux_sdram_slave_p0_ras_n = soclinux_sdram_dfi_p0_ras_n; |
| assign soclinux_sdram_slave_p0_we_n = soclinux_sdram_dfi_p0_we_n; |
| assign soclinux_sdram_slave_p0_cke = soclinux_sdram_dfi_p0_cke; |
| assign soclinux_sdram_slave_p0_odt = soclinux_sdram_dfi_p0_odt; |
| assign soclinux_sdram_slave_p0_reset_n = soclinux_sdram_dfi_p0_reset_n; |
| assign soclinux_sdram_slave_p0_act_n = soclinux_sdram_dfi_p0_act_n; |
| assign soclinux_sdram_slave_p0_wrdata = soclinux_sdram_dfi_p0_wrdata; |
| assign soclinux_sdram_slave_p0_wrdata_en = soclinux_sdram_dfi_p0_wrdata_en; |
| assign soclinux_sdram_slave_p0_wrdata_mask = soclinux_sdram_dfi_p0_wrdata_mask; |
| assign soclinux_sdram_slave_p0_rddata_en = soclinux_sdram_dfi_p0_rddata_en; |
| assign soclinux_sdram_dfi_p0_rddata = soclinux_sdram_slave_p0_rddata; |
| assign soclinux_sdram_dfi_p0_rddata_valid = soclinux_sdram_slave_p0_rddata_valid; |
| assign soclinux_sdram_slave_p1_address = soclinux_sdram_dfi_p1_address; |
| assign soclinux_sdram_slave_p1_bank = soclinux_sdram_dfi_p1_bank; |
| assign soclinux_sdram_slave_p1_cas_n = soclinux_sdram_dfi_p1_cas_n; |
| assign soclinux_sdram_slave_p1_cs_n = soclinux_sdram_dfi_p1_cs_n; |
| assign soclinux_sdram_slave_p1_ras_n = soclinux_sdram_dfi_p1_ras_n; |
| assign soclinux_sdram_slave_p1_we_n = soclinux_sdram_dfi_p1_we_n; |
| assign soclinux_sdram_slave_p1_cke = soclinux_sdram_dfi_p1_cke; |
| assign soclinux_sdram_slave_p1_odt = soclinux_sdram_dfi_p1_odt; |
| assign soclinux_sdram_slave_p1_reset_n = soclinux_sdram_dfi_p1_reset_n; |
| assign soclinux_sdram_slave_p1_act_n = soclinux_sdram_dfi_p1_act_n; |
| assign soclinux_sdram_slave_p1_wrdata = soclinux_sdram_dfi_p1_wrdata; |
| assign soclinux_sdram_slave_p1_wrdata_en = soclinux_sdram_dfi_p1_wrdata_en; |
| assign soclinux_sdram_slave_p1_wrdata_mask = soclinux_sdram_dfi_p1_wrdata_mask; |
| assign soclinux_sdram_slave_p1_rddata_en = soclinux_sdram_dfi_p1_rddata_en; |
| assign soclinux_sdram_dfi_p1_rddata = soclinux_sdram_slave_p1_rddata; |
| assign soclinux_sdram_dfi_p1_rddata_valid = soclinux_sdram_slave_p1_rddata_valid; |
| assign soclinux_sdram_slave_p2_address = soclinux_sdram_dfi_p2_address; |
| assign soclinux_sdram_slave_p2_bank = soclinux_sdram_dfi_p2_bank; |
| assign soclinux_sdram_slave_p2_cas_n = soclinux_sdram_dfi_p2_cas_n; |
| assign soclinux_sdram_slave_p2_cs_n = soclinux_sdram_dfi_p2_cs_n; |
| assign soclinux_sdram_slave_p2_ras_n = soclinux_sdram_dfi_p2_ras_n; |
| assign soclinux_sdram_slave_p2_we_n = soclinux_sdram_dfi_p2_we_n; |
| assign soclinux_sdram_slave_p2_cke = soclinux_sdram_dfi_p2_cke; |
| assign soclinux_sdram_slave_p2_odt = soclinux_sdram_dfi_p2_odt; |
| assign soclinux_sdram_slave_p2_reset_n = soclinux_sdram_dfi_p2_reset_n; |
| assign soclinux_sdram_slave_p2_act_n = soclinux_sdram_dfi_p2_act_n; |
| assign soclinux_sdram_slave_p2_wrdata = soclinux_sdram_dfi_p2_wrdata; |
| assign soclinux_sdram_slave_p2_wrdata_en = soclinux_sdram_dfi_p2_wrdata_en; |
| assign soclinux_sdram_slave_p2_wrdata_mask = soclinux_sdram_dfi_p2_wrdata_mask; |
| assign soclinux_sdram_slave_p2_rddata_en = soclinux_sdram_dfi_p2_rddata_en; |
| assign soclinux_sdram_dfi_p2_rddata = soclinux_sdram_slave_p2_rddata; |
| assign soclinux_sdram_dfi_p2_rddata_valid = soclinux_sdram_slave_p2_rddata_valid; |
| assign soclinux_sdram_slave_p3_address = soclinux_sdram_dfi_p3_address; |
| assign soclinux_sdram_slave_p3_bank = soclinux_sdram_dfi_p3_bank; |
| assign soclinux_sdram_slave_p3_cas_n = soclinux_sdram_dfi_p3_cas_n; |
| assign soclinux_sdram_slave_p3_cs_n = soclinux_sdram_dfi_p3_cs_n; |
| assign soclinux_sdram_slave_p3_ras_n = soclinux_sdram_dfi_p3_ras_n; |
| assign soclinux_sdram_slave_p3_we_n = soclinux_sdram_dfi_p3_we_n; |
| assign soclinux_sdram_slave_p3_cke = soclinux_sdram_dfi_p3_cke; |
| assign soclinux_sdram_slave_p3_odt = soclinux_sdram_dfi_p3_odt; |
| assign soclinux_sdram_slave_p3_reset_n = soclinux_sdram_dfi_p3_reset_n; |
| assign soclinux_sdram_slave_p3_act_n = soclinux_sdram_dfi_p3_act_n; |
| assign soclinux_sdram_slave_p3_wrdata = soclinux_sdram_dfi_p3_wrdata; |
| assign soclinux_sdram_slave_p3_wrdata_en = soclinux_sdram_dfi_p3_wrdata_en; |
| assign soclinux_sdram_slave_p3_wrdata_mask = soclinux_sdram_dfi_p3_wrdata_mask; |
| assign soclinux_sdram_slave_p3_rddata_en = soclinux_sdram_dfi_p3_rddata_en; |
| assign soclinux_sdram_dfi_p3_rddata = soclinux_sdram_slave_p3_rddata; |
| assign soclinux_sdram_dfi_p3_rddata_valid = soclinux_sdram_slave_p3_rddata_valid; |
| always @(*) begin |
| soclinux_sdram_slave_p2_rddata <= 64'd0; |
| soclinux_sdram_slave_p2_rddata_valid <= 1'd0; |
| soclinux_sdram_slave_p3_rddata <= 64'd0; |
| soclinux_sdram_slave_p3_rddata_valid <= 1'd0; |
| soclinux_sdram_inti_p0_rddata <= 64'd0; |
| soclinux_sdram_inti_p0_rddata_valid <= 1'd0; |
| soclinux_sdram_master_p0_address <= 15'd0; |
| soclinux_sdram_master_p0_bank <= 4'd0; |
| soclinux_sdram_master_p0_cas_n <= 1'd1; |
| soclinux_sdram_master_p0_cs_n <= 1'd1; |
| soclinux_sdram_master_p0_ras_n <= 1'd1; |
| soclinux_sdram_master_p0_we_n <= 1'd1; |
| soclinux_sdram_master_p0_cke <= 1'd0; |
| soclinux_sdram_master_p0_odt <= 1'd0; |
| soclinux_sdram_master_p0_reset_n <= 1'd0; |
| soclinux_sdram_master_p0_act_n <= 1'd1; |
| soclinux_sdram_master_p0_wrdata <= 64'd0; |
| soclinux_sdram_inti_p1_rddata <= 64'd0; |
| soclinux_sdram_master_p0_wrdata_en <= 1'd0; |
| soclinux_sdram_inti_p1_rddata_valid <= 1'd0; |
| soclinux_sdram_master_p0_wrdata_mask <= 8'd0; |
| soclinux_sdram_master_p0_rddata_en <= 1'd0; |
| soclinux_sdram_master_p1_address <= 15'd0; |
| soclinux_sdram_master_p1_bank <= 4'd0; |
| soclinux_sdram_master_p1_cas_n <= 1'd1; |
| soclinux_sdram_master_p1_cs_n <= 1'd1; |
| soclinux_sdram_master_p1_ras_n <= 1'd1; |
| soclinux_sdram_master_p1_we_n <= 1'd1; |
| soclinux_sdram_master_p1_cke <= 1'd0; |
| soclinux_sdram_master_p1_odt <= 1'd0; |
| soclinux_sdram_master_p1_reset_n <= 1'd0; |
| soclinux_sdram_master_p1_act_n <= 1'd1; |
| soclinux_sdram_inti_p2_rddata <= 64'd0; |
| soclinux_sdram_master_p1_wrdata <= 64'd0; |
| soclinux_sdram_inti_p2_rddata_valid <= 1'd0; |
| soclinux_sdram_master_p1_wrdata_en <= 1'd0; |
| soclinux_sdram_master_p1_wrdata_mask <= 8'd0; |
| soclinux_sdram_master_p1_rddata_en <= 1'd0; |
| soclinux_sdram_master_p2_address <= 15'd0; |
| soclinux_sdram_master_p2_bank <= 4'd0; |
| soclinux_sdram_master_p2_cas_n <= 1'd1; |
| soclinux_sdram_master_p2_cs_n <= 1'd1; |
| soclinux_sdram_master_p2_ras_n <= 1'd1; |
| soclinux_sdram_master_p2_we_n <= 1'd1; |
| soclinux_sdram_master_p2_cke <= 1'd0; |
| soclinux_sdram_master_p2_odt <= 1'd0; |
| soclinux_sdram_master_p2_reset_n <= 1'd0; |
| soclinux_sdram_master_p2_act_n <= 1'd1; |
| soclinux_sdram_master_p2_wrdata <= 64'd0; |
| soclinux_sdram_inti_p3_rddata <= 64'd0; |
| soclinux_sdram_master_p2_wrdata_en <= 1'd0; |
| soclinux_sdram_inti_p3_rddata_valid <= 1'd0; |
| soclinux_sdram_master_p2_wrdata_mask <= 8'd0; |
| soclinux_sdram_master_p2_rddata_en <= 1'd0; |
| soclinux_sdram_master_p3_address <= 15'd0; |
| soclinux_sdram_master_p3_bank <= 4'd0; |
| soclinux_sdram_master_p3_cas_n <= 1'd1; |
| soclinux_sdram_master_p3_cs_n <= 1'd1; |
| soclinux_sdram_master_p3_ras_n <= 1'd1; |
| soclinux_sdram_master_p3_we_n <= 1'd1; |
| soclinux_sdram_master_p3_cke <= 1'd0; |
| soclinux_sdram_master_p3_odt <= 1'd0; |
| soclinux_sdram_master_p3_reset_n <= 1'd0; |
| soclinux_sdram_master_p3_act_n <= 1'd1; |
| soclinux_sdram_master_p3_wrdata <= 64'd0; |
| soclinux_sdram_master_p3_wrdata_en <= 1'd0; |
| soclinux_sdram_master_p3_wrdata_mask <= 8'd0; |
| soclinux_sdram_master_p3_rddata_en <= 1'd0; |
| soclinux_sdram_slave_p0_rddata <= 64'd0; |
| soclinux_sdram_slave_p0_rddata_valid <= 1'd0; |
| soclinux_sdram_slave_p1_rddata <= 64'd0; |
| soclinux_sdram_slave_p1_rddata_valid <= 1'd0; |
| if (soclinux_sdram_storage[0]) begin |
| soclinux_sdram_master_p0_address <= soclinux_sdram_slave_p0_address; |
| soclinux_sdram_master_p0_bank <= soclinux_sdram_slave_p0_bank; |
| soclinux_sdram_master_p0_cas_n <= soclinux_sdram_slave_p0_cas_n; |
| soclinux_sdram_master_p0_cs_n <= soclinux_sdram_slave_p0_cs_n; |
| soclinux_sdram_master_p0_ras_n <= soclinux_sdram_slave_p0_ras_n; |
| soclinux_sdram_master_p0_we_n <= soclinux_sdram_slave_p0_we_n; |
| soclinux_sdram_master_p0_cke <= soclinux_sdram_slave_p0_cke; |
| soclinux_sdram_master_p0_odt <= soclinux_sdram_slave_p0_odt; |
| soclinux_sdram_master_p0_reset_n <= soclinux_sdram_slave_p0_reset_n; |
| soclinux_sdram_master_p0_act_n <= soclinux_sdram_slave_p0_act_n; |
| soclinux_sdram_master_p0_wrdata <= soclinux_sdram_slave_p0_wrdata; |
| soclinux_sdram_master_p0_wrdata_en <= soclinux_sdram_slave_p0_wrdata_en; |
| soclinux_sdram_master_p0_wrdata_mask <= soclinux_sdram_slave_p0_wrdata_mask; |
| soclinux_sdram_master_p0_rddata_en <= soclinux_sdram_slave_p0_rddata_en; |
| soclinux_sdram_slave_p0_rddata <= soclinux_sdram_master_p0_rddata; |
| soclinux_sdram_slave_p0_rddata_valid <= soclinux_sdram_master_p0_rddata_valid; |
| soclinux_sdram_master_p1_address <= soclinux_sdram_slave_p1_address; |
| soclinux_sdram_master_p1_bank <= soclinux_sdram_slave_p1_bank; |
| soclinux_sdram_master_p1_cas_n <= soclinux_sdram_slave_p1_cas_n; |
| soclinux_sdram_master_p1_cs_n <= soclinux_sdram_slave_p1_cs_n; |
| soclinux_sdram_master_p1_ras_n <= soclinux_sdram_slave_p1_ras_n; |
| soclinux_sdram_master_p1_we_n <= soclinux_sdram_slave_p1_we_n; |
| soclinux_sdram_master_p1_cke <= soclinux_sdram_slave_p1_cke; |
| soclinux_sdram_master_p1_odt <= soclinux_sdram_slave_p1_odt; |
| soclinux_sdram_master_p1_reset_n <= soclinux_sdram_slave_p1_reset_n; |
| soclinux_sdram_master_p1_act_n <= soclinux_sdram_slave_p1_act_n; |
| soclinux_sdram_master_p1_wrdata <= soclinux_sdram_slave_p1_wrdata; |
| soclinux_sdram_master_p1_wrdata_en <= soclinux_sdram_slave_p1_wrdata_en; |
| soclinux_sdram_master_p1_wrdata_mask <= soclinux_sdram_slave_p1_wrdata_mask; |
| soclinux_sdram_master_p1_rddata_en <= soclinux_sdram_slave_p1_rddata_en; |
| soclinux_sdram_slave_p1_rddata <= soclinux_sdram_master_p1_rddata; |
| soclinux_sdram_slave_p1_rddata_valid <= soclinux_sdram_master_p1_rddata_valid; |
| soclinux_sdram_master_p2_address <= soclinux_sdram_slave_p2_address; |
| soclinux_sdram_master_p2_bank <= soclinux_sdram_slave_p2_bank; |
| soclinux_sdram_master_p2_cas_n <= soclinux_sdram_slave_p2_cas_n; |
| soclinux_sdram_master_p2_cs_n <= soclinux_sdram_slave_p2_cs_n; |
| soclinux_sdram_master_p2_ras_n <= soclinux_sdram_slave_p2_ras_n; |
| soclinux_sdram_master_p2_we_n <= soclinux_sdram_slave_p2_we_n; |
| soclinux_sdram_master_p2_cke <= soclinux_sdram_slave_p2_cke; |
| soclinux_sdram_master_p2_odt <= soclinux_sdram_slave_p2_odt; |
| soclinux_sdram_master_p2_reset_n <= soclinux_sdram_slave_p2_reset_n; |
| soclinux_sdram_master_p2_act_n <= soclinux_sdram_slave_p2_act_n; |
| soclinux_sdram_master_p2_wrdata <= soclinux_sdram_slave_p2_wrdata; |
| soclinux_sdram_master_p2_wrdata_en <= soclinux_sdram_slave_p2_wrdata_en; |
| soclinux_sdram_master_p2_wrdata_mask <= soclinux_sdram_slave_p2_wrdata_mask; |
| soclinux_sdram_master_p2_rddata_en <= soclinux_sdram_slave_p2_rddata_en; |
| soclinux_sdram_slave_p2_rddata <= soclinux_sdram_master_p2_rddata; |
| soclinux_sdram_slave_p2_rddata_valid <= soclinux_sdram_master_p2_rddata_valid; |
| soclinux_sdram_master_p3_address <= soclinux_sdram_slave_p3_address; |
| soclinux_sdram_master_p3_bank <= soclinux_sdram_slave_p3_bank; |
| soclinux_sdram_master_p3_cas_n <= soclinux_sdram_slave_p3_cas_n; |
| soclinux_sdram_master_p3_cs_n <= soclinux_sdram_slave_p3_cs_n; |
| soclinux_sdram_master_p3_ras_n <= soclinux_sdram_slave_p3_ras_n; |
| soclinux_sdram_master_p3_we_n <= soclinux_sdram_slave_p3_we_n; |
| soclinux_sdram_master_p3_cke <= soclinux_sdram_slave_p3_cke; |
| soclinux_sdram_master_p3_odt <= soclinux_sdram_slave_p3_odt; |
| soclinux_sdram_master_p3_reset_n <= soclinux_sdram_slave_p3_reset_n; |
| soclinux_sdram_master_p3_act_n <= soclinux_sdram_slave_p3_act_n; |
| soclinux_sdram_master_p3_wrdata <= soclinux_sdram_slave_p3_wrdata; |
| soclinux_sdram_master_p3_wrdata_en <= soclinux_sdram_slave_p3_wrdata_en; |
| soclinux_sdram_master_p3_wrdata_mask <= soclinux_sdram_slave_p3_wrdata_mask; |
| soclinux_sdram_master_p3_rddata_en <= soclinux_sdram_slave_p3_rddata_en; |
| soclinux_sdram_slave_p3_rddata <= soclinux_sdram_master_p3_rddata; |
| soclinux_sdram_slave_p3_rddata_valid <= soclinux_sdram_master_p3_rddata_valid; |
| end else begin |
| soclinux_sdram_master_p0_address <= soclinux_sdram_inti_p0_address; |
| soclinux_sdram_master_p0_bank <= soclinux_sdram_inti_p0_bank; |
| soclinux_sdram_master_p0_cas_n <= soclinux_sdram_inti_p0_cas_n; |
| soclinux_sdram_master_p0_cs_n <= soclinux_sdram_inti_p0_cs_n; |
| soclinux_sdram_master_p0_ras_n <= soclinux_sdram_inti_p0_ras_n; |
| soclinux_sdram_master_p0_we_n <= soclinux_sdram_inti_p0_we_n; |
| soclinux_sdram_master_p0_cke <= soclinux_sdram_inti_p0_cke; |
| soclinux_sdram_master_p0_odt <= soclinux_sdram_inti_p0_odt; |
| soclinux_sdram_master_p0_reset_n <= soclinux_sdram_inti_p0_reset_n; |
| soclinux_sdram_master_p0_act_n <= soclinux_sdram_inti_p0_act_n; |
| soclinux_sdram_master_p0_wrdata <= soclinux_sdram_inti_p0_wrdata; |
| soclinux_sdram_master_p0_wrdata_en <= soclinux_sdram_inti_p0_wrdata_en; |
| soclinux_sdram_master_p0_wrdata_mask <= soclinux_sdram_inti_p0_wrdata_mask; |
| soclinux_sdram_master_p0_rddata_en <= soclinux_sdram_inti_p0_rddata_en; |
| soclinux_sdram_inti_p0_rddata <= soclinux_sdram_master_p0_rddata; |
| soclinux_sdram_inti_p0_rddata_valid <= soclinux_sdram_master_p0_rddata_valid; |
| soclinux_sdram_master_p1_address <= soclinux_sdram_inti_p1_address; |
| soclinux_sdram_master_p1_bank <= soclinux_sdram_inti_p1_bank; |
| soclinux_sdram_master_p1_cas_n <= soclinux_sdram_inti_p1_cas_n; |
| soclinux_sdram_master_p1_cs_n <= soclinux_sdram_inti_p1_cs_n; |
| soclinux_sdram_master_p1_ras_n <= soclinux_sdram_inti_p1_ras_n; |
| soclinux_sdram_master_p1_we_n <= soclinux_sdram_inti_p1_we_n; |
| soclinux_sdram_master_p1_cke <= soclinux_sdram_inti_p1_cke; |
| soclinux_sdram_master_p1_odt <= soclinux_sdram_inti_p1_odt; |
| soclinux_sdram_master_p1_reset_n <= soclinux_sdram_inti_p1_reset_n; |
| soclinux_sdram_master_p1_act_n <= soclinux_sdram_inti_p1_act_n; |
| soclinux_sdram_master_p1_wrdata <= soclinux_sdram_inti_p1_wrdata; |
| soclinux_sdram_master_p1_wrdata_en <= soclinux_sdram_inti_p1_wrdata_en; |
| soclinux_sdram_master_p1_wrdata_mask <= soclinux_sdram_inti_p1_wrdata_mask; |
| soclinux_sdram_master_p1_rddata_en <= soclinux_sdram_inti_p1_rddata_en; |
| soclinux_sdram_inti_p1_rddata <= soclinux_sdram_master_p1_rddata; |
| soclinux_sdram_inti_p1_rddata_valid <= soclinux_sdram_master_p1_rddata_valid; |
| soclinux_sdram_master_p2_address <= soclinux_sdram_inti_p2_address; |
| soclinux_sdram_master_p2_bank <= soclinux_sdram_inti_p2_bank; |
| soclinux_sdram_master_p2_cas_n <= soclinux_sdram_inti_p2_cas_n; |
| soclinux_sdram_master_p2_cs_n <= soclinux_sdram_inti_p2_cs_n; |
| soclinux_sdram_master_p2_ras_n <= soclinux_sdram_inti_p2_ras_n; |
| soclinux_sdram_master_p2_we_n <= soclinux_sdram_inti_p2_we_n; |
| soclinux_sdram_master_p2_cke <= soclinux_sdram_inti_p2_cke; |
| soclinux_sdram_master_p2_odt <= soclinux_sdram_inti_p2_odt; |
| soclinux_sdram_master_p2_reset_n <= soclinux_sdram_inti_p2_reset_n; |
| soclinux_sdram_master_p2_act_n <= soclinux_sdram_inti_p2_act_n; |
| soclinux_sdram_master_p2_wrdata <= soclinux_sdram_inti_p2_wrdata; |
| soclinux_sdram_master_p2_wrdata_en <= soclinux_sdram_inti_p2_wrdata_en; |
| soclinux_sdram_master_p2_wrdata_mask <= soclinux_sdram_inti_p2_wrdata_mask; |
| soclinux_sdram_master_p2_rddata_en <= soclinux_sdram_inti_p2_rddata_en; |
| soclinux_sdram_inti_p2_rddata <= soclinux_sdram_master_p2_rddata; |
| soclinux_sdram_inti_p2_rddata_valid <= soclinux_sdram_master_p2_rddata_valid; |
| soclinux_sdram_master_p3_address <= soclinux_sdram_inti_p3_address; |
| soclinux_sdram_master_p3_bank <= soclinux_sdram_inti_p3_bank; |
| soclinux_sdram_master_p3_cas_n <= soclinux_sdram_inti_p3_cas_n; |
| soclinux_sdram_master_p3_cs_n <= soclinux_sdram_inti_p3_cs_n; |
| soclinux_sdram_master_p3_ras_n <= soclinux_sdram_inti_p3_ras_n; |
| soclinux_sdram_master_p3_we_n <= soclinux_sdram_inti_p3_we_n; |
| soclinux_sdram_master_p3_cke <= soclinux_sdram_inti_p3_cke; |
| soclinux_sdram_master_p3_odt <= soclinux_sdram_inti_p3_odt; |
| soclinux_sdram_master_p3_reset_n <= soclinux_sdram_inti_p3_reset_n; |
| soclinux_sdram_master_p3_act_n <= soclinux_sdram_inti_p3_act_n; |
| soclinux_sdram_master_p3_wrdata <= soclinux_sdram_inti_p3_wrdata; |
| soclinux_sdram_master_p3_wrdata_en <= soclinux_sdram_inti_p3_wrdata_en; |
| soclinux_sdram_master_p3_wrdata_mask <= soclinux_sdram_inti_p3_wrdata_mask; |
| soclinux_sdram_master_p3_rddata_en <= soclinux_sdram_inti_p3_rddata_en; |
| soclinux_sdram_inti_p3_rddata <= soclinux_sdram_master_p3_rddata; |
| soclinux_sdram_inti_p3_rddata_valid <= soclinux_sdram_master_p3_rddata_valid; |
| end |
| end |
| assign soclinux_sdram_inti_p0_cke = soclinux_sdram_storage[1]; |
| assign soclinux_sdram_inti_p1_cke = soclinux_sdram_storage[1]; |
| assign soclinux_sdram_inti_p2_cke = soclinux_sdram_storage[1]; |
| assign soclinux_sdram_inti_p3_cke = soclinux_sdram_storage[1]; |
| assign soclinux_sdram_inti_p0_odt = soclinux_sdram_storage[2]; |
| assign soclinux_sdram_inti_p1_odt = soclinux_sdram_storage[2]; |
| assign soclinux_sdram_inti_p2_odt = soclinux_sdram_storage[2]; |
| assign soclinux_sdram_inti_p3_odt = soclinux_sdram_storage[2]; |
| assign soclinux_sdram_inti_p0_reset_n = soclinux_sdram_storage[3]; |
| assign soclinux_sdram_inti_p1_reset_n = soclinux_sdram_storage[3]; |
| assign soclinux_sdram_inti_p2_reset_n = soclinux_sdram_storage[3]; |
| assign soclinux_sdram_inti_p3_reset_n = soclinux_sdram_storage[3]; |
| always @(*) begin |
| soclinux_sdram_inti_p0_ras_n <= 1'd1; |
| soclinux_sdram_inti_p0_we_n <= 1'd1; |
| soclinux_sdram_inti_p0_cas_n <= 1'd1; |
| soclinux_sdram_inti_p0_cs_n <= 1'd1; |
| if (soclinux_sdram_phaseinjector0_command_issue_re) begin |
| soclinux_sdram_inti_p0_cs_n <= {1{(~soclinux_sdram_phaseinjector0_command_storage[0])}}; |
| soclinux_sdram_inti_p0_we_n <= (~soclinux_sdram_phaseinjector0_command_storage[1]); |
| soclinux_sdram_inti_p0_cas_n <= (~soclinux_sdram_phaseinjector0_command_storage[2]); |
| soclinux_sdram_inti_p0_ras_n <= (~soclinux_sdram_phaseinjector0_command_storage[3]); |
| end else begin |
| soclinux_sdram_inti_p0_cs_n <= {1{1'd1}}; |
| soclinux_sdram_inti_p0_we_n <= 1'd1; |
| soclinux_sdram_inti_p0_cas_n <= 1'd1; |
| soclinux_sdram_inti_p0_ras_n <= 1'd1; |
| end |
| end |
| assign soclinux_sdram_inti_p0_address = soclinux_sdram_phaseinjector0_address_storage; |
| assign soclinux_sdram_inti_p0_bank = soclinux_sdram_phaseinjector0_baddress_storage; |
| assign soclinux_sdram_inti_p0_wrdata_en = (soclinux_sdram_phaseinjector0_command_issue_re & soclinux_sdram_phaseinjector0_command_storage[4]); |
| assign soclinux_sdram_inti_p0_rddata_en = (soclinux_sdram_phaseinjector0_command_issue_re & soclinux_sdram_phaseinjector0_command_storage[5]); |
| assign soclinux_sdram_inti_p0_wrdata = soclinux_sdram_phaseinjector0_wrdata_storage; |
| assign soclinux_sdram_inti_p0_wrdata_mask = 1'd0; |
| always @(*) begin |
| soclinux_sdram_inti_p1_ras_n <= 1'd1; |
| soclinux_sdram_inti_p1_we_n <= 1'd1; |
| soclinux_sdram_inti_p1_cas_n <= 1'd1; |
| soclinux_sdram_inti_p1_cs_n <= 1'd1; |
| if (soclinux_sdram_phaseinjector1_command_issue_re) begin |
| soclinux_sdram_inti_p1_cs_n <= {1{(~soclinux_sdram_phaseinjector1_command_storage[0])}}; |
| soclinux_sdram_inti_p1_we_n <= (~soclinux_sdram_phaseinjector1_command_storage[1]); |
| soclinux_sdram_inti_p1_cas_n <= (~soclinux_sdram_phaseinjector1_command_storage[2]); |
| soclinux_sdram_inti_p1_ras_n <= (~soclinux_sdram_phaseinjector1_command_storage[3]); |
| end else begin |
| soclinux_sdram_inti_p1_cs_n <= {1{1'd1}}; |
| soclinux_sdram_inti_p1_we_n <= 1'd1; |
| soclinux_sdram_inti_p1_cas_n <= 1'd1; |
| soclinux_sdram_inti_p1_ras_n <= 1'd1; |
| end |
| end |
| assign soclinux_sdram_inti_p1_address = soclinux_sdram_phaseinjector1_address_storage; |
| assign soclinux_sdram_inti_p1_bank = soclinux_sdram_phaseinjector1_baddress_storage; |
| assign soclinux_sdram_inti_p1_wrdata_en = (soclinux_sdram_phaseinjector1_command_issue_re & soclinux_sdram_phaseinjector1_command_storage[4]); |
| assign soclinux_sdram_inti_p1_rddata_en = (soclinux_sdram_phaseinjector1_command_issue_re & soclinux_sdram_phaseinjector1_command_storage[5]); |
| assign soclinux_sdram_inti_p1_wrdata = soclinux_sdram_phaseinjector1_wrdata_storage; |
| assign soclinux_sdram_inti_p1_wrdata_mask = 1'd0; |
| always @(*) begin |
| soclinux_sdram_inti_p2_ras_n <= 1'd1; |
| soclinux_sdram_inti_p2_we_n <= 1'd1; |
| soclinux_sdram_inti_p2_cas_n <= 1'd1; |
| soclinux_sdram_inti_p2_cs_n <= 1'd1; |
| if (soclinux_sdram_phaseinjector2_command_issue_re) begin |
| soclinux_sdram_inti_p2_cs_n <= {1{(~soclinux_sdram_phaseinjector2_command_storage[0])}}; |
| soclinux_sdram_inti_p2_we_n <= (~soclinux_sdram_phaseinjector2_command_storage[1]); |
| soclinux_sdram_inti_p2_cas_n <= (~soclinux_sdram_phaseinjector2_command_storage[2]); |
| soclinux_sdram_inti_p2_ras_n <= (~soclinux_sdram_phaseinjector2_command_storage[3]); |
| end else begin |
| soclinux_sdram_inti_p2_cs_n <= {1{1'd1}}; |
| soclinux_sdram_inti_p2_we_n <= 1'd1; |
| soclinux_sdram_inti_p2_cas_n <= 1'd1; |
| soclinux_sdram_inti_p2_ras_n <= 1'd1; |
| end |
| end |
| assign soclinux_sdram_inti_p2_address = soclinux_sdram_phaseinjector2_address_storage; |
| assign soclinux_sdram_inti_p2_bank = soclinux_sdram_phaseinjector2_baddress_storage; |
| assign soclinux_sdram_inti_p2_wrdata_en = (soclinux_sdram_phaseinjector2_command_issue_re & soclinux_sdram_phaseinjector2_command_storage[4]); |
| assign soclinux_sdram_inti_p2_rddata_en = (soclinux_sdram_phaseinjector2_command_issue_re & soclinux_sdram_phaseinjector2_command_storage[5]); |
| assign soclinux_sdram_inti_p2_wrdata = soclinux_sdram_phaseinjector2_wrdata_storage; |
| assign soclinux_sdram_inti_p2_wrdata_mask = 1'd0; |
| always @(*) begin |
| soclinux_sdram_inti_p3_ras_n <= 1'd1; |
| soclinux_sdram_inti_p3_we_n <= 1'd1; |
| soclinux_sdram_inti_p3_cas_n <= 1'd1; |
| soclinux_sdram_inti_p3_cs_n <= 1'd1; |
| if (soclinux_sdram_phaseinjector3_command_issue_re) begin |
| soclinux_sdram_inti_p3_cs_n <= {1{(~soclinux_sdram_phaseinjector3_command_storage[0])}}; |
| soclinux_sdram_inti_p3_we_n <= (~soclinux_sdram_phaseinjector3_command_storage[1]); |
| soclinux_sdram_inti_p3_cas_n <= (~soclinux_sdram_phaseinjector3_command_storage[2]); |
| soclinux_sdram_inti_p3_ras_n <= (~soclinux_sdram_phaseinjector3_command_storage[3]); |
| end else begin |
| soclinux_sdram_inti_p3_cs_n <= {1{1'd1}}; |
| soclinux_sdram_inti_p3_we_n <= 1'd1; |
| soclinux_sdram_inti_p3_cas_n <= 1'd1; |
| soclinux_sdram_inti_p3_ras_n <= 1'd1; |
| end |
| end |
| assign soclinux_sdram_inti_p3_address = soclinux_sdram_phaseinjector3_address_storage; |
| assign soclinux_sdram_inti_p3_bank = soclinux_sdram_phaseinjector3_baddress_storage; |
| assign soclinux_sdram_inti_p3_wrdata_en = (soclinux_sdram_phaseinjector3_command_issue_re & soclinux_sdram_phaseinjector3_command_storage[4]); |
| assign soclinux_sdram_inti_p3_rddata_en = (soclinux_sdram_phaseinjector3_command_issue_re & soclinux_sdram_phaseinjector3_command_storage[5]); |
| assign soclinux_sdram_inti_p3_wrdata = soclinux_sdram_phaseinjector3_wrdata_storage; |
| assign soclinux_sdram_inti_p3_wrdata_mask = 1'd0; |
| assign soclinux_sdram_bankmachine0_req_valid = soclinux_sdram_interface_bank0_valid; |
| assign soclinux_sdram_interface_bank0_ready = soclinux_sdram_bankmachine0_req_ready; |
| assign soclinux_sdram_bankmachine0_req_we = soclinux_sdram_interface_bank0_we; |
| assign soclinux_sdram_bankmachine0_req_addr = soclinux_sdram_interface_bank0_addr; |
| assign soclinux_sdram_interface_bank0_lock = soclinux_sdram_bankmachine0_req_lock; |
| assign soclinux_sdram_interface_bank0_wdata_ready = soclinux_sdram_bankmachine0_req_wdata_ready; |
| assign soclinux_sdram_interface_bank0_rdata_valid = soclinux_sdram_bankmachine0_req_rdata_valid; |
| assign soclinux_sdram_bankmachine1_req_valid = soclinux_sdram_interface_bank1_valid; |
| assign soclinux_sdram_interface_bank1_ready = soclinux_sdram_bankmachine1_req_ready; |
| assign soclinux_sdram_bankmachine1_req_we = soclinux_sdram_interface_bank1_we; |
| assign soclinux_sdram_bankmachine1_req_addr = soclinux_sdram_interface_bank1_addr; |
| assign soclinux_sdram_interface_bank1_lock = soclinux_sdram_bankmachine1_req_lock; |
| assign soclinux_sdram_interface_bank1_wdata_ready = soclinux_sdram_bankmachine1_req_wdata_ready; |
| assign soclinux_sdram_interface_bank1_rdata_valid = soclinux_sdram_bankmachine1_req_rdata_valid; |
| assign soclinux_sdram_bankmachine2_req_valid = soclinux_sdram_interface_bank2_valid; |
| assign soclinux_sdram_interface_bank2_ready = soclinux_sdram_bankmachine2_req_ready; |
| assign soclinux_sdram_bankmachine2_req_we = soclinux_sdram_interface_bank2_we; |
| assign soclinux_sdram_bankmachine2_req_addr = soclinux_sdram_interface_bank2_addr; |
| assign soclinux_sdram_interface_bank2_lock = soclinux_sdram_bankmachine2_req_lock; |
| assign soclinux_sdram_interface_bank2_wdata_ready = soclinux_sdram_bankmachine2_req_wdata_ready; |
| assign soclinux_sdram_interface_bank2_rdata_valid = soclinux_sdram_bankmachine2_req_rdata_valid; |
| assign soclinux_sdram_bankmachine3_req_valid = soclinux_sdram_interface_bank3_valid; |
| assign soclinux_sdram_interface_bank3_ready = soclinux_sdram_bankmachine3_req_ready; |
| assign soclinux_sdram_bankmachine3_req_we = soclinux_sdram_interface_bank3_we; |
| assign soclinux_sdram_bankmachine3_req_addr = soclinux_sdram_interface_bank3_addr; |
| assign soclinux_sdram_interface_bank3_lock = soclinux_sdram_bankmachine3_req_lock; |
| assign soclinux_sdram_interface_bank3_wdata_ready = soclinux_sdram_bankmachine3_req_wdata_ready; |
| assign soclinux_sdram_interface_bank3_rdata_valid = soclinux_sdram_bankmachine3_req_rdata_valid; |
| assign soclinux_sdram_bankmachine4_req_valid = soclinux_sdram_interface_bank4_valid; |
| assign soclinux_sdram_interface_bank4_ready = soclinux_sdram_bankmachine4_req_ready; |
| assign soclinux_sdram_bankmachine4_req_we = soclinux_sdram_interface_bank4_we; |
| assign soclinux_sdram_bankmachine4_req_addr = soclinux_sdram_interface_bank4_addr; |
| assign soclinux_sdram_interface_bank4_lock = soclinux_sdram_bankmachine4_req_lock; |
| assign soclinux_sdram_interface_bank4_wdata_ready = soclinux_sdram_bankmachine4_req_wdata_ready; |
| assign soclinux_sdram_interface_bank4_rdata_valid = soclinux_sdram_bankmachine4_req_rdata_valid; |
| assign soclinux_sdram_bankmachine5_req_valid = soclinux_sdram_interface_bank5_valid; |
| assign soclinux_sdram_interface_bank5_ready = soclinux_sdram_bankmachine5_req_ready; |
| assign soclinux_sdram_bankmachine5_req_we = soclinux_sdram_interface_bank5_we; |
| assign soclinux_sdram_bankmachine5_req_addr = soclinux_sdram_interface_bank5_addr; |
| assign soclinux_sdram_interface_bank5_lock = soclinux_sdram_bankmachine5_req_lock; |
| assign soclinux_sdram_interface_bank5_wdata_ready = soclinux_sdram_bankmachine5_req_wdata_ready; |
| assign soclinux_sdram_interface_bank5_rdata_valid = soclinux_sdram_bankmachine5_req_rdata_valid; |
| assign soclinux_sdram_bankmachine6_req_valid = soclinux_sdram_interface_bank6_valid; |
| assign soclinux_sdram_interface_bank6_ready = soclinux_sdram_bankmachine6_req_ready; |
| assign soclinux_sdram_bankmachine6_req_we = soclinux_sdram_interface_bank6_we; |
| assign soclinux_sdram_bankmachine6_req_addr = soclinux_sdram_interface_bank6_addr; |
| assign soclinux_sdram_interface_bank6_lock = soclinux_sdram_bankmachine6_req_lock; |
| assign soclinux_sdram_interface_bank6_wdata_ready = soclinux_sdram_bankmachine6_req_wdata_ready; |
| assign soclinux_sdram_interface_bank6_rdata_valid = soclinux_sdram_bankmachine6_req_rdata_valid; |
| assign soclinux_sdram_bankmachine7_req_valid = soclinux_sdram_interface_bank7_valid; |
| assign soclinux_sdram_interface_bank7_ready = soclinux_sdram_bankmachine7_req_ready; |
| assign soclinux_sdram_bankmachine7_req_we = soclinux_sdram_interface_bank7_we; |
| assign soclinux_sdram_bankmachine7_req_addr = soclinux_sdram_interface_bank7_addr; |
| assign soclinux_sdram_interface_bank7_lock = soclinux_sdram_bankmachine7_req_lock; |
| assign soclinux_sdram_interface_bank7_wdata_ready = soclinux_sdram_bankmachine7_req_wdata_ready; |
| assign soclinux_sdram_interface_bank7_rdata_valid = soclinux_sdram_bankmachine7_req_rdata_valid; |
| assign soclinux_sdram_bankmachine8_req_valid = soclinux_sdram_interface_bank8_valid; |
| assign soclinux_sdram_interface_bank8_ready = soclinux_sdram_bankmachine8_req_ready; |
| assign soclinux_sdram_bankmachine8_req_we = soclinux_sdram_interface_bank8_we; |
| assign soclinux_sdram_bankmachine8_req_addr = soclinux_sdram_interface_bank8_addr; |
| assign soclinux_sdram_interface_bank8_lock = soclinux_sdram_bankmachine8_req_lock; |
| assign soclinux_sdram_interface_bank8_wdata_ready = soclinux_sdram_bankmachine8_req_wdata_ready; |
| assign soclinux_sdram_interface_bank8_rdata_valid = soclinux_sdram_bankmachine8_req_rdata_valid; |
| assign soclinux_sdram_bankmachine9_req_valid = soclinux_sdram_interface_bank9_valid; |
| assign soclinux_sdram_interface_bank9_ready = soclinux_sdram_bankmachine9_req_ready; |
| assign soclinux_sdram_bankmachine9_req_we = soclinux_sdram_interface_bank9_we; |
| assign soclinux_sdram_bankmachine9_req_addr = soclinux_sdram_interface_bank9_addr; |
| assign soclinux_sdram_interface_bank9_lock = soclinux_sdram_bankmachine9_req_lock; |
| assign soclinux_sdram_interface_bank9_wdata_ready = soclinux_sdram_bankmachine9_req_wdata_ready; |
| assign soclinux_sdram_interface_bank9_rdata_valid = soclinux_sdram_bankmachine9_req_rdata_valid; |
| assign soclinux_sdram_bankmachine10_req_valid = soclinux_sdram_interface_bank10_valid; |
| assign soclinux_sdram_interface_bank10_ready = soclinux_sdram_bankmachine10_req_ready; |
| assign soclinux_sdram_bankmachine10_req_we = soclinux_sdram_interface_bank10_we; |
| assign soclinux_sdram_bankmachine10_req_addr = soclinux_sdram_interface_bank10_addr; |
| assign soclinux_sdram_interface_bank10_lock = soclinux_sdram_bankmachine10_req_lock; |
| assign soclinux_sdram_interface_bank10_wdata_ready = soclinux_sdram_bankmachine10_req_wdata_ready; |
| assign soclinux_sdram_interface_bank10_rdata_valid = soclinux_sdram_bankmachine10_req_rdata_valid; |
| assign soclinux_sdram_bankmachine11_req_valid = soclinux_sdram_interface_bank11_valid; |
| assign soclinux_sdram_interface_bank11_ready = soclinux_sdram_bankmachine11_req_ready; |
| assign soclinux_sdram_bankmachine11_req_we = soclinux_sdram_interface_bank11_we; |
| assign soclinux_sdram_bankmachine11_req_addr = soclinux_sdram_interface_bank11_addr; |
| assign soclinux_sdram_interface_bank11_lock = soclinux_sdram_bankmachine11_req_lock; |
| assign soclinux_sdram_interface_bank11_wdata_ready = soclinux_sdram_bankmachine11_req_wdata_ready; |
| assign soclinux_sdram_interface_bank11_rdata_valid = soclinux_sdram_bankmachine11_req_rdata_valid; |
| assign soclinux_sdram_bankmachine12_req_valid = soclinux_sdram_interface_bank12_valid; |
| assign soclinux_sdram_interface_bank12_ready = soclinux_sdram_bankmachine12_req_ready; |
| assign soclinux_sdram_bankmachine12_req_we = soclinux_sdram_interface_bank12_we; |
| assign soclinux_sdram_bankmachine12_req_addr = soclinux_sdram_interface_bank12_addr; |
| assign soclinux_sdram_interface_bank12_lock = soclinux_sdram_bankmachine12_req_lock; |
| assign soclinux_sdram_interface_bank12_wdata_ready = soclinux_sdram_bankmachine12_req_wdata_ready; |
| assign soclinux_sdram_interface_bank12_rdata_valid = soclinux_sdram_bankmachine12_req_rdata_valid; |
| assign soclinux_sdram_bankmachine13_req_valid = soclinux_sdram_interface_bank13_valid; |
| assign soclinux_sdram_interface_bank13_ready = soclinux_sdram_bankmachine13_req_ready; |
| assign soclinux_sdram_bankmachine13_req_we = soclinux_sdram_interface_bank13_we; |
| assign soclinux_sdram_bankmachine13_req_addr = soclinux_sdram_interface_bank13_addr; |
| assign soclinux_sdram_interface_bank13_lock = soclinux_sdram_bankmachine13_req_lock; |
| assign soclinux_sdram_interface_bank13_wdata_ready = soclinux_sdram_bankmachine13_req_wdata_ready; |
| assign soclinux_sdram_interface_bank13_rdata_valid = soclinux_sdram_bankmachine13_req_rdata_valid; |
| assign soclinux_sdram_bankmachine14_req_valid = soclinux_sdram_interface_bank14_valid; |
| assign soclinux_sdram_interface_bank14_ready = soclinux_sdram_bankmachine14_req_ready; |
| assign soclinux_sdram_bankmachine14_req_we = soclinux_sdram_interface_bank14_we; |
| assign soclinux_sdram_bankmachine14_req_addr = soclinux_sdram_interface_bank14_addr; |
| assign soclinux_sdram_interface_bank14_lock = soclinux_sdram_bankmachine14_req_lock; |
| assign soclinux_sdram_interface_bank14_wdata_ready = soclinux_sdram_bankmachine14_req_wdata_ready; |
| assign soclinux_sdram_interface_bank14_rdata_valid = soclinux_sdram_bankmachine14_req_rdata_valid; |
| assign soclinux_sdram_bankmachine15_req_valid = soclinux_sdram_interface_bank15_valid; |
| assign soclinux_sdram_interface_bank15_ready = soclinux_sdram_bankmachine15_req_ready; |
| assign soclinux_sdram_bankmachine15_req_we = soclinux_sdram_interface_bank15_we; |
| assign soclinux_sdram_bankmachine15_req_addr = soclinux_sdram_interface_bank15_addr; |
| assign soclinux_sdram_interface_bank15_lock = soclinux_sdram_bankmachine15_req_lock; |
| assign soclinux_sdram_interface_bank15_wdata_ready = soclinux_sdram_bankmachine15_req_wdata_ready; |
| assign soclinux_sdram_interface_bank15_rdata_valid = soclinux_sdram_bankmachine15_req_rdata_valid; |
| assign soclinux_sdram_timer_wait = (~soclinux_sdram_timer_done0); |
| assign soclinux_sdram_postponer_req_i = soclinux_sdram_timer_done0; |
| assign soclinux_sdram_wants_refresh = soclinux_sdram_postponer_req_o; |
| assign soclinux_sdram_wants_zqcs = soclinux_sdram_zqcs_timer_done0; |
| assign soclinux_sdram_zqcs_timer_wait = (~soclinux_sdram_zqcs_executer_done); |
| assign soclinux_sdram_timer_done1 = (soclinux_sdram_timer_count1 == 1'd0); |
| assign soclinux_sdram_timer_done0 = soclinux_sdram_timer_done1; |
| assign soclinux_sdram_timer_count0 = soclinux_sdram_timer_count1; |
| assign soclinux_sdram_sequencer_start1 = (soclinux_sdram_sequencer_start0 | (soclinux_sdram_sequencer_count != 1'd0)); |
| assign soclinux_sdram_sequencer_done0 = (soclinux_sdram_sequencer_done1 & (soclinux_sdram_sequencer_count == 1'd0)); |
| assign soclinux_sdram_zqcs_timer_done1 = (soclinux_sdram_zqcs_timer_count1 == 1'd0); |
| assign soclinux_sdram_zqcs_timer_done0 = soclinux_sdram_zqcs_timer_done1; |
| assign soclinux_sdram_zqcs_timer_count0 = soclinux_sdram_zqcs_timer_count1; |
| always @(*) begin |
| soclinux_sdram_cmd_valid <= 1'd0; |
| soclinux_sdram_sequencer_start0 <= 1'd0; |
| soclinux_sdram_zqcs_executer_start <= 1'd0; |
| soclinux_sdram_cmd_last <= 1'd0; |
| refresher_next_state <= 2'd0; |
| refresher_next_state <= refresher_state; |
| case (refresher_state) |
| 1'd1: begin |
| soclinux_sdram_cmd_valid <= 1'd1; |
| if (soclinux_sdram_cmd_ready) begin |
| soclinux_sdram_sequencer_start0 <= 1'd1; |
| refresher_next_state <= 2'd2; |
| end |
| end |
| 2'd2: begin |
| soclinux_sdram_cmd_valid <= 1'd1; |
| if (soclinux_sdram_sequencer_done0) begin |
| if (soclinux_sdram_wants_zqcs) begin |
| soclinux_sdram_zqcs_executer_start <= 1'd1; |
| refresher_next_state <= 2'd3; |
| end else begin |
| soclinux_sdram_cmd_valid <= 1'd0; |
| soclinux_sdram_cmd_last <= 1'd1; |
| refresher_next_state <= 1'd0; |
| end |
| end |
| end |
| 2'd3: begin |
| soclinux_sdram_cmd_valid <= 1'd1; |
| if (soclinux_sdram_zqcs_executer_done) begin |
| soclinux_sdram_cmd_valid <= 1'd0; |
| soclinux_sdram_cmd_last <= 1'd1; |
| refresher_next_state <= 1'd0; |
| end |
| end |
| default: begin |
| if (1'd1) begin |
| if (soclinux_sdram_wants_refresh) begin |
| refresher_next_state <= 1'd1; |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine0_req_valid; |
| assign soclinux_sdram_bankmachine0_req_ready = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine0_req_we; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine0_req_addr; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_sink_valid = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine0_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_sink_first = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_sink_last = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_source_ready = (soclinux_sdram_bankmachine0_req_wdata_ready | soclinux_sdram_bankmachine0_req_rdata_valid); |
| assign soclinux_sdram_bankmachine0_req_lock = (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine0_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine0_row_hit = (soclinux_sdram_bankmachine0_row == soclinux_sdram_bankmachine0_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine0_cmd_payload_ba = 1'd0; |
| always @(*) begin |
| soclinux_sdram_bankmachine0_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine0_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine0_cmd_payload_a <= soclinux_sdram_bankmachine0_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine0_cmd_payload_a <= ((soclinux_sdram_bankmachine0_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine0_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine0_twtpcon_valid = ((soclinux_sdram_bankmachine0_cmd_valid & soclinux_sdram_bankmachine0_cmd_ready) & soclinux_sdram_bankmachine0_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine0_trccon_valid = ((soclinux_sdram_bankmachine0_cmd_valid & soclinux_sdram_bankmachine0_cmd_ready) & soclinux_sdram_bankmachine0_row_open); |
| assign soclinux_sdram_bankmachine0_trascon_valid = ((soclinux_sdram_bankmachine0_cmd_valid & soclinux_sdram_bankmachine0_cmd_ready) & soclinux_sdram_bankmachine0_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine0_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine0_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine0_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine0_auto_precharge <= (soclinux_sdram_bankmachine0_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_din = {soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_dout; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_writable; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_we = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_readable; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_re = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine0_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_din; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_we & (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_writable | soclinux_sdram_bankmachine0_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_readable & soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_re); |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_dout = soclinux_sdram_bankmachine0_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_writable = (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_readable = (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine0_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine0_cmd_buffer_source_valid) | soclinux_sdram_bankmachine0_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine0_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine0_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine0_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine0_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine0_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine0_cmd_valid <= 1'd0; |
| bankmachine0_next_state <= 4'd0; |
| soclinux_sdram_bankmachine0_row_open <= 1'd0; |
| soclinux_sdram_bankmachine0_row_close <= 1'd0; |
| soclinux_sdram_bankmachine0_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine0_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine0_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine0_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine0_cmd_payload_is_read <= 1'd0; |
| bankmachine0_next_state <= bankmachine0_state; |
| case (bankmachine0_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine0_twtpcon_ready & soclinux_sdram_bankmachine0_trascon_ready)) begin |
| soclinux_sdram_bankmachine0_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine0_cmd_ready) begin |
| bankmachine0_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine0_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine0_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine0_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine0_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine0_twtpcon_ready & soclinux_sdram_bankmachine0_trascon_ready)) begin |
| bankmachine0_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine0_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine0_trccon_ready) begin |
| soclinux_sdram_bankmachine0_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine0_row_open <= 1'd1; |
| soclinux_sdram_bankmachine0_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine0_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine0_cmd_ready) begin |
| bankmachine0_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine0_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine0_twtpcon_ready) begin |
| soclinux_sdram_bankmachine0_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine0_row_close <= 1'd1; |
| soclinux_sdram_bankmachine0_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine0_refresh_req)) begin |
| bankmachine0_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine0_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine0_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine0_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine0_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine0_refresh_req) begin |
| bankmachine0_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine0_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine0_row_opened) begin |
| if (soclinux_sdram_bankmachine0_row_hit) begin |
| soclinux_sdram_bankmachine0_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine0_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine0_req_wdata_ready <= soclinux_sdram_bankmachine0_cmd_ready; |
| soclinux_sdram_bankmachine0_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine0_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine0_req_rdata_valid <= soclinux_sdram_bankmachine0_cmd_ready; |
| soclinux_sdram_bankmachine0_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine0_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine0_cmd_ready & soclinux_sdram_bankmachine0_auto_precharge)) begin |
| bankmachine0_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine0_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine0_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine1_req_valid; |
| assign soclinux_sdram_bankmachine1_req_ready = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine1_req_we; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine1_req_addr; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_sink_valid = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine1_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_sink_first = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_sink_last = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_source_ready = (soclinux_sdram_bankmachine1_req_wdata_ready | soclinux_sdram_bankmachine1_req_rdata_valid); |
| assign soclinux_sdram_bankmachine1_req_lock = (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine1_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine1_row_hit = (soclinux_sdram_bankmachine1_row == soclinux_sdram_bankmachine1_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine1_cmd_payload_ba = 1'd1; |
| always @(*) begin |
| soclinux_sdram_bankmachine1_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine1_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine1_cmd_payload_a <= soclinux_sdram_bankmachine1_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine1_cmd_payload_a <= ((soclinux_sdram_bankmachine1_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine1_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine1_twtpcon_valid = ((soclinux_sdram_bankmachine1_cmd_valid & soclinux_sdram_bankmachine1_cmd_ready) & soclinux_sdram_bankmachine1_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine1_trccon_valid = ((soclinux_sdram_bankmachine1_cmd_valid & soclinux_sdram_bankmachine1_cmd_ready) & soclinux_sdram_bankmachine1_row_open); |
| assign soclinux_sdram_bankmachine1_trascon_valid = ((soclinux_sdram_bankmachine1_cmd_valid & soclinux_sdram_bankmachine1_cmd_ready) & soclinux_sdram_bankmachine1_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine1_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine1_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine1_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine1_auto_precharge <= (soclinux_sdram_bankmachine1_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_din = {soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_dout; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_writable; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_we = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_readable; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_re = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine1_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_din; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_we & (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_writable | soclinux_sdram_bankmachine1_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_readable & soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_re); |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_dout = soclinux_sdram_bankmachine1_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_writable = (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_readable = (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine1_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine1_cmd_buffer_source_valid) | soclinux_sdram_bankmachine1_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine1_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine1_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine1_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine1_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine1_cmd_valid <= 1'd0; |
| bankmachine1_next_state <= 4'd0; |
| soclinux_sdram_bankmachine1_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine1_row_open <= 1'd0; |
| soclinux_sdram_bankmachine1_row_close <= 1'd0; |
| soclinux_sdram_bankmachine1_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine1_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine1_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine1_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine1_cmd_payload_is_read <= 1'd0; |
| bankmachine1_next_state <= bankmachine1_state; |
| case (bankmachine1_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine1_twtpcon_ready & soclinux_sdram_bankmachine1_trascon_ready)) begin |
| soclinux_sdram_bankmachine1_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine1_cmd_ready) begin |
| bankmachine1_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine1_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine1_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine1_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine1_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine1_twtpcon_ready & soclinux_sdram_bankmachine1_trascon_ready)) begin |
| bankmachine1_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine1_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine1_trccon_ready) begin |
| soclinux_sdram_bankmachine1_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine1_row_open <= 1'd1; |
| soclinux_sdram_bankmachine1_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine1_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine1_cmd_ready) begin |
| bankmachine1_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine1_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine1_twtpcon_ready) begin |
| soclinux_sdram_bankmachine1_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine1_row_close <= 1'd1; |
| soclinux_sdram_bankmachine1_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine1_refresh_req)) begin |
| bankmachine1_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine1_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine1_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine1_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine1_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine1_refresh_req) begin |
| bankmachine1_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine1_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine1_row_opened) begin |
| if (soclinux_sdram_bankmachine1_row_hit) begin |
| soclinux_sdram_bankmachine1_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine1_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine1_req_wdata_ready <= soclinux_sdram_bankmachine1_cmd_ready; |
| soclinux_sdram_bankmachine1_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine1_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine1_req_rdata_valid <= soclinux_sdram_bankmachine1_cmd_ready; |
| soclinux_sdram_bankmachine1_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine1_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine1_cmd_ready & soclinux_sdram_bankmachine1_auto_precharge)) begin |
| bankmachine1_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine1_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine1_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine2_req_valid; |
| assign soclinux_sdram_bankmachine2_req_ready = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine2_req_we; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine2_req_addr; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_sink_valid = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine2_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_sink_first = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_sink_last = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_source_ready = (soclinux_sdram_bankmachine2_req_wdata_ready | soclinux_sdram_bankmachine2_req_rdata_valid); |
| assign soclinux_sdram_bankmachine2_req_lock = (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine2_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine2_row_hit = (soclinux_sdram_bankmachine2_row == soclinux_sdram_bankmachine2_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine2_cmd_payload_ba = 2'd2; |
| always @(*) begin |
| soclinux_sdram_bankmachine2_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine2_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine2_cmd_payload_a <= soclinux_sdram_bankmachine2_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine2_cmd_payload_a <= ((soclinux_sdram_bankmachine2_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine2_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine2_twtpcon_valid = ((soclinux_sdram_bankmachine2_cmd_valid & soclinux_sdram_bankmachine2_cmd_ready) & soclinux_sdram_bankmachine2_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine2_trccon_valid = ((soclinux_sdram_bankmachine2_cmd_valid & soclinux_sdram_bankmachine2_cmd_ready) & soclinux_sdram_bankmachine2_row_open); |
| assign soclinux_sdram_bankmachine2_trascon_valid = ((soclinux_sdram_bankmachine2_cmd_valid & soclinux_sdram_bankmachine2_cmd_ready) & soclinux_sdram_bankmachine2_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine2_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine2_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine2_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine2_auto_precharge <= (soclinux_sdram_bankmachine2_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_din = {soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_dout; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_writable; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_we = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_readable; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_re = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine2_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_din; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_we & (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_writable | soclinux_sdram_bankmachine2_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_readable & soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_re); |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_dout = soclinux_sdram_bankmachine2_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_writable = (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_readable = (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine2_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine2_cmd_buffer_source_valid) | soclinux_sdram_bankmachine2_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine2_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine2_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine2_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine2_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine2_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine2_cmd_valid <= 1'd0; |
| bankmachine2_next_state <= 4'd0; |
| soclinux_sdram_bankmachine2_row_open <= 1'd0; |
| soclinux_sdram_bankmachine2_row_close <= 1'd0; |
| soclinux_sdram_bankmachine2_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine2_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine2_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine2_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine2_cmd_payload_is_read <= 1'd0; |
| bankmachine2_next_state <= bankmachine2_state; |
| case (bankmachine2_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine2_twtpcon_ready & soclinux_sdram_bankmachine2_trascon_ready)) begin |
| soclinux_sdram_bankmachine2_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine2_cmd_ready) begin |
| bankmachine2_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine2_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine2_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine2_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine2_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine2_twtpcon_ready & soclinux_sdram_bankmachine2_trascon_ready)) begin |
| bankmachine2_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine2_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine2_trccon_ready) begin |
| soclinux_sdram_bankmachine2_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine2_row_open <= 1'd1; |
| soclinux_sdram_bankmachine2_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine2_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine2_cmd_ready) begin |
| bankmachine2_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine2_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine2_twtpcon_ready) begin |
| soclinux_sdram_bankmachine2_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine2_row_close <= 1'd1; |
| soclinux_sdram_bankmachine2_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine2_refresh_req)) begin |
| bankmachine2_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine2_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine2_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine2_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine2_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine2_refresh_req) begin |
| bankmachine2_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine2_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine2_row_opened) begin |
| if (soclinux_sdram_bankmachine2_row_hit) begin |
| soclinux_sdram_bankmachine2_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine2_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine2_req_wdata_ready <= soclinux_sdram_bankmachine2_cmd_ready; |
| soclinux_sdram_bankmachine2_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine2_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine2_req_rdata_valid <= soclinux_sdram_bankmachine2_cmd_ready; |
| soclinux_sdram_bankmachine2_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine2_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine2_cmd_ready & soclinux_sdram_bankmachine2_auto_precharge)) begin |
| bankmachine2_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine2_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine2_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine3_req_valid; |
| assign soclinux_sdram_bankmachine3_req_ready = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine3_req_we; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine3_req_addr; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_sink_valid = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine3_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_sink_first = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_sink_last = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_source_ready = (soclinux_sdram_bankmachine3_req_wdata_ready | soclinux_sdram_bankmachine3_req_rdata_valid); |
| assign soclinux_sdram_bankmachine3_req_lock = (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine3_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine3_row_hit = (soclinux_sdram_bankmachine3_row == soclinux_sdram_bankmachine3_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine3_cmd_payload_ba = 2'd3; |
| always @(*) begin |
| soclinux_sdram_bankmachine3_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine3_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine3_cmd_payload_a <= soclinux_sdram_bankmachine3_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine3_cmd_payload_a <= ((soclinux_sdram_bankmachine3_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine3_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine3_twtpcon_valid = ((soclinux_sdram_bankmachine3_cmd_valid & soclinux_sdram_bankmachine3_cmd_ready) & soclinux_sdram_bankmachine3_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine3_trccon_valid = ((soclinux_sdram_bankmachine3_cmd_valid & soclinux_sdram_bankmachine3_cmd_ready) & soclinux_sdram_bankmachine3_row_open); |
| assign soclinux_sdram_bankmachine3_trascon_valid = ((soclinux_sdram_bankmachine3_cmd_valid & soclinux_sdram_bankmachine3_cmd_ready) & soclinux_sdram_bankmachine3_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine3_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine3_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine3_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine3_auto_precharge <= (soclinux_sdram_bankmachine3_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_din = {soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_dout; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_writable; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_we = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_readable; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_re = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine3_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_din; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_we & (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_writable | soclinux_sdram_bankmachine3_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_readable & soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_re); |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_dout = soclinux_sdram_bankmachine3_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_writable = (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_readable = (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine3_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine3_cmd_buffer_source_valid) | soclinux_sdram_bankmachine3_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine3_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine3_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine3_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine3_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine3_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine3_cmd_valid <= 1'd0; |
| bankmachine3_next_state <= 4'd0; |
| soclinux_sdram_bankmachine3_row_open <= 1'd0; |
| soclinux_sdram_bankmachine3_row_close <= 1'd0; |
| soclinux_sdram_bankmachine3_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine3_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine3_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine3_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine3_cmd_payload_is_read <= 1'd0; |
| bankmachine3_next_state <= bankmachine3_state; |
| case (bankmachine3_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine3_twtpcon_ready & soclinux_sdram_bankmachine3_trascon_ready)) begin |
| soclinux_sdram_bankmachine3_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine3_cmd_ready) begin |
| bankmachine3_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine3_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine3_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine3_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine3_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine3_twtpcon_ready & soclinux_sdram_bankmachine3_trascon_ready)) begin |
| bankmachine3_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine3_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine3_trccon_ready) begin |
| soclinux_sdram_bankmachine3_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine3_row_open <= 1'd1; |
| soclinux_sdram_bankmachine3_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine3_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine3_cmd_ready) begin |
| bankmachine3_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine3_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine3_twtpcon_ready) begin |
| soclinux_sdram_bankmachine3_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine3_row_close <= 1'd1; |
| soclinux_sdram_bankmachine3_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine3_refresh_req)) begin |
| bankmachine3_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine3_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine3_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine3_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine3_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine3_refresh_req) begin |
| bankmachine3_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine3_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine3_row_opened) begin |
| if (soclinux_sdram_bankmachine3_row_hit) begin |
| soclinux_sdram_bankmachine3_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine3_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine3_req_wdata_ready <= soclinux_sdram_bankmachine3_cmd_ready; |
| soclinux_sdram_bankmachine3_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine3_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine3_req_rdata_valid <= soclinux_sdram_bankmachine3_cmd_ready; |
| soclinux_sdram_bankmachine3_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine3_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine3_cmd_ready & soclinux_sdram_bankmachine3_auto_precharge)) begin |
| bankmachine3_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine3_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine3_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine4_req_valid; |
| assign soclinux_sdram_bankmachine4_req_ready = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine4_req_we; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine4_req_addr; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_sink_valid = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine4_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_sink_first = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_sink_last = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_source_ready = (soclinux_sdram_bankmachine4_req_wdata_ready | soclinux_sdram_bankmachine4_req_rdata_valid); |
| assign soclinux_sdram_bankmachine4_req_lock = (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine4_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine4_row_hit = (soclinux_sdram_bankmachine4_row == soclinux_sdram_bankmachine4_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine4_cmd_payload_ba = 3'd4; |
| always @(*) begin |
| soclinux_sdram_bankmachine4_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine4_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine4_cmd_payload_a <= soclinux_sdram_bankmachine4_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine4_cmd_payload_a <= ((soclinux_sdram_bankmachine4_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine4_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine4_twtpcon_valid = ((soclinux_sdram_bankmachine4_cmd_valid & soclinux_sdram_bankmachine4_cmd_ready) & soclinux_sdram_bankmachine4_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine4_trccon_valid = ((soclinux_sdram_bankmachine4_cmd_valid & soclinux_sdram_bankmachine4_cmd_ready) & soclinux_sdram_bankmachine4_row_open); |
| assign soclinux_sdram_bankmachine4_trascon_valid = ((soclinux_sdram_bankmachine4_cmd_valid & soclinux_sdram_bankmachine4_cmd_ready) & soclinux_sdram_bankmachine4_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine4_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine4_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine4_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine4_auto_precharge <= (soclinux_sdram_bankmachine4_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_din = {soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_dout; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_writable; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_we = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_readable; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_re = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine4_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_din; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_we & (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_writable | soclinux_sdram_bankmachine4_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_readable & soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_re); |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_dout = soclinux_sdram_bankmachine4_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_writable = (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_readable = (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine4_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine4_cmd_buffer_source_valid) | soclinux_sdram_bankmachine4_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine4_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine4_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine4_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine4_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine4_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine4_cmd_valid <= 1'd0; |
| bankmachine4_next_state <= 4'd0; |
| soclinux_sdram_bankmachine4_row_open <= 1'd0; |
| soclinux_sdram_bankmachine4_row_close <= 1'd0; |
| soclinux_sdram_bankmachine4_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine4_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine4_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine4_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine4_cmd_payload_is_read <= 1'd0; |
| bankmachine4_next_state <= bankmachine4_state; |
| case (bankmachine4_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine4_twtpcon_ready & soclinux_sdram_bankmachine4_trascon_ready)) begin |
| soclinux_sdram_bankmachine4_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine4_cmd_ready) begin |
| bankmachine4_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine4_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine4_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine4_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine4_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine4_twtpcon_ready & soclinux_sdram_bankmachine4_trascon_ready)) begin |
| bankmachine4_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine4_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine4_trccon_ready) begin |
| soclinux_sdram_bankmachine4_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine4_row_open <= 1'd1; |
| soclinux_sdram_bankmachine4_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine4_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine4_cmd_ready) begin |
| bankmachine4_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine4_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine4_twtpcon_ready) begin |
| soclinux_sdram_bankmachine4_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine4_row_close <= 1'd1; |
| soclinux_sdram_bankmachine4_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine4_refresh_req)) begin |
| bankmachine4_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine4_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine4_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine4_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine4_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine4_refresh_req) begin |
| bankmachine4_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine4_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine4_row_opened) begin |
| if (soclinux_sdram_bankmachine4_row_hit) begin |
| soclinux_sdram_bankmachine4_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine4_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine4_req_wdata_ready <= soclinux_sdram_bankmachine4_cmd_ready; |
| soclinux_sdram_bankmachine4_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine4_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine4_req_rdata_valid <= soclinux_sdram_bankmachine4_cmd_ready; |
| soclinux_sdram_bankmachine4_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine4_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine4_cmd_ready & soclinux_sdram_bankmachine4_auto_precharge)) begin |
| bankmachine4_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine4_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine4_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine5_req_valid; |
| assign soclinux_sdram_bankmachine5_req_ready = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine5_req_we; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine5_req_addr; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_sink_valid = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine5_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_sink_first = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_sink_last = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_source_ready = (soclinux_sdram_bankmachine5_req_wdata_ready | soclinux_sdram_bankmachine5_req_rdata_valid); |
| assign soclinux_sdram_bankmachine5_req_lock = (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine5_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine5_row_hit = (soclinux_sdram_bankmachine5_row == soclinux_sdram_bankmachine5_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine5_cmd_payload_ba = 3'd5; |
| always @(*) begin |
| soclinux_sdram_bankmachine5_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine5_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine5_cmd_payload_a <= soclinux_sdram_bankmachine5_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine5_cmd_payload_a <= ((soclinux_sdram_bankmachine5_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine5_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine5_twtpcon_valid = ((soclinux_sdram_bankmachine5_cmd_valid & soclinux_sdram_bankmachine5_cmd_ready) & soclinux_sdram_bankmachine5_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine5_trccon_valid = ((soclinux_sdram_bankmachine5_cmd_valid & soclinux_sdram_bankmachine5_cmd_ready) & soclinux_sdram_bankmachine5_row_open); |
| assign soclinux_sdram_bankmachine5_trascon_valid = ((soclinux_sdram_bankmachine5_cmd_valid & soclinux_sdram_bankmachine5_cmd_ready) & soclinux_sdram_bankmachine5_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine5_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine5_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine5_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine5_auto_precharge <= (soclinux_sdram_bankmachine5_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_din = {soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_dout; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_writable; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_we = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_readable; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_re = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine5_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_din; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_we & (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_writable | soclinux_sdram_bankmachine5_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_readable & soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_re); |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_dout = soclinux_sdram_bankmachine5_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_writable = (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_readable = (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine5_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine5_cmd_buffer_source_valid) | soclinux_sdram_bankmachine5_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine5_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine5_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine5_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine5_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine5_cmd_valid <= 1'd0; |
| bankmachine5_next_state <= 4'd0; |
| soclinux_sdram_bankmachine5_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine5_row_open <= 1'd0; |
| soclinux_sdram_bankmachine5_row_close <= 1'd0; |
| soclinux_sdram_bankmachine5_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine5_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine5_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine5_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine5_cmd_payload_is_read <= 1'd0; |
| bankmachine5_next_state <= bankmachine5_state; |
| case (bankmachine5_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine5_twtpcon_ready & soclinux_sdram_bankmachine5_trascon_ready)) begin |
| soclinux_sdram_bankmachine5_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine5_cmd_ready) begin |
| bankmachine5_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine5_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine5_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine5_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine5_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine5_twtpcon_ready & soclinux_sdram_bankmachine5_trascon_ready)) begin |
| bankmachine5_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine5_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine5_trccon_ready) begin |
| soclinux_sdram_bankmachine5_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine5_row_open <= 1'd1; |
| soclinux_sdram_bankmachine5_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine5_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine5_cmd_ready) begin |
| bankmachine5_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine5_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine5_twtpcon_ready) begin |
| soclinux_sdram_bankmachine5_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine5_row_close <= 1'd1; |
| soclinux_sdram_bankmachine5_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine5_refresh_req)) begin |
| bankmachine5_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine5_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine5_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine5_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine5_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine5_refresh_req) begin |
| bankmachine5_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine5_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine5_row_opened) begin |
| if (soclinux_sdram_bankmachine5_row_hit) begin |
| soclinux_sdram_bankmachine5_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine5_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine5_req_wdata_ready <= soclinux_sdram_bankmachine5_cmd_ready; |
| soclinux_sdram_bankmachine5_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine5_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine5_req_rdata_valid <= soclinux_sdram_bankmachine5_cmd_ready; |
| soclinux_sdram_bankmachine5_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine5_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine5_cmd_ready & soclinux_sdram_bankmachine5_auto_precharge)) begin |
| bankmachine5_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine5_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine5_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine6_req_valid; |
| assign soclinux_sdram_bankmachine6_req_ready = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine6_req_we; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine6_req_addr; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_sink_valid = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine6_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_sink_first = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_sink_last = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_source_ready = (soclinux_sdram_bankmachine6_req_wdata_ready | soclinux_sdram_bankmachine6_req_rdata_valid); |
| assign soclinux_sdram_bankmachine6_req_lock = (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine6_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine6_row_hit = (soclinux_sdram_bankmachine6_row == soclinux_sdram_bankmachine6_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine6_cmd_payload_ba = 3'd6; |
| always @(*) begin |
| soclinux_sdram_bankmachine6_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine6_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine6_cmd_payload_a <= soclinux_sdram_bankmachine6_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine6_cmd_payload_a <= ((soclinux_sdram_bankmachine6_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine6_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine6_twtpcon_valid = ((soclinux_sdram_bankmachine6_cmd_valid & soclinux_sdram_bankmachine6_cmd_ready) & soclinux_sdram_bankmachine6_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine6_trccon_valid = ((soclinux_sdram_bankmachine6_cmd_valid & soclinux_sdram_bankmachine6_cmd_ready) & soclinux_sdram_bankmachine6_row_open); |
| assign soclinux_sdram_bankmachine6_trascon_valid = ((soclinux_sdram_bankmachine6_cmd_valid & soclinux_sdram_bankmachine6_cmd_ready) & soclinux_sdram_bankmachine6_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine6_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine6_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine6_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine6_auto_precharge <= (soclinux_sdram_bankmachine6_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_din = {soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_dout; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_writable; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_we = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_readable; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_re = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine6_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_din; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_we & (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_writable | soclinux_sdram_bankmachine6_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_readable & soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_re); |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_dout = soclinux_sdram_bankmachine6_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_writable = (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_readable = (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine6_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine6_cmd_buffer_source_valid) | soclinux_sdram_bankmachine6_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine6_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine6_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine6_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine6_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine6_cmd_valid <= 1'd0; |
| bankmachine6_next_state <= 4'd0; |
| soclinux_sdram_bankmachine6_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine6_row_open <= 1'd0; |
| soclinux_sdram_bankmachine6_row_close <= 1'd0; |
| soclinux_sdram_bankmachine6_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine6_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine6_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine6_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine6_cmd_payload_is_read <= 1'd0; |
| bankmachine6_next_state <= bankmachine6_state; |
| case (bankmachine6_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine6_twtpcon_ready & soclinux_sdram_bankmachine6_trascon_ready)) begin |
| soclinux_sdram_bankmachine6_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine6_cmd_ready) begin |
| bankmachine6_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine6_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine6_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine6_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine6_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine6_twtpcon_ready & soclinux_sdram_bankmachine6_trascon_ready)) begin |
| bankmachine6_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine6_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine6_trccon_ready) begin |
| soclinux_sdram_bankmachine6_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine6_row_open <= 1'd1; |
| soclinux_sdram_bankmachine6_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine6_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine6_cmd_ready) begin |
| bankmachine6_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine6_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine6_twtpcon_ready) begin |
| soclinux_sdram_bankmachine6_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine6_row_close <= 1'd1; |
| soclinux_sdram_bankmachine6_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine6_refresh_req)) begin |
| bankmachine6_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine6_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine6_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine6_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine6_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine6_refresh_req) begin |
| bankmachine6_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine6_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine6_row_opened) begin |
| if (soclinux_sdram_bankmachine6_row_hit) begin |
| soclinux_sdram_bankmachine6_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine6_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine6_req_wdata_ready <= soclinux_sdram_bankmachine6_cmd_ready; |
| soclinux_sdram_bankmachine6_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine6_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine6_req_rdata_valid <= soclinux_sdram_bankmachine6_cmd_ready; |
| soclinux_sdram_bankmachine6_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine6_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine6_cmd_ready & soclinux_sdram_bankmachine6_auto_precharge)) begin |
| bankmachine6_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine6_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine6_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine7_req_valid; |
| assign soclinux_sdram_bankmachine7_req_ready = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine7_req_we; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine7_req_addr; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_sink_valid = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine7_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_sink_first = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_sink_last = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_source_ready = (soclinux_sdram_bankmachine7_req_wdata_ready | soclinux_sdram_bankmachine7_req_rdata_valid); |
| assign soclinux_sdram_bankmachine7_req_lock = (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine7_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine7_row_hit = (soclinux_sdram_bankmachine7_row == soclinux_sdram_bankmachine7_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine7_cmd_payload_ba = 3'd7; |
| always @(*) begin |
| soclinux_sdram_bankmachine7_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine7_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine7_cmd_payload_a <= soclinux_sdram_bankmachine7_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine7_cmd_payload_a <= ((soclinux_sdram_bankmachine7_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine7_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine7_twtpcon_valid = ((soclinux_sdram_bankmachine7_cmd_valid & soclinux_sdram_bankmachine7_cmd_ready) & soclinux_sdram_bankmachine7_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine7_trccon_valid = ((soclinux_sdram_bankmachine7_cmd_valid & soclinux_sdram_bankmachine7_cmd_ready) & soclinux_sdram_bankmachine7_row_open); |
| assign soclinux_sdram_bankmachine7_trascon_valid = ((soclinux_sdram_bankmachine7_cmd_valid & soclinux_sdram_bankmachine7_cmd_ready) & soclinux_sdram_bankmachine7_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine7_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine7_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine7_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine7_auto_precharge <= (soclinux_sdram_bankmachine7_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_din = {soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_dout; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_writable; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_we = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_readable; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_re = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine7_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_din; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_we & (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_writable | soclinux_sdram_bankmachine7_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_readable & soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_re); |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_dout = soclinux_sdram_bankmachine7_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_writable = (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_readable = (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine7_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine7_cmd_buffer_source_valid) | soclinux_sdram_bankmachine7_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine7_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine7_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine7_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine7_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine7_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine7_cmd_valid <= 1'd0; |
| bankmachine7_next_state <= 4'd0; |
| soclinux_sdram_bankmachine7_row_open <= 1'd0; |
| soclinux_sdram_bankmachine7_row_close <= 1'd0; |
| soclinux_sdram_bankmachine7_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine7_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine7_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine7_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine7_cmd_payload_is_read <= 1'd0; |
| bankmachine7_next_state <= bankmachine7_state; |
| case (bankmachine7_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine7_twtpcon_ready & soclinux_sdram_bankmachine7_trascon_ready)) begin |
| soclinux_sdram_bankmachine7_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine7_cmd_ready) begin |
| bankmachine7_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine7_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine7_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine7_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine7_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine7_twtpcon_ready & soclinux_sdram_bankmachine7_trascon_ready)) begin |
| bankmachine7_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine7_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine7_trccon_ready) begin |
| soclinux_sdram_bankmachine7_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine7_row_open <= 1'd1; |
| soclinux_sdram_bankmachine7_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine7_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine7_cmd_ready) begin |
| bankmachine7_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine7_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine7_twtpcon_ready) begin |
| soclinux_sdram_bankmachine7_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine7_row_close <= 1'd1; |
| soclinux_sdram_bankmachine7_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine7_refresh_req)) begin |
| bankmachine7_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine7_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine7_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine7_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine7_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine7_refresh_req) begin |
| bankmachine7_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine7_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine7_row_opened) begin |
| if (soclinux_sdram_bankmachine7_row_hit) begin |
| soclinux_sdram_bankmachine7_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine7_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine7_req_wdata_ready <= soclinux_sdram_bankmachine7_cmd_ready; |
| soclinux_sdram_bankmachine7_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine7_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine7_req_rdata_valid <= soclinux_sdram_bankmachine7_cmd_ready; |
| soclinux_sdram_bankmachine7_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine7_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine7_cmd_ready & soclinux_sdram_bankmachine7_auto_precharge)) begin |
| bankmachine7_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine7_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine7_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine8_req_valid; |
| assign soclinux_sdram_bankmachine8_req_ready = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine8_req_we; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine8_req_addr; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_sink_valid = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine8_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_sink_first = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_sink_last = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_source_ready = (soclinux_sdram_bankmachine8_req_wdata_ready | soclinux_sdram_bankmachine8_req_rdata_valid); |
| assign soclinux_sdram_bankmachine8_req_lock = (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine8_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine8_row_hit = (soclinux_sdram_bankmachine8_row == soclinux_sdram_bankmachine8_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine8_cmd_payload_ba = 4'd8; |
| always @(*) begin |
| soclinux_sdram_bankmachine8_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine8_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine8_cmd_payload_a <= soclinux_sdram_bankmachine8_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine8_cmd_payload_a <= ((soclinux_sdram_bankmachine8_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine8_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine8_twtpcon_valid = ((soclinux_sdram_bankmachine8_cmd_valid & soclinux_sdram_bankmachine8_cmd_ready) & soclinux_sdram_bankmachine8_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine8_trccon_valid = ((soclinux_sdram_bankmachine8_cmd_valid & soclinux_sdram_bankmachine8_cmd_ready) & soclinux_sdram_bankmachine8_row_open); |
| assign soclinux_sdram_bankmachine8_trascon_valid = ((soclinux_sdram_bankmachine8_cmd_valid & soclinux_sdram_bankmachine8_cmd_ready) & soclinux_sdram_bankmachine8_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine8_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine8_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine8_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine8_auto_precharge <= (soclinux_sdram_bankmachine8_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_din = {soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_dout; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_writable; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_we = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_readable; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_re = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine8_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_din; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_we & (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_writable | soclinux_sdram_bankmachine8_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_readable & soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_re); |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_dout = soclinux_sdram_bankmachine8_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_writable = (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_readable = (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine8_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine8_cmd_buffer_source_valid) | soclinux_sdram_bankmachine8_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine8_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine8_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine8_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine8_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine8_cmd_valid <= 1'd0; |
| bankmachine8_next_state <= 4'd0; |
| soclinux_sdram_bankmachine8_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine8_row_open <= 1'd0; |
| soclinux_sdram_bankmachine8_row_close <= 1'd0; |
| soclinux_sdram_bankmachine8_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine8_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine8_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine8_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine8_cmd_payload_is_read <= 1'd0; |
| bankmachine8_next_state <= bankmachine8_state; |
| case (bankmachine8_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine8_twtpcon_ready & soclinux_sdram_bankmachine8_trascon_ready)) begin |
| soclinux_sdram_bankmachine8_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine8_cmd_ready) begin |
| bankmachine8_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine8_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine8_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine8_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine8_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine8_twtpcon_ready & soclinux_sdram_bankmachine8_trascon_ready)) begin |
| bankmachine8_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine8_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine8_trccon_ready) begin |
| soclinux_sdram_bankmachine8_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine8_row_open <= 1'd1; |
| soclinux_sdram_bankmachine8_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine8_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine8_cmd_ready) begin |
| bankmachine8_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine8_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine8_twtpcon_ready) begin |
| soclinux_sdram_bankmachine8_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine8_row_close <= 1'd1; |
| soclinux_sdram_bankmachine8_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine8_refresh_req)) begin |
| bankmachine8_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine8_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine8_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine8_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine8_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine8_refresh_req) begin |
| bankmachine8_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine8_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine8_row_opened) begin |
| if (soclinux_sdram_bankmachine8_row_hit) begin |
| soclinux_sdram_bankmachine8_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine8_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine8_req_wdata_ready <= soclinux_sdram_bankmachine8_cmd_ready; |
| soclinux_sdram_bankmachine8_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine8_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine8_req_rdata_valid <= soclinux_sdram_bankmachine8_cmd_ready; |
| soclinux_sdram_bankmachine8_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine8_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine8_cmd_ready & soclinux_sdram_bankmachine8_auto_precharge)) begin |
| bankmachine8_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine8_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine8_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine9_req_valid; |
| assign soclinux_sdram_bankmachine9_req_ready = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine9_req_we; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine9_req_addr; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_sink_valid = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine9_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_sink_first = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_sink_last = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_source_ready = (soclinux_sdram_bankmachine9_req_wdata_ready | soclinux_sdram_bankmachine9_req_rdata_valid); |
| assign soclinux_sdram_bankmachine9_req_lock = (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine9_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine9_row_hit = (soclinux_sdram_bankmachine9_row == soclinux_sdram_bankmachine9_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine9_cmd_payload_ba = 4'd9; |
| always @(*) begin |
| soclinux_sdram_bankmachine9_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine9_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine9_cmd_payload_a <= soclinux_sdram_bankmachine9_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine9_cmd_payload_a <= ((soclinux_sdram_bankmachine9_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine9_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine9_twtpcon_valid = ((soclinux_sdram_bankmachine9_cmd_valid & soclinux_sdram_bankmachine9_cmd_ready) & soclinux_sdram_bankmachine9_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine9_trccon_valid = ((soclinux_sdram_bankmachine9_cmd_valid & soclinux_sdram_bankmachine9_cmd_ready) & soclinux_sdram_bankmachine9_row_open); |
| assign soclinux_sdram_bankmachine9_trascon_valid = ((soclinux_sdram_bankmachine9_cmd_valid & soclinux_sdram_bankmachine9_cmd_ready) & soclinux_sdram_bankmachine9_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine9_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine9_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine9_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine9_auto_precharge <= (soclinux_sdram_bankmachine9_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_din = {soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_dout; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_writable; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_we = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_readable; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_re = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine9_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_din; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_we & (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_writable | soclinux_sdram_bankmachine9_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_readable & soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_re); |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_dout = soclinux_sdram_bankmachine9_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_writable = (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_readable = (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine9_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine9_cmd_buffer_source_valid) | soclinux_sdram_bankmachine9_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine9_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine9_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine9_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine9_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine9_cmd_valid <= 1'd0; |
| bankmachine9_next_state <= 4'd0; |
| soclinux_sdram_bankmachine9_row_open <= 1'd0; |
| soclinux_sdram_bankmachine9_row_close <= 1'd0; |
| soclinux_sdram_bankmachine9_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine9_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine9_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine9_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine9_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine9_cmd_payload_is_read <= 1'd0; |
| bankmachine9_next_state <= bankmachine9_state; |
| case (bankmachine9_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine9_twtpcon_ready & soclinux_sdram_bankmachine9_trascon_ready)) begin |
| soclinux_sdram_bankmachine9_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine9_cmd_ready) begin |
| bankmachine9_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine9_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine9_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine9_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine9_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine9_twtpcon_ready & soclinux_sdram_bankmachine9_trascon_ready)) begin |
| bankmachine9_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine9_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine9_trccon_ready) begin |
| soclinux_sdram_bankmachine9_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine9_row_open <= 1'd1; |
| soclinux_sdram_bankmachine9_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine9_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine9_cmd_ready) begin |
| bankmachine9_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine9_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine9_twtpcon_ready) begin |
| soclinux_sdram_bankmachine9_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine9_row_close <= 1'd1; |
| soclinux_sdram_bankmachine9_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine9_refresh_req)) begin |
| bankmachine9_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine9_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine9_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine9_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine9_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine9_refresh_req) begin |
| bankmachine9_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine9_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine9_row_opened) begin |
| if (soclinux_sdram_bankmachine9_row_hit) begin |
| soclinux_sdram_bankmachine9_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine9_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine9_req_wdata_ready <= soclinux_sdram_bankmachine9_cmd_ready; |
| soclinux_sdram_bankmachine9_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine9_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine9_req_rdata_valid <= soclinux_sdram_bankmachine9_cmd_ready; |
| soclinux_sdram_bankmachine9_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine9_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine9_cmd_ready & soclinux_sdram_bankmachine9_auto_precharge)) begin |
| bankmachine9_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine9_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine9_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine10_req_valid; |
| assign soclinux_sdram_bankmachine10_req_ready = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine10_req_we; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine10_req_addr; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_sink_valid = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine10_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_sink_first = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_sink_last = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_source_ready = (soclinux_sdram_bankmachine10_req_wdata_ready | soclinux_sdram_bankmachine10_req_rdata_valid); |
| assign soclinux_sdram_bankmachine10_req_lock = (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine10_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine10_row_hit = (soclinux_sdram_bankmachine10_row == soclinux_sdram_bankmachine10_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine10_cmd_payload_ba = 4'd10; |
| always @(*) begin |
| soclinux_sdram_bankmachine10_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine10_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine10_cmd_payload_a <= soclinux_sdram_bankmachine10_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine10_cmd_payload_a <= ((soclinux_sdram_bankmachine10_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine10_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine10_twtpcon_valid = ((soclinux_sdram_bankmachine10_cmd_valid & soclinux_sdram_bankmachine10_cmd_ready) & soclinux_sdram_bankmachine10_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine10_trccon_valid = ((soclinux_sdram_bankmachine10_cmd_valid & soclinux_sdram_bankmachine10_cmd_ready) & soclinux_sdram_bankmachine10_row_open); |
| assign soclinux_sdram_bankmachine10_trascon_valid = ((soclinux_sdram_bankmachine10_cmd_valid & soclinux_sdram_bankmachine10_cmd_ready) & soclinux_sdram_bankmachine10_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine10_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine10_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine10_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine10_auto_precharge <= (soclinux_sdram_bankmachine10_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_din = {soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_dout; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_writable; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_we = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_readable; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_re = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine10_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_din; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_we & (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_writable | soclinux_sdram_bankmachine10_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_readable & soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_re); |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_dout = soclinux_sdram_bankmachine10_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_writable = (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_readable = (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine10_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine10_cmd_buffer_source_valid) | soclinux_sdram_bankmachine10_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine10_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine10_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine10_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine10_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine10_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine10_cmd_valid <= 1'd0; |
| bankmachine10_next_state <= 4'd0; |
| soclinux_sdram_bankmachine10_row_open <= 1'd0; |
| soclinux_sdram_bankmachine10_row_close <= 1'd0; |
| soclinux_sdram_bankmachine10_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine10_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine10_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine10_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine10_cmd_payload_is_read <= 1'd0; |
| bankmachine10_next_state <= bankmachine10_state; |
| case (bankmachine10_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine10_twtpcon_ready & soclinux_sdram_bankmachine10_trascon_ready)) begin |
| soclinux_sdram_bankmachine10_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine10_cmd_ready) begin |
| bankmachine10_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine10_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine10_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine10_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine10_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine10_twtpcon_ready & soclinux_sdram_bankmachine10_trascon_ready)) begin |
| bankmachine10_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine10_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine10_trccon_ready) begin |
| soclinux_sdram_bankmachine10_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine10_row_open <= 1'd1; |
| soclinux_sdram_bankmachine10_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine10_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine10_cmd_ready) begin |
| bankmachine10_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine10_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine10_twtpcon_ready) begin |
| soclinux_sdram_bankmachine10_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine10_row_close <= 1'd1; |
| soclinux_sdram_bankmachine10_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine10_refresh_req)) begin |
| bankmachine10_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine10_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine10_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine10_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine10_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine10_refresh_req) begin |
| bankmachine10_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine10_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine10_row_opened) begin |
| if (soclinux_sdram_bankmachine10_row_hit) begin |
| soclinux_sdram_bankmachine10_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine10_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine10_req_wdata_ready <= soclinux_sdram_bankmachine10_cmd_ready; |
| soclinux_sdram_bankmachine10_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine10_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine10_req_rdata_valid <= soclinux_sdram_bankmachine10_cmd_ready; |
| soclinux_sdram_bankmachine10_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine10_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine10_cmd_ready & soclinux_sdram_bankmachine10_auto_precharge)) begin |
| bankmachine10_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine10_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine10_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine11_req_valid; |
| assign soclinux_sdram_bankmachine11_req_ready = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine11_req_we; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine11_req_addr; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_sink_valid = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine11_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_sink_first = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_sink_last = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_source_ready = (soclinux_sdram_bankmachine11_req_wdata_ready | soclinux_sdram_bankmachine11_req_rdata_valid); |
| assign soclinux_sdram_bankmachine11_req_lock = (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine11_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine11_row_hit = (soclinux_sdram_bankmachine11_row == soclinux_sdram_bankmachine11_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine11_cmd_payload_ba = 4'd11; |
| always @(*) begin |
| soclinux_sdram_bankmachine11_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine11_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine11_cmd_payload_a <= soclinux_sdram_bankmachine11_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine11_cmd_payload_a <= ((soclinux_sdram_bankmachine11_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine11_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine11_twtpcon_valid = ((soclinux_sdram_bankmachine11_cmd_valid & soclinux_sdram_bankmachine11_cmd_ready) & soclinux_sdram_bankmachine11_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine11_trccon_valid = ((soclinux_sdram_bankmachine11_cmd_valid & soclinux_sdram_bankmachine11_cmd_ready) & soclinux_sdram_bankmachine11_row_open); |
| assign soclinux_sdram_bankmachine11_trascon_valid = ((soclinux_sdram_bankmachine11_cmd_valid & soclinux_sdram_bankmachine11_cmd_ready) & soclinux_sdram_bankmachine11_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine11_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine11_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine11_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine11_auto_precharge <= (soclinux_sdram_bankmachine11_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_din = {soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_dout; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_writable; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_we = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_readable; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_re = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine11_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_din; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_we & (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_writable | soclinux_sdram_bankmachine11_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_readable & soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_re); |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_dout = soclinux_sdram_bankmachine11_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_writable = (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_readable = (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine11_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine11_cmd_buffer_source_valid) | soclinux_sdram_bankmachine11_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine11_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine11_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine11_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine11_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine11_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine11_cmd_valid <= 1'd0; |
| bankmachine11_next_state <= 4'd0; |
| soclinux_sdram_bankmachine11_row_open <= 1'd0; |
| soclinux_sdram_bankmachine11_row_close <= 1'd0; |
| soclinux_sdram_bankmachine11_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine11_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine11_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine11_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine11_cmd_payload_is_read <= 1'd0; |
| bankmachine11_next_state <= bankmachine11_state; |
| case (bankmachine11_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine11_twtpcon_ready & soclinux_sdram_bankmachine11_trascon_ready)) begin |
| soclinux_sdram_bankmachine11_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine11_cmd_ready) begin |
| bankmachine11_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine11_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine11_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine11_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine11_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine11_twtpcon_ready & soclinux_sdram_bankmachine11_trascon_ready)) begin |
| bankmachine11_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine11_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine11_trccon_ready) begin |
| soclinux_sdram_bankmachine11_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine11_row_open <= 1'd1; |
| soclinux_sdram_bankmachine11_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine11_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine11_cmd_ready) begin |
| bankmachine11_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine11_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine11_twtpcon_ready) begin |
| soclinux_sdram_bankmachine11_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine11_row_close <= 1'd1; |
| soclinux_sdram_bankmachine11_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine11_refresh_req)) begin |
| bankmachine11_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine11_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine11_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine11_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine11_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine11_refresh_req) begin |
| bankmachine11_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine11_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine11_row_opened) begin |
| if (soclinux_sdram_bankmachine11_row_hit) begin |
| soclinux_sdram_bankmachine11_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine11_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine11_req_wdata_ready <= soclinux_sdram_bankmachine11_cmd_ready; |
| soclinux_sdram_bankmachine11_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine11_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine11_req_rdata_valid <= soclinux_sdram_bankmachine11_cmd_ready; |
| soclinux_sdram_bankmachine11_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine11_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine11_cmd_ready & soclinux_sdram_bankmachine11_auto_precharge)) begin |
| bankmachine11_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine11_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine11_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine12_req_valid; |
| assign soclinux_sdram_bankmachine12_req_ready = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine12_req_we; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine12_req_addr; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_sink_valid = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine12_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_sink_first = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_sink_last = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_source_ready = (soclinux_sdram_bankmachine12_req_wdata_ready | soclinux_sdram_bankmachine12_req_rdata_valid); |
| assign soclinux_sdram_bankmachine12_req_lock = (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine12_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine12_row_hit = (soclinux_sdram_bankmachine12_row == soclinux_sdram_bankmachine12_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine12_cmd_payload_ba = 4'd12; |
| always @(*) begin |
| soclinux_sdram_bankmachine12_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine12_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine12_cmd_payload_a <= soclinux_sdram_bankmachine12_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine12_cmd_payload_a <= ((soclinux_sdram_bankmachine12_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine12_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine12_twtpcon_valid = ((soclinux_sdram_bankmachine12_cmd_valid & soclinux_sdram_bankmachine12_cmd_ready) & soclinux_sdram_bankmachine12_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine12_trccon_valid = ((soclinux_sdram_bankmachine12_cmd_valid & soclinux_sdram_bankmachine12_cmd_ready) & soclinux_sdram_bankmachine12_row_open); |
| assign soclinux_sdram_bankmachine12_trascon_valid = ((soclinux_sdram_bankmachine12_cmd_valid & soclinux_sdram_bankmachine12_cmd_ready) & soclinux_sdram_bankmachine12_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine12_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine12_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine12_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine12_auto_precharge <= (soclinux_sdram_bankmachine12_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_din = {soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_dout; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_writable; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_we = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_readable; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_re = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine12_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_din; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_we & (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_writable | soclinux_sdram_bankmachine12_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_readable & soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_re); |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_dout = soclinux_sdram_bankmachine12_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_writable = (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_readable = (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine12_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine12_cmd_buffer_source_valid) | soclinux_sdram_bankmachine12_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine12_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine12_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine12_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine12_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine12_cmd_valid <= 1'd0; |
| bankmachine12_next_state <= 4'd0; |
| soclinux_sdram_bankmachine12_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine12_row_open <= 1'd0; |
| soclinux_sdram_bankmachine12_row_close <= 1'd0; |
| soclinux_sdram_bankmachine12_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine12_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine12_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine12_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine12_cmd_payload_is_read <= 1'd0; |
| bankmachine12_next_state <= bankmachine12_state; |
| case (bankmachine12_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine12_twtpcon_ready & soclinux_sdram_bankmachine12_trascon_ready)) begin |
| soclinux_sdram_bankmachine12_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine12_cmd_ready) begin |
| bankmachine12_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine12_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine12_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine12_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine12_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine12_twtpcon_ready & soclinux_sdram_bankmachine12_trascon_ready)) begin |
| bankmachine12_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine12_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine12_trccon_ready) begin |
| soclinux_sdram_bankmachine12_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine12_row_open <= 1'd1; |
| soclinux_sdram_bankmachine12_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine12_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine12_cmd_ready) begin |
| bankmachine12_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine12_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine12_twtpcon_ready) begin |
| soclinux_sdram_bankmachine12_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine12_row_close <= 1'd1; |
| soclinux_sdram_bankmachine12_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine12_refresh_req)) begin |
| bankmachine12_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine12_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine12_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine12_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine12_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine12_refresh_req) begin |
| bankmachine12_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine12_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine12_row_opened) begin |
| if (soclinux_sdram_bankmachine12_row_hit) begin |
| soclinux_sdram_bankmachine12_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine12_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine12_req_wdata_ready <= soclinux_sdram_bankmachine12_cmd_ready; |
| soclinux_sdram_bankmachine12_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine12_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine12_req_rdata_valid <= soclinux_sdram_bankmachine12_cmd_ready; |
| soclinux_sdram_bankmachine12_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine12_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine12_cmd_ready & soclinux_sdram_bankmachine12_auto_precharge)) begin |
| bankmachine12_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine12_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine12_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine13_req_valid; |
| assign soclinux_sdram_bankmachine13_req_ready = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine13_req_we; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine13_req_addr; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_sink_valid = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine13_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_sink_first = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_sink_last = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_source_ready = (soclinux_sdram_bankmachine13_req_wdata_ready | soclinux_sdram_bankmachine13_req_rdata_valid); |
| assign soclinux_sdram_bankmachine13_req_lock = (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine13_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine13_row_hit = (soclinux_sdram_bankmachine13_row == soclinux_sdram_bankmachine13_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine13_cmd_payload_ba = 4'd13; |
| always @(*) begin |
| soclinux_sdram_bankmachine13_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine13_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine13_cmd_payload_a <= soclinux_sdram_bankmachine13_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine13_cmd_payload_a <= ((soclinux_sdram_bankmachine13_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine13_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine13_twtpcon_valid = ((soclinux_sdram_bankmachine13_cmd_valid & soclinux_sdram_bankmachine13_cmd_ready) & soclinux_sdram_bankmachine13_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine13_trccon_valid = ((soclinux_sdram_bankmachine13_cmd_valid & soclinux_sdram_bankmachine13_cmd_ready) & soclinux_sdram_bankmachine13_row_open); |
| assign soclinux_sdram_bankmachine13_trascon_valid = ((soclinux_sdram_bankmachine13_cmd_valid & soclinux_sdram_bankmachine13_cmd_ready) & soclinux_sdram_bankmachine13_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine13_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine13_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine13_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine13_auto_precharge <= (soclinux_sdram_bankmachine13_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_din = {soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_dout; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_writable; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_we = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_readable; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_re = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine13_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_din; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_we & (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_writable | soclinux_sdram_bankmachine13_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_readable & soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_re); |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_dout = soclinux_sdram_bankmachine13_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_writable = (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_readable = (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine13_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine13_cmd_buffer_source_valid) | soclinux_sdram_bankmachine13_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine13_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine13_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine13_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine13_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine13_cmd_valid <= 1'd0; |
| bankmachine13_next_state <= 4'd0; |
| soclinux_sdram_bankmachine13_row_open <= 1'd0; |
| soclinux_sdram_bankmachine13_row_close <= 1'd0; |
| soclinux_sdram_bankmachine13_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine13_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine13_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine13_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine13_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine13_cmd_payload_is_read <= 1'd0; |
| bankmachine13_next_state <= bankmachine13_state; |
| case (bankmachine13_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine13_twtpcon_ready & soclinux_sdram_bankmachine13_trascon_ready)) begin |
| soclinux_sdram_bankmachine13_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine13_cmd_ready) begin |
| bankmachine13_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine13_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine13_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine13_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine13_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine13_twtpcon_ready & soclinux_sdram_bankmachine13_trascon_ready)) begin |
| bankmachine13_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine13_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine13_trccon_ready) begin |
| soclinux_sdram_bankmachine13_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine13_row_open <= 1'd1; |
| soclinux_sdram_bankmachine13_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine13_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine13_cmd_ready) begin |
| bankmachine13_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine13_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine13_twtpcon_ready) begin |
| soclinux_sdram_bankmachine13_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine13_row_close <= 1'd1; |
| soclinux_sdram_bankmachine13_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine13_refresh_req)) begin |
| bankmachine13_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine13_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine13_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine13_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine13_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine13_refresh_req) begin |
| bankmachine13_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine13_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine13_row_opened) begin |
| if (soclinux_sdram_bankmachine13_row_hit) begin |
| soclinux_sdram_bankmachine13_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine13_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine13_req_wdata_ready <= soclinux_sdram_bankmachine13_cmd_ready; |
| soclinux_sdram_bankmachine13_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine13_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine13_req_rdata_valid <= soclinux_sdram_bankmachine13_cmd_ready; |
| soclinux_sdram_bankmachine13_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine13_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine13_cmd_ready & soclinux_sdram_bankmachine13_auto_precharge)) begin |
| bankmachine13_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine13_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine13_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine14_req_valid; |
| assign soclinux_sdram_bankmachine14_req_ready = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine14_req_we; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine14_req_addr; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_sink_valid = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine14_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_sink_first = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_sink_last = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_source_ready = (soclinux_sdram_bankmachine14_req_wdata_ready | soclinux_sdram_bankmachine14_req_rdata_valid); |
| assign soclinux_sdram_bankmachine14_req_lock = (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine14_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine14_row_hit = (soclinux_sdram_bankmachine14_row == soclinux_sdram_bankmachine14_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine14_cmd_payload_ba = 4'd14; |
| always @(*) begin |
| soclinux_sdram_bankmachine14_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine14_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine14_cmd_payload_a <= soclinux_sdram_bankmachine14_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine14_cmd_payload_a <= ((soclinux_sdram_bankmachine14_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine14_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine14_twtpcon_valid = ((soclinux_sdram_bankmachine14_cmd_valid & soclinux_sdram_bankmachine14_cmd_ready) & soclinux_sdram_bankmachine14_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine14_trccon_valid = ((soclinux_sdram_bankmachine14_cmd_valid & soclinux_sdram_bankmachine14_cmd_ready) & soclinux_sdram_bankmachine14_row_open); |
| assign soclinux_sdram_bankmachine14_trascon_valid = ((soclinux_sdram_bankmachine14_cmd_valid & soclinux_sdram_bankmachine14_cmd_ready) & soclinux_sdram_bankmachine14_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine14_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine14_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine14_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine14_auto_precharge <= (soclinux_sdram_bankmachine14_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_din = {soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_dout; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_writable; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_we = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_readable; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_re = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine14_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_din; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_we & (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_writable | soclinux_sdram_bankmachine14_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_readable & soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_re); |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_dout = soclinux_sdram_bankmachine14_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_writable = (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_readable = (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine14_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine14_cmd_buffer_source_valid) | soclinux_sdram_bankmachine14_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine14_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine14_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine14_row_col_n_addr_sel <= 1'd0; |
| soclinux_sdram_bankmachine14_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine14_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine14_cmd_valid <= 1'd0; |
| bankmachine14_next_state <= 4'd0; |
| soclinux_sdram_bankmachine14_row_open <= 1'd0; |
| soclinux_sdram_bankmachine14_row_close <= 1'd0; |
| soclinux_sdram_bankmachine14_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine14_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine14_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine14_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine14_cmd_payload_is_read <= 1'd0; |
| bankmachine14_next_state <= bankmachine14_state; |
| case (bankmachine14_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine14_twtpcon_ready & soclinux_sdram_bankmachine14_trascon_ready)) begin |
| soclinux_sdram_bankmachine14_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine14_cmd_ready) begin |
| bankmachine14_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine14_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine14_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine14_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine14_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine14_twtpcon_ready & soclinux_sdram_bankmachine14_trascon_ready)) begin |
| bankmachine14_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine14_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine14_trccon_ready) begin |
| soclinux_sdram_bankmachine14_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine14_row_open <= 1'd1; |
| soclinux_sdram_bankmachine14_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine14_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine14_cmd_ready) begin |
| bankmachine14_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine14_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine14_twtpcon_ready) begin |
| soclinux_sdram_bankmachine14_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine14_row_close <= 1'd1; |
| soclinux_sdram_bankmachine14_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine14_refresh_req)) begin |
| bankmachine14_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine14_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine14_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine14_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine14_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine14_refresh_req) begin |
| bankmachine14_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine14_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine14_row_opened) begin |
| if (soclinux_sdram_bankmachine14_row_hit) begin |
| soclinux_sdram_bankmachine14_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine14_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine14_req_wdata_ready <= soclinux_sdram_bankmachine14_cmd_ready; |
| soclinux_sdram_bankmachine14_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine14_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine14_req_rdata_valid <= soclinux_sdram_bankmachine14_cmd_ready; |
| soclinux_sdram_bankmachine14_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine14_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine14_cmd_ready & soclinux_sdram_bankmachine14_auto_precharge)) begin |
| bankmachine14_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine14_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine14_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_valid = soclinux_sdram_bankmachine15_req_valid; |
| assign soclinux_sdram_bankmachine15_req_ready = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_ready; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_payload_we = soclinux_sdram_bankmachine15_req_we; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_payload_addr = soclinux_sdram_bankmachine15_req_addr; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_sink_valid = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_valid; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_ready = soclinux_sdram_bankmachine15_cmd_buffer_sink_ready; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_sink_first = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_first; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_sink_last = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_last; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_sink_payload_we = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_payload_we; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_sink_payload_addr = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_payload_addr; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_source_ready = (soclinux_sdram_bankmachine15_req_wdata_ready | soclinux_sdram_bankmachine15_req_rdata_valid); |
| assign soclinux_sdram_bankmachine15_req_lock = (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_valid | soclinux_sdram_bankmachine15_cmd_buffer_source_valid); |
| assign soclinux_sdram_bankmachine15_row_hit = (soclinux_sdram_bankmachine15_row == soclinux_sdram_bankmachine15_cmd_buffer_source_payload_addr[21:7]); |
| assign soclinux_sdram_bankmachine15_cmd_payload_ba = 4'd15; |
| always @(*) begin |
| soclinux_sdram_bankmachine15_cmd_payload_a <= 15'd0; |
| if (soclinux_sdram_bankmachine15_row_col_n_addr_sel) begin |
| soclinux_sdram_bankmachine15_cmd_payload_a <= soclinux_sdram_bankmachine15_cmd_buffer_source_payload_addr[21:7]; |
| end else begin |
| soclinux_sdram_bankmachine15_cmd_payload_a <= ((soclinux_sdram_bankmachine15_auto_precharge <<< 4'd10) | {soclinux_sdram_bankmachine15_cmd_buffer_source_payload_addr[6:0], {3{1'd0}}}); |
| end |
| end |
| assign soclinux_sdram_bankmachine15_twtpcon_valid = ((soclinux_sdram_bankmachine15_cmd_valid & soclinux_sdram_bankmachine15_cmd_ready) & soclinux_sdram_bankmachine15_cmd_payload_is_write); |
| assign soclinux_sdram_bankmachine15_trccon_valid = ((soclinux_sdram_bankmachine15_cmd_valid & soclinux_sdram_bankmachine15_cmd_ready) & soclinux_sdram_bankmachine15_row_open); |
| assign soclinux_sdram_bankmachine15_trascon_valid = ((soclinux_sdram_bankmachine15_cmd_valid & soclinux_sdram_bankmachine15_cmd_ready) & soclinux_sdram_bankmachine15_row_open); |
| always @(*) begin |
| soclinux_sdram_bankmachine15_auto_precharge <= 1'd0; |
| if ((soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_valid & soclinux_sdram_bankmachine15_cmd_buffer_source_valid)) begin |
| if ((soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_payload_addr[21:7] != soclinux_sdram_bankmachine15_cmd_buffer_source_payload_addr[21:7])) begin |
| soclinux_sdram_bankmachine15_auto_precharge <= (soclinux_sdram_bankmachine15_row_close == 1'd0); |
| end |
| end |
| end |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_din = {soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_in_last, soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_in_first, soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_in_payload_addr, soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_in_payload_we}; |
| assign {soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_out_last, soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_out_first, soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_out_payload_addr, soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_out_payload_we} = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_dout; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_ready = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_writable; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_we = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_valid; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_in_first = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_first; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_in_last = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_last; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_in_payload_we = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_payload_we; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_in_payload_addr = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_sink_payload_addr; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_valid = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_readable; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_first = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_out_first; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_last = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_out_last; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_payload_we = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_out_payload_we; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_payload_addr = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_fifo_out_payload_addr; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_re = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_source_ready; |
| always @(*) begin |
| soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_adr <= 3'd0; |
| if (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_replace) begin |
| soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_adr <= (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_produce - 1'd1); |
| end else begin |
| soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_adr <= soclinux_sdram_bankmachine15_cmd_buffer_lookahead_produce; |
| end |
| end |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_dat_w = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_din; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_we = (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_we & (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_writable | soclinux_sdram_bankmachine15_cmd_buffer_lookahead_replace)); |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_do_read = (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_readable & soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_re); |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_rdport_adr = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_consume; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_dout = soclinux_sdram_bankmachine15_cmd_buffer_lookahead_rdport_dat_r; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_writable = (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_level != 4'd8); |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_readable = (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_level != 1'd0); |
| assign soclinux_sdram_bankmachine15_cmd_buffer_sink_ready = ((~soclinux_sdram_bankmachine15_cmd_buffer_source_valid) | soclinux_sdram_bankmachine15_cmd_buffer_source_ready); |
| always @(*) begin |
| soclinux_sdram_bankmachine15_cmd_payload_is_write <= 1'd0; |
| soclinux_sdram_bankmachine15_req_wdata_ready <= 1'd0; |
| soclinux_sdram_bankmachine15_req_rdata_valid <= 1'd0; |
| soclinux_sdram_bankmachine15_refresh_gnt <= 1'd0; |
| soclinux_sdram_bankmachine15_cmd_valid <= 1'd0; |
| soclinux_sdram_bankmachine15_row_col_n_addr_sel <= 1'd0; |
| bankmachine15_next_state <= 4'd0; |
| soclinux_sdram_bankmachine15_row_open <= 1'd0; |
| soclinux_sdram_bankmachine15_row_close <= 1'd0; |
| soclinux_sdram_bankmachine15_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_bankmachine15_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_bankmachine15_cmd_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine15_cmd_payload_is_cmd <= 1'd0; |
| soclinux_sdram_bankmachine15_cmd_payload_is_read <= 1'd0; |
| bankmachine15_next_state <= bankmachine15_state; |
| case (bankmachine15_state) |
| 1'd1: begin |
| if ((soclinux_sdram_bankmachine15_twtpcon_ready & soclinux_sdram_bankmachine15_trascon_ready)) begin |
| soclinux_sdram_bankmachine15_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine15_cmd_ready) begin |
| bankmachine15_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine15_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_bankmachine15_cmd_payload_we <= 1'd1; |
| soclinux_sdram_bankmachine15_cmd_payload_is_cmd <= 1'd1; |
| end |
| soclinux_sdram_bankmachine15_row_close <= 1'd1; |
| end |
| 2'd2: begin |
| if ((soclinux_sdram_bankmachine15_twtpcon_ready & soclinux_sdram_bankmachine15_trascon_ready)) begin |
| bankmachine15_next_state <= 3'd5; |
| end |
| soclinux_sdram_bankmachine15_row_close <= 1'd1; |
| end |
| 2'd3: begin |
| if (soclinux_sdram_bankmachine15_trccon_ready) begin |
| soclinux_sdram_bankmachine15_row_col_n_addr_sel <= 1'd1; |
| soclinux_sdram_bankmachine15_row_open <= 1'd1; |
| soclinux_sdram_bankmachine15_cmd_valid <= 1'd1; |
| soclinux_sdram_bankmachine15_cmd_payload_is_cmd <= 1'd1; |
| if (soclinux_sdram_bankmachine15_cmd_ready) begin |
| bankmachine15_next_state <= 3'd7; |
| end |
| soclinux_sdram_bankmachine15_cmd_payload_ras <= 1'd1; |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_bankmachine15_twtpcon_ready) begin |
| soclinux_sdram_bankmachine15_refresh_gnt <= 1'd1; |
| end |
| soclinux_sdram_bankmachine15_row_close <= 1'd1; |
| soclinux_sdram_bankmachine15_cmd_payload_is_cmd <= 1'd1; |
| if ((~soclinux_sdram_bankmachine15_refresh_req)) begin |
| bankmachine15_next_state <= 1'd0; |
| end |
| end |
| 3'd5: begin |
| bankmachine15_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| bankmachine15_next_state <= 2'd3; |
| end |
| 3'd7: begin |
| bankmachine15_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| bankmachine15_next_state <= 1'd0; |
| end |
| default: begin |
| if (soclinux_sdram_bankmachine15_refresh_req) begin |
| bankmachine15_next_state <= 3'd4; |
| end else begin |
| if (soclinux_sdram_bankmachine15_cmd_buffer_source_valid) begin |
| if (soclinux_sdram_bankmachine15_row_opened) begin |
| if (soclinux_sdram_bankmachine15_row_hit) begin |
| soclinux_sdram_bankmachine15_cmd_valid <= 1'd1; |
| if (soclinux_sdram_bankmachine15_cmd_buffer_source_payload_we) begin |
| soclinux_sdram_bankmachine15_req_wdata_ready <= soclinux_sdram_bankmachine15_cmd_ready; |
| soclinux_sdram_bankmachine15_cmd_payload_is_write <= 1'd1; |
| soclinux_sdram_bankmachine15_cmd_payload_we <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine15_req_rdata_valid <= soclinux_sdram_bankmachine15_cmd_ready; |
| soclinux_sdram_bankmachine15_cmd_payload_is_read <= 1'd1; |
| end |
| soclinux_sdram_bankmachine15_cmd_payload_cas <= 1'd1; |
| if ((soclinux_sdram_bankmachine15_cmd_ready & soclinux_sdram_bankmachine15_auto_precharge)) begin |
| bankmachine15_next_state <= 2'd2; |
| end |
| end else begin |
| bankmachine15_next_state <= 1'd1; |
| end |
| end else begin |
| bankmachine15_next_state <= 2'd3; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| assign soclinux_sdram_trrdcon_valid = ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & ((soclinux_sdram_choose_cmd_cmd_payload_ras & (~soclinux_sdram_choose_cmd_cmd_payload_cas)) & (~soclinux_sdram_choose_cmd_cmd_payload_we))); |
| assign soclinux_sdram_tfawcon_valid = ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & ((soclinux_sdram_choose_cmd_cmd_payload_ras & (~soclinux_sdram_choose_cmd_cmd_payload_cas)) & (~soclinux_sdram_choose_cmd_cmd_payload_we))); |
| assign soclinux_sdram_ras_allowed = (soclinux_sdram_trrdcon_ready & soclinux_sdram_tfawcon_ready); |
| assign soclinux_sdram_tccdcon_valid = ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_cmd_payload_is_write | soclinux_sdram_choose_req_cmd_payload_is_read)); |
| assign soclinux_sdram_cas_allowed = soclinux_sdram_tccdcon_ready; |
| assign soclinux_sdram_twtrcon_valid = ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_is_write); |
| assign soclinux_sdram_read_available = ((((((((((((((((soclinux_sdram_bankmachine0_cmd_valid & soclinux_sdram_bankmachine0_cmd_payload_is_read) | (soclinux_sdram_bankmachine1_cmd_valid & soclinux_sdram_bankmachine1_cmd_payload_is_read)) | (soclinux_sdram_bankmachine2_cmd_valid & soclinux_sdram_bankmachine2_cmd_payload_is_read)) | (soclinux_sdram_bankmachine3_cmd_valid & soclinux_sdram_bankmachine3_cmd_payload_is_read)) | (soclinux_sdram_bankmachine4_cmd_valid & soclinux_sdram_bankmachine4_cmd_payload_is_read)) | (soclinux_sdram_bankmachine5_cmd_valid & soclinux_sdram_bankmachine5_cmd_payload_is_read)) | (soclinux_sdram_bankmachine6_cmd_valid & soclinux_sdram_bankmachine6_cmd_payload_is_read)) | (soclinux_sdram_bankmachine7_cmd_valid & soclinux_sdram_bankmachine7_cmd_payload_is_read)) | (soclinux_sdram_bankmachine8_cmd_valid & soclinux_sdram_bankmachine8_cmd_payload_is_read)) | (soclinux_sdram_bankmachine9_cmd_valid & soclinux_sdram_bankmachine9_cmd_payload_is_read)) | (soclinux_sdram_bankmachine10_cmd_valid & soclinux_sdram_bankmachine10_cmd_payload_is_read)) | (soclinux_sdram_bankmachine11_cmd_valid & soclinux_sdram_bankmachine11_cmd_payload_is_read)) | (soclinux_sdram_bankmachine12_cmd_valid & soclinux_sdram_bankmachine12_cmd_payload_is_read)) | (soclinux_sdram_bankmachine13_cmd_valid & soclinux_sdram_bankmachine13_cmd_payload_is_read)) | (soclinux_sdram_bankmachine14_cmd_valid & soclinux_sdram_bankmachine14_cmd_payload_is_read)) | (soclinux_sdram_bankmachine15_cmd_valid & soclinux_sdram_bankmachine15_cmd_payload_is_read)); |
| assign soclinux_sdram_write_available = ((((((((((((((((soclinux_sdram_bankmachine0_cmd_valid & soclinux_sdram_bankmachine0_cmd_payload_is_write) | (soclinux_sdram_bankmachine1_cmd_valid & soclinux_sdram_bankmachine1_cmd_payload_is_write)) | (soclinux_sdram_bankmachine2_cmd_valid & soclinux_sdram_bankmachine2_cmd_payload_is_write)) | (soclinux_sdram_bankmachine3_cmd_valid & soclinux_sdram_bankmachine3_cmd_payload_is_write)) | (soclinux_sdram_bankmachine4_cmd_valid & soclinux_sdram_bankmachine4_cmd_payload_is_write)) | (soclinux_sdram_bankmachine5_cmd_valid & soclinux_sdram_bankmachine5_cmd_payload_is_write)) | (soclinux_sdram_bankmachine6_cmd_valid & soclinux_sdram_bankmachine6_cmd_payload_is_write)) | (soclinux_sdram_bankmachine7_cmd_valid & soclinux_sdram_bankmachine7_cmd_payload_is_write)) | (soclinux_sdram_bankmachine8_cmd_valid & soclinux_sdram_bankmachine8_cmd_payload_is_write)) | (soclinux_sdram_bankmachine9_cmd_valid & soclinux_sdram_bankmachine9_cmd_payload_is_write)) | (soclinux_sdram_bankmachine10_cmd_valid & soclinux_sdram_bankmachine10_cmd_payload_is_write)) | (soclinux_sdram_bankmachine11_cmd_valid & soclinux_sdram_bankmachine11_cmd_payload_is_write)) | (soclinux_sdram_bankmachine12_cmd_valid & soclinux_sdram_bankmachine12_cmd_payload_is_write)) | (soclinux_sdram_bankmachine13_cmd_valid & soclinux_sdram_bankmachine13_cmd_payload_is_write)) | (soclinux_sdram_bankmachine14_cmd_valid & soclinux_sdram_bankmachine14_cmd_payload_is_write)) | (soclinux_sdram_bankmachine15_cmd_valid & soclinux_sdram_bankmachine15_cmd_payload_is_write)); |
| assign soclinux_sdram_max_time0 = (soclinux_sdram_time0 == 1'd0); |
| assign soclinux_sdram_max_time1 = (soclinux_sdram_time1 == 1'd0); |
| assign soclinux_sdram_bankmachine0_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine1_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine2_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine3_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine4_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine5_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine6_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine7_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine8_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine9_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine10_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine11_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine12_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine13_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine14_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_bankmachine15_refresh_req = soclinux_sdram_cmd_valid; |
| assign soclinux_sdram_go_to_refresh = (((((((((((((((soclinux_sdram_bankmachine0_refresh_gnt & soclinux_sdram_bankmachine1_refresh_gnt) & soclinux_sdram_bankmachine2_refresh_gnt) & soclinux_sdram_bankmachine3_refresh_gnt) & soclinux_sdram_bankmachine4_refresh_gnt) & soclinux_sdram_bankmachine5_refresh_gnt) & soclinux_sdram_bankmachine6_refresh_gnt) & soclinux_sdram_bankmachine7_refresh_gnt) & soclinux_sdram_bankmachine8_refresh_gnt) & soclinux_sdram_bankmachine9_refresh_gnt) & soclinux_sdram_bankmachine10_refresh_gnt) & soclinux_sdram_bankmachine11_refresh_gnt) & soclinux_sdram_bankmachine12_refresh_gnt) & soclinux_sdram_bankmachine13_refresh_gnt) & soclinux_sdram_bankmachine14_refresh_gnt) & soclinux_sdram_bankmachine15_refresh_gnt); |
| assign soclinux_sdram_interface_rdata = {soclinux_sdram_dfi_p3_rddata, soclinux_sdram_dfi_p2_rddata, soclinux_sdram_dfi_p1_rddata, soclinux_sdram_dfi_p0_rddata}; |
| assign {soclinux_sdram_dfi_p3_wrdata, soclinux_sdram_dfi_p2_wrdata, soclinux_sdram_dfi_p1_wrdata, soclinux_sdram_dfi_p0_wrdata} = soclinux_sdram_interface_wdata; |
| assign {soclinux_sdram_dfi_p3_wrdata_mask, soclinux_sdram_dfi_p2_wrdata_mask, soclinux_sdram_dfi_p1_wrdata_mask, soclinux_sdram_dfi_p0_wrdata_mask} = (~soclinux_sdram_interface_wdata_we); |
| always @(*) begin |
| soclinux_sdram_choose_cmd_valids <= 16'd0; |
| soclinux_sdram_choose_cmd_valids[0] <= (soclinux_sdram_bankmachine0_cmd_valid & (((soclinux_sdram_bankmachine0_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine0_cmd_payload_ras & (~soclinux_sdram_bankmachine0_cmd_payload_cas)) & (~soclinux_sdram_bankmachine0_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine0_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine0_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[1] <= (soclinux_sdram_bankmachine1_cmd_valid & (((soclinux_sdram_bankmachine1_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine1_cmd_payload_ras & (~soclinux_sdram_bankmachine1_cmd_payload_cas)) & (~soclinux_sdram_bankmachine1_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine1_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine1_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[2] <= (soclinux_sdram_bankmachine2_cmd_valid & (((soclinux_sdram_bankmachine2_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine2_cmd_payload_ras & (~soclinux_sdram_bankmachine2_cmd_payload_cas)) & (~soclinux_sdram_bankmachine2_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine2_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine2_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[3] <= (soclinux_sdram_bankmachine3_cmd_valid & (((soclinux_sdram_bankmachine3_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine3_cmd_payload_ras & (~soclinux_sdram_bankmachine3_cmd_payload_cas)) & (~soclinux_sdram_bankmachine3_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine3_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine3_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[4] <= (soclinux_sdram_bankmachine4_cmd_valid & (((soclinux_sdram_bankmachine4_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine4_cmd_payload_ras & (~soclinux_sdram_bankmachine4_cmd_payload_cas)) & (~soclinux_sdram_bankmachine4_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine4_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine4_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[5] <= (soclinux_sdram_bankmachine5_cmd_valid & (((soclinux_sdram_bankmachine5_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine5_cmd_payload_ras & (~soclinux_sdram_bankmachine5_cmd_payload_cas)) & (~soclinux_sdram_bankmachine5_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine5_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine5_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[6] <= (soclinux_sdram_bankmachine6_cmd_valid & (((soclinux_sdram_bankmachine6_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine6_cmd_payload_ras & (~soclinux_sdram_bankmachine6_cmd_payload_cas)) & (~soclinux_sdram_bankmachine6_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine6_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine6_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[7] <= (soclinux_sdram_bankmachine7_cmd_valid & (((soclinux_sdram_bankmachine7_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine7_cmd_payload_ras & (~soclinux_sdram_bankmachine7_cmd_payload_cas)) & (~soclinux_sdram_bankmachine7_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine7_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine7_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[8] <= (soclinux_sdram_bankmachine8_cmd_valid & (((soclinux_sdram_bankmachine8_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine8_cmd_payload_ras & (~soclinux_sdram_bankmachine8_cmd_payload_cas)) & (~soclinux_sdram_bankmachine8_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine8_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine8_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[9] <= (soclinux_sdram_bankmachine9_cmd_valid & (((soclinux_sdram_bankmachine9_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine9_cmd_payload_ras & (~soclinux_sdram_bankmachine9_cmd_payload_cas)) & (~soclinux_sdram_bankmachine9_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine9_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine9_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[10] <= (soclinux_sdram_bankmachine10_cmd_valid & (((soclinux_sdram_bankmachine10_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine10_cmd_payload_ras & (~soclinux_sdram_bankmachine10_cmd_payload_cas)) & (~soclinux_sdram_bankmachine10_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine10_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine10_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[11] <= (soclinux_sdram_bankmachine11_cmd_valid & (((soclinux_sdram_bankmachine11_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine11_cmd_payload_ras & (~soclinux_sdram_bankmachine11_cmd_payload_cas)) & (~soclinux_sdram_bankmachine11_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine11_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine11_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[12] <= (soclinux_sdram_bankmachine12_cmd_valid & (((soclinux_sdram_bankmachine12_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine12_cmd_payload_ras & (~soclinux_sdram_bankmachine12_cmd_payload_cas)) & (~soclinux_sdram_bankmachine12_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine12_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine12_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[13] <= (soclinux_sdram_bankmachine13_cmd_valid & (((soclinux_sdram_bankmachine13_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine13_cmd_payload_ras & (~soclinux_sdram_bankmachine13_cmd_payload_cas)) & (~soclinux_sdram_bankmachine13_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine13_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine13_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[14] <= (soclinux_sdram_bankmachine14_cmd_valid & (((soclinux_sdram_bankmachine14_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine14_cmd_payload_ras & (~soclinux_sdram_bankmachine14_cmd_payload_cas)) & (~soclinux_sdram_bankmachine14_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine14_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine14_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| soclinux_sdram_choose_cmd_valids[15] <= (soclinux_sdram_bankmachine15_cmd_valid & (((soclinux_sdram_bankmachine15_cmd_payload_is_cmd & soclinux_sdram_choose_cmd_want_cmds) & ((~((soclinux_sdram_bankmachine15_cmd_payload_ras & (~soclinux_sdram_bankmachine15_cmd_payload_cas)) & (~soclinux_sdram_bankmachine15_cmd_payload_we))) | soclinux_sdram_choose_cmd_want_activates)) | ((soclinux_sdram_bankmachine15_cmd_payload_is_read == soclinux_sdram_choose_cmd_want_reads) & (soclinux_sdram_bankmachine15_cmd_payload_is_write == soclinux_sdram_choose_cmd_want_writes)))); |
| end |
| assign soclinux_sdram_choose_cmd_request = soclinux_sdram_choose_cmd_valids; |
| assign soclinux_sdram_choose_cmd_cmd_valid = rhs_array_muxed0; |
| assign soclinux_sdram_choose_cmd_cmd_payload_a = rhs_array_muxed1; |
| assign soclinux_sdram_choose_cmd_cmd_payload_ba = rhs_array_muxed2; |
| assign soclinux_sdram_choose_cmd_cmd_payload_is_read = rhs_array_muxed3; |
| assign soclinux_sdram_choose_cmd_cmd_payload_is_write = rhs_array_muxed4; |
| assign soclinux_sdram_choose_cmd_cmd_payload_is_cmd = rhs_array_muxed5; |
| always @(*) begin |
| soclinux_sdram_choose_cmd_cmd_payload_cas <= 1'd0; |
| if (soclinux_sdram_choose_cmd_cmd_valid) begin |
| soclinux_sdram_choose_cmd_cmd_payload_cas <= t_array_muxed0; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_choose_cmd_cmd_payload_ras <= 1'd0; |
| if (soclinux_sdram_choose_cmd_cmd_valid) begin |
| soclinux_sdram_choose_cmd_cmd_payload_ras <= t_array_muxed1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_choose_cmd_cmd_payload_we <= 1'd0; |
| if (soclinux_sdram_choose_cmd_cmd_valid) begin |
| soclinux_sdram_choose_cmd_cmd_payload_we <= t_array_muxed2; |
| end |
| end |
| assign soclinux_sdram_choose_cmd_ce = (soclinux_sdram_choose_cmd_cmd_ready | (~soclinux_sdram_choose_cmd_cmd_valid)); |
| always @(*) begin |
| soclinux_sdram_choose_req_valids <= 16'd0; |
| soclinux_sdram_choose_req_valids[0] <= (soclinux_sdram_bankmachine0_cmd_valid & (((soclinux_sdram_bankmachine0_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine0_cmd_payload_ras & (~soclinux_sdram_bankmachine0_cmd_payload_cas)) & (~soclinux_sdram_bankmachine0_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine0_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine0_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[1] <= (soclinux_sdram_bankmachine1_cmd_valid & (((soclinux_sdram_bankmachine1_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine1_cmd_payload_ras & (~soclinux_sdram_bankmachine1_cmd_payload_cas)) & (~soclinux_sdram_bankmachine1_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine1_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine1_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[2] <= (soclinux_sdram_bankmachine2_cmd_valid & (((soclinux_sdram_bankmachine2_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine2_cmd_payload_ras & (~soclinux_sdram_bankmachine2_cmd_payload_cas)) & (~soclinux_sdram_bankmachine2_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine2_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine2_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[3] <= (soclinux_sdram_bankmachine3_cmd_valid & (((soclinux_sdram_bankmachine3_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine3_cmd_payload_ras & (~soclinux_sdram_bankmachine3_cmd_payload_cas)) & (~soclinux_sdram_bankmachine3_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine3_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine3_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[4] <= (soclinux_sdram_bankmachine4_cmd_valid & (((soclinux_sdram_bankmachine4_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine4_cmd_payload_ras & (~soclinux_sdram_bankmachine4_cmd_payload_cas)) & (~soclinux_sdram_bankmachine4_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine4_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine4_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[5] <= (soclinux_sdram_bankmachine5_cmd_valid & (((soclinux_sdram_bankmachine5_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine5_cmd_payload_ras & (~soclinux_sdram_bankmachine5_cmd_payload_cas)) & (~soclinux_sdram_bankmachine5_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine5_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine5_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[6] <= (soclinux_sdram_bankmachine6_cmd_valid & (((soclinux_sdram_bankmachine6_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine6_cmd_payload_ras & (~soclinux_sdram_bankmachine6_cmd_payload_cas)) & (~soclinux_sdram_bankmachine6_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine6_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine6_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[7] <= (soclinux_sdram_bankmachine7_cmd_valid & (((soclinux_sdram_bankmachine7_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine7_cmd_payload_ras & (~soclinux_sdram_bankmachine7_cmd_payload_cas)) & (~soclinux_sdram_bankmachine7_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine7_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine7_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[8] <= (soclinux_sdram_bankmachine8_cmd_valid & (((soclinux_sdram_bankmachine8_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine8_cmd_payload_ras & (~soclinux_sdram_bankmachine8_cmd_payload_cas)) & (~soclinux_sdram_bankmachine8_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine8_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine8_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[9] <= (soclinux_sdram_bankmachine9_cmd_valid & (((soclinux_sdram_bankmachine9_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine9_cmd_payload_ras & (~soclinux_sdram_bankmachine9_cmd_payload_cas)) & (~soclinux_sdram_bankmachine9_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine9_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine9_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[10] <= (soclinux_sdram_bankmachine10_cmd_valid & (((soclinux_sdram_bankmachine10_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine10_cmd_payload_ras & (~soclinux_sdram_bankmachine10_cmd_payload_cas)) & (~soclinux_sdram_bankmachine10_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine10_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine10_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[11] <= (soclinux_sdram_bankmachine11_cmd_valid & (((soclinux_sdram_bankmachine11_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine11_cmd_payload_ras & (~soclinux_sdram_bankmachine11_cmd_payload_cas)) & (~soclinux_sdram_bankmachine11_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine11_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine11_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[12] <= (soclinux_sdram_bankmachine12_cmd_valid & (((soclinux_sdram_bankmachine12_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine12_cmd_payload_ras & (~soclinux_sdram_bankmachine12_cmd_payload_cas)) & (~soclinux_sdram_bankmachine12_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine12_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine12_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[13] <= (soclinux_sdram_bankmachine13_cmd_valid & (((soclinux_sdram_bankmachine13_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine13_cmd_payload_ras & (~soclinux_sdram_bankmachine13_cmd_payload_cas)) & (~soclinux_sdram_bankmachine13_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine13_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine13_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[14] <= (soclinux_sdram_bankmachine14_cmd_valid & (((soclinux_sdram_bankmachine14_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine14_cmd_payload_ras & (~soclinux_sdram_bankmachine14_cmd_payload_cas)) & (~soclinux_sdram_bankmachine14_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine14_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine14_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| soclinux_sdram_choose_req_valids[15] <= (soclinux_sdram_bankmachine15_cmd_valid & (((soclinux_sdram_bankmachine15_cmd_payload_is_cmd & soclinux_sdram_choose_req_want_cmds) & ((~((soclinux_sdram_bankmachine15_cmd_payload_ras & (~soclinux_sdram_bankmachine15_cmd_payload_cas)) & (~soclinux_sdram_bankmachine15_cmd_payload_we))) | soclinux_sdram_choose_req_want_activates)) | ((soclinux_sdram_bankmachine15_cmd_payload_is_read == soclinux_sdram_choose_req_want_reads) & (soclinux_sdram_bankmachine15_cmd_payload_is_write == soclinux_sdram_choose_req_want_writes)))); |
| end |
| assign soclinux_sdram_choose_req_request = soclinux_sdram_choose_req_valids; |
| assign soclinux_sdram_choose_req_cmd_valid = rhs_array_muxed6; |
| assign soclinux_sdram_choose_req_cmd_payload_a = rhs_array_muxed7; |
| assign soclinux_sdram_choose_req_cmd_payload_ba = rhs_array_muxed8; |
| assign soclinux_sdram_choose_req_cmd_payload_is_read = rhs_array_muxed9; |
| assign soclinux_sdram_choose_req_cmd_payload_is_write = rhs_array_muxed10; |
| assign soclinux_sdram_choose_req_cmd_payload_is_cmd = rhs_array_muxed11; |
| always @(*) begin |
| soclinux_sdram_choose_req_cmd_payload_cas <= 1'd0; |
| if (soclinux_sdram_choose_req_cmd_valid) begin |
| soclinux_sdram_choose_req_cmd_payload_cas <= t_array_muxed3; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_choose_req_cmd_payload_ras <= 1'd0; |
| if (soclinux_sdram_choose_req_cmd_valid) begin |
| soclinux_sdram_choose_req_cmd_payload_ras <= t_array_muxed4; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_choose_req_cmd_payload_we <= 1'd0; |
| if (soclinux_sdram_choose_req_cmd_valid) begin |
| soclinux_sdram_choose_req_cmd_payload_we <= t_array_muxed5; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine0_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 1'd0))) begin |
| soclinux_sdram_bankmachine0_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 1'd0))) begin |
| soclinux_sdram_bankmachine0_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine1_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 1'd1))) begin |
| soclinux_sdram_bankmachine1_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 1'd1))) begin |
| soclinux_sdram_bankmachine1_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine2_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 2'd2))) begin |
| soclinux_sdram_bankmachine2_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 2'd2))) begin |
| soclinux_sdram_bankmachine2_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine3_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 2'd3))) begin |
| soclinux_sdram_bankmachine3_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 2'd3))) begin |
| soclinux_sdram_bankmachine3_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine4_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 3'd4))) begin |
| soclinux_sdram_bankmachine4_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 3'd4))) begin |
| soclinux_sdram_bankmachine4_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine5_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 3'd5))) begin |
| soclinux_sdram_bankmachine5_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 3'd5))) begin |
| soclinux_sdram_bankmachine5_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine6_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 3'd6))) begin |
| soclinux_sdram_bankmachine6_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 3'd6))) begin |
| soclinux_sdram_bankmachine6_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine7_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 3'd7))) begin |
| soclinux_sdram_bankmachine7_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 3'd7))) begin |
| soclinux_sdram_bankmachine7_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine8_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 4'd8))) begin |
| soclinux_sdram_bankmachine8_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 4'd8))) begin |
| soclinux_sdram_bankmachine8_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine9_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 4'd9))) begin |
| soclinux_sdram_bankmachine9_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 4'd9))) begin |
| soclinux_sdram_bankmachine9_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine10_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 4'd10))) begin |
| soclinux_sdram_bankmachine10_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 4'd10))) begin |
| soclinux_sdram_bankmachine10_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine11_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 4'd11))) begin |
| soclinux_sdram_bankmachine11_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 4'd11))) begin |
| soclinux_sdram_bankmachine11_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine12_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 4'd12))) begin |
| soclinux_sdram_bankmachine12_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 4'd12))) begin |
| soclinux_sdram_bankmachine12_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine13_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 4'd13))) begin |
| soclinux_sdram_bankmachine13_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 4'd13))) begin |
| soclinux_sdram_bankmachine13_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine14_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 4'd14))) begin |
| soclinux_sdram_bankmachine14_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 4'd14))) begin |
| soclinux_sdram_bankmachine14_cmd_ready <= 1'd1; |
| end |
| end |
| always @(*) begin |
| soclinux_sdram_bankmachine15_cmd_ready <= 1'd0; |
| if (((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & (soclinux_sdram_choose_cmd_grant == 4'd15))) begin |
| soclinux_sdram_bankmachine15_cmd_ready <= 1'd1; |
| end |
| if (((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & (soclinux_sdram_choose_req_grant == 4'd15))) begin |
| soclinux_sdram_bankmachine15_cmd_ready <= 1'd1; |
| end |
| end |
| assign soclinux_sdram_choose_req_ce = (soclinux_sdram_choose_req_cmd_ready | (~soclinux_sdram_choose_req_cmd_valid)); |
| assign soclinux_sdram_dfi_p0_reset_n = 1'd1; |
| assign soclinux_sdram_dfi_p0_cke = {1{soclinux_sdram_steerer0}}; |
| assign soclinux_sdram_dfi_p0_odt = {1{soclinux_sdram_steerer1}}; |
| assign soclinux_sdram_dfi_p1_reset_n = 1'd1; |
| assign soclinux_sdram_dfi_p1_cke = {1{soclinux_sdram_steerer2}}; |
| assign soclinux_sdram_dfi_p1_odt = {1{soclinux_sdram_steerer3}}; |
| assign soclinux_sdram_dfi_p2_reset_n = 1'd1; |
| assign soclinux_sdram_dfi_p2_cke = {1{soclinux_sdram_steerer4}}; |
| assign soclinux_sdram_dfi_p2_odt = {1{soclinux_sdram_steerer5}}; |
| assign soclinux_sdram_dfi_p3_reset_n = 1'd1; |
| assign soclinux_sdram_dfi_p3_cke = {1{soclinux_sdram_steerer6}}; |
| assign soclinux_sdram_dfi_p3_odt = {1{soclinux_sdram_steerer7}}; |
| assign soclinux_sdram_tfawcon_count = ((((soclinux_sdram_tfawcon_window[0] + soclinux_sdram_tfawcon_window[1]) + soclinux_sdram_tfawcon_window[2]) + soclinux_sdram_tfawcon_window[3]) + soclinux_sdram_tfawcon_window[4]); |
| always @(*) begin |
| soclinux_sdram_choose_req_want_reads <= 1'd0; |
| soclinux_sdram_en1 <= 1'd0; |
| soclinux_sdram_choose_cmd_want_activates <= 1'd0; |
| soclinux_sdram_choose_req_want_writes <= 1'd0; |
| soclinux_sdram_cmd_ready <= 1'd0; |
| soclinux_sdram_choose_cmd_cmd_ready <= 1'd0; |
| soclinux_sdram_choose_req_cmd_ready <= 1'd0; |
| soclinux_sdram_steerer_sel0 <= 2'd0; |
| multiplexer_next_state <= 4'd0; |
| soclinux_sdram_steerer_sel1 <= 2'd0; |
| soclinux_sdram_steerer_sel2 <= 2'd0; |
| soclinux_sdram_steerer_sel3 <= 2'd0; |
| soclinux_sdram_en0 <= 1'd0; |
| multiplexer_next_state <= multiplexer_state; |
| case (multiplexer_state) |
| 1'd1: begin |
| soclinux_sdram_en1 <= 1'd1; |
| soclinux_sdram_choose_req_want_writes <= 1'd1; |
| if (1'd0) begin |
| soclinux_sdram_choose_req_cmd_ready <= (soclinux_sdram_cas_allowed & ((~((soclinux_sdram_choose_req_cmd_payload_ras & (~soclinux_sdram_choose_req_cmd_payload_cas)) & (~soclinux_sdram_choose_req_cmd_payload_we))) | soclinux_sdram_ras_allowed)); |
| end else begin |
| soclinux_sdram_choose_cmd_want_activates <= soclinux_sdram_ras_allowed; |
| soclinux_sdram_choose_cmd_cmd_ready <= ((~((soclinux_sdram_choose_cmd_cmd_payload_ras & (~soclinux_sdram_choose_cmd_cmd_payload_cas)) & (~soclinux_sdram_choose_cmd_cmd_payload_we))) | soclinux_sdram_ras_allowed); |
| soclinux_sdram_choose_req_cmd_ready <= soclinux_sdram_cas_allowed; |
| end |
| soclinux_sdram_steerer_sel0 <= 1'd0; |
| soclinux_sdram_steerer_sel1 <= 1'd1; |
| soclinux_sdram_steerer_sel2 <= 2'd2; |
| soclinux_sdram_steerer_sel3 <= 1'd0; |
| if (soclinux_sdram_read_available) begin |
| if (((~soclinux_sdram_write_available) | soclinux_sdram_max_time1)) begin |
| multiplexer_next_state <= 2'd3; |
| end |
| end |
| if (soclinux_sdram_go_to_refresh) begin |
| multiplexer_next_state <= 2'd2; |
| end |
| end |
| 2'd2: begin |
| soclinux_sdram_steerer_sel0 <= 2'd3; |
| soclinux_sdram_cmd_ready <= 1'd1; |
| if (soclinux_sdram_cmd_last) begin |
| multiplexer_next_state <= 1'd0; |
| end |
| end |
| 2'd3: begin |
| if (soclinux_sdram_twtrcon_ready) begin |
| multiplexer_next_state <= 1'd0; |
| end |
| end |
| 3'd4: begin |
| multiplexer_next_state <= 3'd5; |
| end |
| 3'd5: begin |
| multiplexer_next_state <= 3'd6; |
| end |
| 3'd6: begin |
| multiplexer_next_state <= 3'd7; |
| end |
| 3'd7: begin |
| multiplexer_next_state <= 4'd8; |
| end |
| 4'd8: begin |
| multiplexer_next_state <= 4'd9; |
| end |
| 4'd9: begin |
| multiplexer_next_state <= 4'd10; |
| end |
| 4'd10: begin |
| multiplexer_next_state <= 1'd1; |
| end |
| default: begin |
| soclinux_sdram_en0 <= 1'd1; |
| soclinux_sdram_choose_req_want_reads <= 1'd1; |
| if (1'd0) begin |
| soclinux_sdram_choose_req_cmd_ready <= (soclinux_sdram_cas_allowed & ((~((soclinux_sdram_choose_req_cmd_payload_ras & (~soclinux_sdram_choose_req_cmd_payload_cas)) & (~soclinux_sdram_choose_req_cmd_payload_we))) | soclinux_sdram_ras_allowed)); |
| end else begin |
| soclinux_sdram_choose_cmd_want_activates <= soclinux_sdram_ras_allowed; |
| soclinux_sdram_choose_cmd_cmd_ready <= ((~((soclinux_sdram_choose_cmd_cmd_payload_ras & (~soclinux_sdram_choose_cmd_cmd_payload_cas)) & (~soclinux_sdram_choose_cmd_cmd_payload_we))) | soclinux_sdram_ras_allowed); |
| soclinux_sdram_choose_req_cmd_ready <= soclinux_sdram_cas_allowed; |
| end |
| soclinux_sdram_steerer_sel0 <= 1'd1; |
| soclinux_sdram_steerer_sel1 <= 2'd2; |
| soclinux_sdram_steerer_sel2 <= 1'd0; |
| soclinux_sdram_steerer_sel3 <= 1'd0; |
| if (soclinux_sdram_write_available) begin |
| if (((~soclinux_sdram_read_available) | soclinux_sdram_max_time0)) begin |
| multiplexer_next_state <= 3'd4; |
| end |
| end |
| if (soclinux_sdram_go_to_refresh) begin |
| multiplexer_next_state <= 2'd2; |
| end |
| end |
| endcase |
| end |
| assign roundrobin0_request = {(((soclinux_port_cmd_payload_addr[10:7] == 1'd0) & (~(((((((((((((((locked0 | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin0_ce = ((~soclinux_sdram_interface_bank0_valid) & (~soclinux_sdram_interface_bank0_lock)); |
| assign soclinux_sdram_interface_bank0_addr = rhs_array_muxed12; |
| assign soclinux_sdram_interface_bank0_we = rhs_array_muxed13; |
| assign soclinux_sdram_interface_bank0_valid = rhs_array_muxed14; |
| assign roundrobin1_request = {(((soclinux_port_cmd_payload_addr[10:7] == 1'd1) & (~(((((((((((((((locked1 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin1_ce = ((~soclinux_sdram_interface_bank1_valid) & (~soclinux_sdram_interface_bank1_lock)); |
| assign soclinux_sdram_interface_bank1_addr = rhs_array_muxed15; |
| assign soclinux_sdram_interface_bank1_we = rhs_array_muxed16; |
| assign soclinux_sdram_interface_bank1_valid = rhs_array_muxed17; |
| assign roundrobin2_request = {(((soclinux_port_cmd_payload_addr[10:7] == 2'd2) & (~(((((((((((((((locked2 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin2_ce = ((~soclinux_sdram_interface_bank2_valid) & (~soclinux_sdram_interface_bank2_lock)); |
| assign soclinux_sdram_interface_bank2_addr = rhs_array_muxed18; |
| assign soclinux_sdram_interface_bank2_we = rhs_array_muxed19; |
| assign soclinux_sdram_interface_bank2_valid = rhs_array_muxed20; |
| assign roundrobin3_request = {(((soclinux_port_cmd_payload_addr[10:7] == 2'd3) & (~(((((((((((((((locked3 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin3_ce = ((~soclinux_sdram_interface_bank3_valid) & (~soclinux_sdram_interface_bank3_lock)); |
| assign soclinux_sdram_interface_bank3_addr = rhs_array_muxed21; |
| assign soclinux_sdram_interface_bank3_we = rhs_array_muxed22; |
| assign soclinux_sdram_interface_bank3_valid = rhs_array_muxed23; |
| assign roundrobin4_request = {(((soclinux_port_cmd_payload_addr[10:7] == 3'd4) & (~(((((((((((((((locked4 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin4_ce = ((~soclinux_sdram_interface_bank4_valid) & (~soclinux_sdram_interface_bank4_lock)); |
| assign soclinux_sdram_interface_bank4_addr = rhs_array_muxed24; |
| assign soclinux_sdram_interface_bank4_we = rhs_array_muxed25; |
| assign soclinux_sdram_interface_bank4_valid = rhs_array_muxed26; |
| assign roundrobin5_request = {(((soclinux_port_cmd_payload_addr[10:7] == 3'd5) & (~(((((((((((((((locked5 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin5_ce = ((~soclinux_sdram_interface_bank5_valid) & (~soclinux_sdram_interface_bank5_lock)); |
| assign soclinux_sdram_interface_bank5_addr = rhs_array_muxed27; |
| assign soclinux_sdram_interface_bank5_we = rhs_array_muxed28; |
| assign soclinux_sdram_interface_bank5_valid = rhs_array_muxed29; |
| assign roundrobin6_request = {(((soclinux_port_cmd_payload_addr[10:7] == 3'd6) & (~(((((((((((((((locked6 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin6_ce = ((~soclinux_sdram_interface_bank6_valid) & (~soclinux_sdram_interface_bank6_lock)); |
| assign soclinux_sdram_interface_bank6_addr = rhs_array_muxed30; |
| assign soclinux_sdram_interface_bank6_we = rhs_array_muxed31; |
| assign soclinux_sdram_interface_bank6_valid = rhs_array_muxed32; |
| assign roundrobin7_request = {(((soclinux_port_cmd_payload_addr[10:7] == 3'd7) & (~(((((((((((((((locked7 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin7_ce = ((~soclinux_sdram_interface_bank7_valid) & (~soclinux_sdram_interface_bank7_lock)); |
| assign soclinux_sdram_interface_bank7_addr = rhs_array_muxed33; |
| assign soclinux_sdram_interface_bank7_we = rhs_array_muxed34; |
| assign soclinux_sdram_interface_bank7_valid = rhs_array_muxed35; |
| assign roundrobin8_request = {(((soclinux_port_cmd_payload_addr[10:7] == 4'd8) & (~(((((((((((((((locked8 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin8_ce = ((~soclinux_sdram_interface_bank8_valid) & (~soclinux_sdram_interface_bank8_lock)); |
| assign soclinux_sdram_interface_bank8_addr = rhs_array_muxed36; |
| assign soclinux_sdram_interface_bank8_we = rhs_array_muxed37; |
| assign soclinux_sdram_interface_bank8_valid = rhs_array_muxed38; |
| assign roundrobin9_request = {(((soclinux_port_cmd_payload_addr[10:7] == 4'd9) & (~(((((((((((((((locked9 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin9_ce = ((~soclinux_sdram_interface_bank9_valid) & (~soclinux_sdram_interface_bank9_lock)); |
| assign soclinux_sdram_interface_bank9_addr = rhs_array_muxed39; |
| assign soclinux_sdram_interface_bank9_we = rhs_array_muxed40; |
| assign soclinux_sdram_interface_bank9_valid = rhs_array_muxed41; |
| assign roundrobin10_request = {(((soclinux_port_cmd_payload_addr[10:7] == 4'd10) & (~(((((((((((((((locked10 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin10_ce = ((~soclinux_sdram_interface_bank10_valid) & (~soclinux_sdram_interface_bank10_lock)); |
| assign soclinux_sdram_interface_bank10_addr = rhs_array_muxed42; |
| assign soclinux_sdram_interface_bank10_we = rhs_array_muxed43; |
| assign soclinux_sdram_interface_bank10_valid = rhs_array_muxed44; |
| assign roundrobin11_request = {(((soclinux_port_cmd_payload_addr[10:7] == 4'd11) & (~(((((((((((((((locked11 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin11_ce = ((~soclinux_sdram_interface_bank11_valid) & (~soclinux_sdram_interface_bank11_lock)); |
| assign soclinux_sdram_interface_bank11_addr = rhs_array_muxed45; |
| assign soclinux_sdram_interface_bank11_we = rhs_array_muxed46; |
| assign soclinux_sdram_interface_bank11_valid = rhs_array_muxed47; |
| assign roundrobin12_request = {(((soclinux_port_cmd_payload_addr[10:7] == 4'd12) & (~(((((((((((((((locked12 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin12_ce = ((~soclinux_sdram_interface_bank12_valid) & (~soclinux_sdram_interface_bank12_lock)); |
| assign soclinux_sdram_interface_bank12_addr = rhs_array_muxed48; |
| assign soclinux_sdram_interface_bank12_we = rhs_array_muxed49; |
| assign soclinux_sdram_interface_bank12_valid = rhs_array_muxed50; |
| assign roundrobin13_request = {(((soclinux_port_cmd_payload_addr[10:7] == 4'd13) & (~(((((((((((((((locked13 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin13_ce = ((~soclinux_sdram_interface_bank13_valid) & (~soclinux_sdram_interface_bank13_lock)); |
| assign soclinux_sdram_interface_bank13_addr = rhs_array_muxed51; |
| assign soclinux_sdram_interface_bank13_we = rhs_array_muxed52; |
| assign soclinux_sdram_interface_bank13_valid = rhs_array_muxed53; |
| assign roundrobin14_request = {(((soclinux_port_cmd_payload_addr[10:7] == 4'd14) & (~(((((((((((((((locked14 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin14_ce = ((~soclinux_sdram_interface_bank14_valid) & (~soclinux_sdram_interface_bank14_lock)); |
| assign soclinux_sdram_interface_bank14_addr = rhs_array_muxed54; |
| assign soclinux_sdram_interface_bank14_we = rhs_array_muxed55; |
| assign soclinux_sdram_interface_bank14_valid = rhs_array_muxed56; |
| assign roundrobin15_request = {(((soclinux_port_cmd_payload_addr[10:7] == 4'd15) & (~(((((((((((((((locked15 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))))) & soclinux_port_cmd_valid)}; |
| assign roundrobin15_ce = ((~soclinux_sdram_interface_bank15_valid) & (~soclinux_sdram_interface_bank15_lock)); |
| assign soclinux_sdram_interface_bank15_addr = rhs_array_muxed57; |
| assign soclinux_sdram_interface_bank15_we = rhs_array_muxed58; |
| assign soclinux_sdram_interface_bank15_valid = rhs_array_muxed59; |
| assign soclinux_port_cmd_ready = ((((((((((((((((1'd0 | (((roundrobin0_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 1'd0) & (~(((((((((((((((locked0 | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank0_ready)) | (((roundrobin1_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 1'd1) & (~(((((((((((((((locked1 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank1_ready)) | (((roundrobin2_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 2'd2) & (~(((((((((((((((locked2 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank2_ready)) | (((roundrobin3_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 2'd3) & (~(((((((((((((((locked3 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank3_ready)) | (((roundrobin4_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 3'd4) & (~(((((((((((((((locked4 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank4_ready)) | (((roundrobin5_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 3'd5) & (~(((((((((((((((locked5 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank5_ready)) | (((roundrobin6_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 3'd6) & (~(((((((((((((((locked6 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank6_ready)) | (((roundrobin7_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 3'd7) & (~(((((((((((((((locked7 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank7_ready)) | (((roundrobin8_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 4'd8) & (~(((((((((((((((locked8 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank8_ready)) | (((roundrobin9_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 4'd9) & (~(((((((((((((((locked9 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank9_ready)) | (((roundrobin10_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 4'd10) & (~(((((((((((((((locked10 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank10_ready)) | (((roundrobin11_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 4'd11) & (~(((((((((((((((locked11 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank11_ready)) | (((roundrobin12_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 4'd12) & (~(((((((((((((((locked12 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank12_ready)) | (((roundrobin13_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 4'd13) & (~(((((((((((((((locked13 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank13_ready)) | (((roundrobin14_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 4'd14) & (~(((((((((((((((locked14 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0)))))) & soclinux_sdram_interface_bank14_ready)) | (((roundrobin15_grant == 1'd0) & ((soclinux_port_cmd_payload_addr[10:7] == 4'd15) & (~(((((((((((((((locked15 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0)))))) & soclinux_sdram_interface_bank15_ready)); |
| assign soclinux_port_wdata_ready = new_master_wdata_ready3; |
| assign soclinux_port_rdata_valid = new_master_rdata_valid8; |
| always @(*) begin |
| soclinux_sdram_interface_wdata <= 256'd0; |
| soclinux_sdram_interface_wdata_we <= 32'd0; |
| case ({new_master_wdata_ready3}) |
| 1'd1: begin |
| soclinux_sdram_interface_wdata <= soclinux_port_wdata_payload_data; |
| soclinux_sdram_interface_wdata_we <= soclinux_port_wdata_payload_we; |
| end |
| default: begin |
| soclinux_sdram_interface_wdata <= 1'd0; |
| soclinux_sdram_interface_wdata_we <= 1'd0; |
| end |
| endcase |
| end |
| assign soclinux_port_rdata_payload_data = soclinux_sdram_interface_rdata; |
| assign roundrobin0_grant = 1'd0; |
| assign roundrobin1_grant = 1'd0; |
| assign roundrobin2_grant = 1'd0; |
| assign roundrobin3_grant = 1'd0; |
| assign roundrobin4_grant = 1'd0; |
| assign roundrobin5_grant = 1'd0; |
| assign roundrobin6_grant = 1'd0; |
| assign roundrobin7_grant = 1'd0; |
| assign roundrobin8_grant = 1'd0; |
| assign roundrobin9_grant = 1'd0; |
| assign roundrobin10_grant = 1'd0; |
| assign roundrobin11_grant = 1'd0; |
| assign roundrobin12_grant = 1'd0; |
| assign roundrobin13_grant = 1'd0; |
| assign roundrobin14_grant = 1'd0; |
| assign roundrobin15_grant = 1'd0; |
| assign soclinux_data_port_adr = soclinux_wb_sdram_adr[10:3]; |
| always @(*) begin |
| soclinux_data_port_we <= 32'd0; |
| soclinux_data_port_dat_w <= 256'd0; |
| if (soclinux_write_from_slave) begin |
| soclinux_data_port_dat_w <= soclinux_dat_r; |
| soclinux_data_port_we <= {32{1'd1}}; |
| end else begin |
| soclinux_data_port_dat_w <= {8{soclinux_wb_sdram_dat_w}}; |
| if ((((soclinux_wb_sdram_cyc & soclinux_wb_sdram_stb) & soclinux_wb_sdram_we) & soclinux_wb_sdram_ack)) begin |
| soclinux_data_port_we <= {({4{(soclinux_wb_sdram_adr[2:0] == 1'd0)}} & soclinux_wb_sdram_sel), ({4{(soclinux_wb_sdram_adr[2:0] == 1'd1)}} & soclinux_wb_sdram_sel), ({4{(soclinux_wb_sdram_adr[2:0] == 2'd2)}} & soclinux_wb_sdram_sel), ({4{(soclinux_wb_sdram_adr[2:0] == 2'd3)}} & soclinux_wb_sdram_sel), ({4{(soclinux_wb_sdram_adr[2:0] == 3'd4)}} & soclinux_wb_sdram_sel), ({4{(soclinux_wb_sdram_adr[2:0] == 3'd5)}} & soclinux_wb_sdram_sel), ({4{(soclinux_wb_sdram_adr[2:0] == 3'd6)}} & soclinux_wb_sdram_sel), ({4{(soclinux_wb_sdram_adr[2:0] == 3'd7)}} & soclinux_wb_sdram_sel)}; |
| end |
| end |
| end |
| assign soclinux_dat_w = soclinux_data_port_dat_r; |
| assign soclinux_sel = 32'd4294967295; |
| always @(*) begin |
| soclinux_wb_sdram_dat_r <= 32'd0; |
| case (soclinux_adr_offset_r) |
| 1'd0: begin |
| soclinux_wb_sdram_dat_r <= soclinux_data_port_dat_r[255:224]; |
| end |
| 1'd1: begin |
| soclinux_wb_sdram_dat_r <= soclinux_data_port_dat_r[223:192]; |
| end |
| 2'd2: begin |
| soclinux_wb_sdram_dat_r <= soclinux_data_port_dat_r[191:160]; |
| end |
| 2'd3: begin |
| soclinux_wb_sdram_dat_r <= soclinux_data_port_dat_r[159:128]; |
| end |
| 3'd4: begin |
| soclinux_wb_sdram_dat_r <= soclinux_data_port_dat_r[127:96]; |
| end |
| 3'd5: begin |
| soclinux_wb_sdram_dat_r <= soclinux_data_port_dat_r[95:64]; |
| end |
| 3'd6: begin |
| soclinux_wb_sdram_dat_r <= soclinux_data_port_dat_r[63:32]; |
| end |
| default: begin |
| soclinux_wb_sdram_dat_r <= soclinux_data_port_dat_r[31:0]; |
| end |
| endcase |
| end |
| assign {soclinux_tag_do_dirty, soclinux_tag_do_tag} = soclinux_tag_port_dat_r; |
| assign soclinux_tag_port_dat_w = {soclinux_tag_di_dirty, soclinux_tag_di_tag}; |
| assign soclinux_tag_port_adr = soclinux_wb_sdram_adr[10:3]; |
| assign soclinux_tag_di_tag = soclinux_wb_sdram_adr[29:11]; |
| assign soclinux_adr = {soclinux_tag_do_tag, soclinux_wb_sdram_adr[10:3]}; |
| always @(*) begin |
| soclinux_we <= 1'd0; |
| soclinux_tag_di_dirty <= 1'd0; |
| soclinux_word_clr <= 1'd0; |
| soclinux_wb_sdram_ack <= 1'd0; |
| soclinux_word_inc <= 1'd0; |
| fullmemorywe_next_state <= 2'd0; |
| soclinux_write_from_slave <= 1'd0; |
| soclinux_tag_port_we <= 1'd0; |
| soclinux_cyc <= 1'd0; |
| soclinux_stb <= 1'd0; |
| fullmemorywe_next_state <= fullmemorywe_state; |
| case (fullmemorywe_state) |
| 1'd1: begin |
| soclinux_word_clr <= 1'd1; |
| if ((soclinux_tag_do_tag == soclinux_wb_sdram_adr[29:11])) begin |
| soclinux_wb_sdram_ack <= 1'd1; |
| if (soclinux_wb_sdram_we) begin |
| soclinux_tag_di_dirty <= 1'd1; |
| soclinux_tag_port_we <= 1'd1; |
| end |
| fullmemorywe_next_state <= 1'd0; |
| end else begin |
| if (soclinux_tag_do_dirty) begin |
| fullmemorywe_next_state <= 2'd2; |
| end else begin |
| soclinux_tag_port_we <= 1'd1; |
| soclinux_word_clr <= 1'd1; |
| fullmemorywe_next_state <= 2'd3; |
| end |
| end |
| end |
| 2'd2: begin |
| soclinux_stb <= 1'd1; |
| soclinux_cyc <= 1'd1; |
| soclinux_we <= 1'd1; |
| if (soclinux_ack) begin |
| soclinux_word_inc <= 1'd1; |
| if (1'd1) begin |
| soclinux_tag_port_we <= 1'd1; |
| soclinux_word_clr <= 1'd1; |
| fullmemorywe_next_state <= 2'd3; |
| end |
| end |
| end |
| 2'd3: begin |
| soclinux_stb <= 1'd1; |
| soclinux_cyc <= 1'd1; |
| soclinux_we <= 1'd0; |
| if (soclinux_ack) begin |
| soclinux_write_from_slave <= 1'd1; |
| soclinux_word_inc <= 1'd1; |
| if (1'd1) begin |
| fullmemorywe_next_state <= 1'd1; |
| end else begin |
| fullmemorywe_next_state <= 2'd3; |
| end |
| end |
| end |
| default: begin |
| if ((soclinux_wb_sdram_cyc & soclinux_wb_sdram_stb)) begin |
| fullmemorywe_next_state <= 1'd1; |
| end |
| end |
| endcase |
| end |
| assign soclinux_wdata_converter_sink_valid = ((soclinux_cyc & soclinux_stb) & soclinux_we); |
| assign soclinux_wdata_converter_sink_payload_data = soclinux_dat_w; |
| assign soclinux_wdata_converter_sink_payload_we = soclinux_sel; |
| assign soclinux_port_wdata_valid = soclinux_wdata_converter_source_valid; |
| assign soclinux_wdata_converter_source_ready = soclinux_port_wdata_ready; |
| assign soclinux_port_wdata_first = soclinux_wdata_converter_source_first; |
| assign soclinux_port_wdata_last = soclinux_wdata_converter_source_last; |
| assign soclinux_port_wdata_payload_data = soclinux_wdata_converter_source_payload_data; |
| assign soclinux_port_wdata_payload_we = soclinux_wdata_converter_source_payload_we; |
| assign soclinux_rdata_converter_sink_valid = soclinux_port_rdata_valid; |
| assign soclinux_port_rdata_ready = soclinux_rdata_converter_sink_ready; |
| assign soclinux_rdata_converter_sink_first = soclinux_port_rdata_first; |
| assign soclinux_rdata_converter_sink_last = soclinux_port_rdata_last; |
| assign soclinux_rdata_converter_sink_payload_data = soclinux_port_rdata_payload_data; |
| assign soclinux_rdata_converter_source_ready = 1'd1; |
| assign soclinux_dat_r = soclinux_rdata_converter_source_payload_data; |
| assign soclinux_wdata_converter_converter_sink_valid = soclinux_wdata_converter_sink_valid; |
| assign soclinux_wdata_converter_converter_sink_first = soclinux_wdata_converter_sink_first; |
| assign soclinux_wdata_converter_converter_sink_last = soclinux_wdata_converter_sink_last; |
| assign soclinux_wdata_converter_sink_ready = soclinux_wdata_converter_converter_sink_ready; |
| assign soclinux_wdata_converter_converter_sink_payload_data = {soclinux_wdata_converter_sink_payload_we, soclinux_wdata_converter_sink_payload_data}; |
| assign soclinux_wdata_converter_source_valid = soclinux_wdata_converter_source_source_valid; |
| assign soclinux_wdata_converter_source_first = soclinux_wdata_converter_source_source_first; |
| assign soclinux_wdata_converter_source_last = soclinux_wdata_converter_source_source_last; |
| assign soclinux_wdata_converter_source_source_ready = soclinux_wdata_converter_source_ready; |
| assign {soclinux_wdata_converter_source_payload_we, soclinux_wdata_converter_source_payload_data} = soclinux_wdata_converter_source_source_payload_data; |
| assign soclinux_wdata_converter_source_source_valid = soclinux_wdata_converter_converter_source_valid; |
| assign soclinux_wdata_converter_converter_source_ready = soclinux_wdata_converter_source_source_ready; |
| assign soclinux_wdata_converter_source_source_first = soclinux_wdata_converter_converter_source_first; |
| assign soclinux_wdata_converter_source_source_last = soclinux_wdata_converter_converter_source_last; |
| assign soclinux_wdata_converter_source_source_payload_data = soclinux_wdata_converter_converter_source_payload_data; |
| assign soclinux_wdata_converter_converter_source_valid = soclinux_wdata_converter_converter_sink_valid; |
| assign soclinux_wdata_converter_converter_sink_ready = soclinux_wdata_converter_converter_source_ready; |
| assign soclinux_wdata_converter_converter_source_first = soclinux_wdata_converter_converter_sink_first; |
| assign soclinux_wdata_converter_converter_source_last = soclinux_wdata_converter_converter_sink_last; |
| assign soclinux_wdata_converter_converter_source_payload_data = soclinux_wdata_converter_converter_sink_payload_data; |
| assign soclinux_wdata_converter_converter_source_payload_valid_token_count = 1'd1; |
| assign soclinux_rdata_converter_converter_sink_valid = soclinux_rdata_converter_sink_valid; |
| assign soclinux_rdata_converter_converter_sink_first = soclinux_rdata_converter_sink_first; |
| assign soclinux_rdata_converter_converter_sink_last = soclinux_rdata_converter_sink_last; |
| assign soclinux_rdata_converter_sink_ready = soclinux_rdata_converter_converter_sink_ready; |
| assign soclinux_rdata_converter_converter_sink_payload_data = {soclinux_rdata_converter_sink_payload_data}; |
| assign soclinux_rdata_converter_source_valid = soclinux_rdata_converter_source_source_valid; |
| assign soclinux_rdata_converter_source_first = soclinux_rdata_converter_source_source_first; |
| assign soclinux_rdata_converter_source_last = soclinux_rdata_converter_source_source_last; |
| assign soclinux_rdata_converter_source_source_ready = soclinux_rdata_converter_source_ready; |
| assign {soclinux_rdata_converter_source_payload_data} = soclinux_rdata_converter_source_source_payload_data; |
| assign soclinux_rdata_converter_source_source_valid = soclinux_rdata_converter_converter_source_valid; |
| assign soclinux_rdata_converter_converter_source_ready = soclinux_rdata_converter_source_source_ready; |
| assign soclinux_rdata_converter_source_source_first = soclinux_rdata_converter_converter_source_first; |
| assign soclinux_rdata_converter_source_source_last = soclinux_rdata_converter_converter_source_last; |
| assign soclinux_rdata_converter_source_source_payload_data = soclinux_rdata_converter_converter_source_payload_data; |
| assign soclinux_rdata_converter_converter_source_valid = soclinux_rdata_converter_converter_sink_valid; |
| assign soclinux_rdata_converter_converter_sink_ready = soclinux_rdata_converter_converter_source_ready; |
| assign soclinux_rdata_converter_converter_source_first = soclinux_rdata_converter_converter_sink_first; |
| assign soclinux_rdata_converter_converter_source_last = soclinux_rdata_converter_converter_sink_last; |
| assign soclinux_rdata_converter_converter_source_payload_data = soclinux_rdata_converter_converter_sink_payload_data; |
| assign soclinux_rdata_converter_converter_source_payload_valid_token_count = 1'd1; |
| always @(*) begin |
| soclinux_port_cmd_payload_we <= 1'd0; |
| soclinux_count_next_value_ce <= 1'd0; |
| soclinux_port_cmd_payload_addr <= 26'd0; |
| soclinux_port_cmd_valid <= 1'd0; |
| litedramwishbone2native_next_state <= 2'd0; |
| soclinux_ack <= 1'd0; |
| soclinux_count_next_value <= 1'd0; |
| litedramwishbone2native_next_state <= litedramwishbone2native_state; |
| case (litedramwishbone2native_state) |
| 1'd1: begin |
| if (soclinux_wdata_converter_sink_ready) begin |
| soclinux_ack <= 1'd1; |
| litedramwishbone2native_next_state <= 1'd0; |
| end |
| end |
| 2'd2: begin |
| if (soclinux_rdata_converter_source_valid) begin |
| soclinux_ack <= 1'd1; |
| litedramwishbone2native_next_state <= 1'd0; |
| end |
| end |
| default: begin |
| soclinux_port_cmd_valid <= (soclinux_cyc & soclinux_stb); |
| soclinux_port_cmd_payload_we <= soclinux_we; |
| soclinux_port_cmd_payload_addr <= (((soclinux_adr * 1'd1) + soclinux_count) - 27'd100663296); |
| if ((soclinux_port_cmd_valid & soclinux_port_cmd_ready)) begin |
| soclinux_count_next_value <= (soclinux_count + 1'd1); |
| soclinux_count_next_value_ce <= 1'd1; |
| if ((soclinux_count == 1'd0)) begin |
| soclinux_count_next_value <= 1'd0; |
| soclinux_count_next_value_ce <= 1'd1; |
| if (soclinux_we) begin |
| litedramwishbone2native_next_state <= 1'd1; |
| end else begin |
| litedramwishbone2native_next_state <= 2'd2; |
| end |
| end |
| end |
| end |
| endcase |
| end |
| always @(*) begin |
| emulator_ram_we <= 4'd0; |
| emulator_ram_we[0] <= (((emulator_ram_bus_cyc & emulator_ram_bus_stb) & emulator_ram_bus_we) & emulator_ram_bus_sel[0]); |
| emulator_ram_we[1] <= (((emulator_ram_bus_cyc & emulator_ram_bus_stb) & emulator_ram_bus_we) & emulator_ram_bus_sel[1]); |
| emulator_ram_we[2] <= (((emulator_ram_bus_cyc & emulator_ram_bus_stb) & emulator_ram_bus_we) & emulator_ram_bus_sel[2]); |
| emulator_ram_we[3] <= (((emulator_ram_bus_cyc & emulator_ram_bus_stb) & emulator_ram_bus_we) & emulator_ram_bus_sel[3]); |
| end |
| assign emulator_ram_adr = emulator_ram_bus_adr[11:0]; |
| assign emulator_ram_bus_dat_r = emulator_ram_dat_r; |
| assign emulator_ram_dat_w = emulator_ram_bus_dat_w; |
| assign shared_adr = rhs_array_muxed60; |
| assign shared_dat_w = rhs_array_muxed61; |
| assign shared_sel = rhs_array_muxed62; |
| assign shared_cyc = rhs_array_muxed63; |
| assign shared_stb = rhs_array_muxed64; |
| assign shared_we = rhs_array_muxed65; |
| assign shared_cti = rhs_array_muxed66; |
| assign shared_bte = rhs_array_muxed67; |
| assign soclinux_soclinux_cpu_ibus_dat_r = shared_dat_r; |
| assign soclinux_soclinux_cpu_dbus_dat_r = shared_dat_r; |
| assign soclinux_soclinux_cpu_ibus_ack = (shared_ack & (grant == 1'd0)); |
| assign soclinux_soclinux_cpu_dbus_ack = (shared_ack & (grant == 1'd1)); |
| assign soclinux_soclinux_cpu_ibus_err = (shared_err & (grant == 1'd0)); |
| assign soclinux_soclinux_cpu_dbus_err = (shared_err & (grant == 1'd1)); |
| assign request = {soclinux_soclinux_cpu_dbus_cyc, soclinux_soclinux_cpu_ibus_cyc}; |
| always @(*) begin |
| slave_sel <= 5'd0; |
| slave_sel[0] <= (shared_adr[29:13] == 1'd0); |
| slave_sel[1] <= (shared_adr[29:10] == 17'd65536); |
| slave_sel[2] <= (shared_adr[29:14] == 16'd61440); |
| slave_sel[3] <= (shared_adr[29:26] == 4'd12); |
| slave_sel[4] <= (shared_adr[29:12] == 16'd32768); |
| end |
| assign soclinux_soclinux_soclinux_ram_bus_adr = shared_adr; |
| assign soclinux_soclinux_soclinux_ram_bus_dat_w = shared_dat_w; |
| assign soclinux_soclinux_soclinux_ram_bus_sel = shared_sel; |
| assign soclinux_soclinux_soclinux_ram_bus_stb = shared_stb; |
| assign soclinux_soclinux_soclinux_ram_bus_we = shared_we; |
| assign soclinux_soclinux_soclinux_ram_bus_cti = shared_cti; |
| assign soclinux_soclinux_soclinux_ram_bus_bte = shared_bte; |
| assign soclinux_soclinux_ram_bus_ram_bus_adr = shared_adr; |
| assign soclinux_soclinux_ram_bus_ram_bus_dat_w = shared_dat_w; |
| assign soclinux_soclinux_ram_bus_ram_bus_sel = shared_sel; |
| assign soclinux_soclinux_ram_bus_ram_bus_stb = shared_stb; |
| assign soclinux_soclinux_ram_bus_ram_bus_we = shared_we; |
| assign soclinux_soclinux_ram_bus_ram_bus_cti = shared_cti; |
| assign soclinux_soclinux_ram_bus_ram_bus_bte = shared_bte; |
| assign soclinux_soclinux_bus_wishbone_adr = shared_adr; |
| assign soclinux_soclinux_bus_wishbone_dat_w = shared_dat_w; |
| assign soclinux_soclinux_bus_wishbone_sel = shared_sel; |
| assign soclinux_soclinux_bus_wishbone_stb = shared_stb; |
| assign soclinux_soclinux_bus_wishbone_we = shared_we; |
| assign soclinux_soclinux_bus_wishbone_cti = shared_cti; |
| assign soclinux_soclinux_bus_wishbone_bte = shared_bte; |
| assign soclinux_wb_sdram_adr = shared_adr; |
| assign soclinux_wb_sdram_dat_w = shared_dat_w; |
| assign soclinux_wb_sdram_sel = shared_sel; |
| assign soclinux_wb_sdram_stb = shared_stb; |
| assign soclinux_wb_sdram_we = shared_we; |
| assign soclinux_wb_sdram_cti = shared_cti; |
| assign soclinux_wb_sdram_bte = shared_bte; |
| assign emulator_ram_bus_adr = shared_adr; |
| assign emulator_ram_bus_dat_w = shared_dat_w; |
| assign emulator_ram_bus_sel = shared_sel; |
| assign emulator_ram_bus_stb = shared_stb; |
| assign emulator_ram_bus_we = shared_we; |
| assign emulator_ram_bus_cti = shared_cti; |
| assign emulator_ram_bus_bte = shared_bte; |
| assign soclinux_soclinux_soclinux_ram_bus_cyc = (shared_cyc & slave_sel[0]); |
| assign soclinux_soclinux_ram_bus_ram_bus_cyc = (shared_cyc & slave_sel[1]); |
| assign soclinux_soclinux_bus_wishbone_cyc = (shared_cyc & slave_sel[2]); |
| assign soclinux_wb_sdram_cyc = (shared_cyc & slave_sel[3]); |
| assign emulator_ram_bus_cyc = (shared_cyc & slave_sel[4]); |
| assign shared_err = ((((soclinux_soclinux_soclinux_ram_bus_err | soclinux_soclinux_ram_bus_ram_bus_err) | soclinux_soclinux_bus_wishbone_err) | soclinux_wb_sdram_err) | emulator_ram_bus_err); |
| assign wait_1 = ((shared_stb & shared_cyc) & (~shared_ack)); |
| always @(*) begin |
| shared_ack <= 1'd0; |
| shared_dat_r <= 32'd0; |
| error <= 1'd0; |
| shared_ack <= ((((soclinux_soclinux_soclinux_ram_bus_ack | soclinux_soclinux_ram_bus_ram_bus_ack) | soclinux_soclinux_bus_wishbone_ack) | soclinux_wb_sdram_ack) | emulator_ram_bus_ack); |
| shared_dat_r <= ((((({32{slave_sel_r[0]}} & soclinux_soclinux_soclinux_ram_bus_dat_r) | ({32{slave_sel_r[1]}} & soclinux_soclinux_ram_bus_ram_bus_dat_r)) | ({32{slave_sel_r[2]}} & soclinux_soclinux_bus_wishbone_dat_r)) | ({32{slave_sel_r[3]}} & soclinux_wb_sdram_dat_r)) | ({32{slave_sel_r[4]}} & emulator_ram_bus_dat_r)); |
| if (done) begin |
| shared_dat_r <= 32'd4294967295; |
| shared_ack <= 1'd1; |
| error <= 1'd1; |
| end |
| end |
| assign done = (count == 1'd0); |
| assign csrbank0_sel = (interface0_bank_bus_adr[13:9] == 1'd1); |
| assign soclinux_soclinux_cpu_latch_r = interface0_bank_bus_dat_w[0]; |
| assign soclinux_soclinux_cpu_latch_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 1'd0)); |
| assign soclinux_soclinux_cpu_latch_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 1'd0)); |
| assign csrbank0_timer_time7_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time7_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 1'd1)); |
| assign csrbank0_timer_time7_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 1'd1)); |
| assign csrbank0_timer_time6_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time6_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 2'd2)); |
| assign csrbank0_timer_time6_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 2'd2)); |
| assign csrbank0_timer_time5_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time5_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 2'd3)); |
| assign csrbank0_timer_time5_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 2'd3)); |
| assign csrbank0_timer_time4_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time4_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 3'd4)); |
| assign csrbank0_timer_time4_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 3'd4)); |
| assign csrbank0_timer_time3_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time3_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 3'd5)); |
| assign csrbank0_timer_time3_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 3'd5)); |
| assign csrbank0_timer_time2_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time2_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 3'd6)); |
| assign csrbank0_timer_time2_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 3'd6)); |
| assign csrbank0_timer_time1_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time1_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 3'd7)); |
| assign csrbank0_timer_time1_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 3'd7)); |
| assign csrbank0_timer_time0_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time0_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 4'd8)); |
| assign csrbank0_timer_time0_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 4'd8)); |
| assign csrbank0_timer_time_cmp7_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time_cmp7_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 4'd9)); |
| assign csrbank0_timer_time_cmp7_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 4'd9)); |
| assign csrbank0_timer_time_cmp6_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time_cmp6_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 4'd10)); |
| assign csrbank0_timer_time_cmp6_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 4'd10)); |
| assign csrbank0_timer_time_cmp5_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time_cmp5_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 4'd11)); |
| assign csrbank0_timer_time_cmp5_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 4'd11)); |
| assign csrbank0_timer_time_cmp4_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time_cmp4_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 4'd12)); |
| assign csrbank0_timer_time_cmp4_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 4'd12)); |
| assign csrbank0_timer_time_cmp3_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time_cmp3_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 4'd13)); |
| assign csrbank0_timer_time_cmp3_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 4'd13)); |
| assign csrbank0_timer_time_cmp2_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time_cmp2_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 4'd14)); |
| assign csrbank0_timer_time_cmp2_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 4'd14)); |
| assign csrbank0_timer_time_cmp1_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time_cmp1_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 4'd15)); |
| assign csrbank0_timer_time_cmp1_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 4'd15)); |
| assign csrbank0_timer_time_cmp0_r = interface0_bank_bus_dat_w[7:0]; |
| assign csrbank0_timer_time_cmp0_re = ((csrbank0_sel & interface0_bank_bus_we) & (interface0_bank_bus_adr[4:0] == 5'd16)); |
| assign csrbank0_timer_time_cmp0_we = ((csrbank0_sel & (~interface0_bank_bus_we)) & (interface0_bank_bus_adr[4:0] == 5'd16)); |
| assign csrbank0_timer_time7_w = soclinux_soclinux_cpu_time_status[63:56]; |
| assign csrbank0_timer_time6_w = soclinux_soclinux_cpu_time_status[55:48]; |
| assign csrbank0_timer_time5_w = soclinux_soclinux_cpu_time_status[47:40]; |
| assign csrbank0_timer_time4_w = soclinux_soclinux_cpu_time_status[39:32]; |
| assign csrbank0_timer_time3_w = soclinux_soclinux_cpu_time_status[31:24]; |
| assign csrbank0_timer_time2_w = soclinux_soclinux_cpu_time_status[23:16]; |
| assign csrbank0_timer_time1_w = soclinux_soclinux_cpu_time_status[15:8]; |
| assign csrbank0_timer_time0_w = soclinux_soclinux_cpu_time_status[7:0]; |
| assign soclinux_soclinux_cpu_time_we = csrbank0_timer_time0_we; |
| assign csrbank0_timer_time_cmp7_w = soclinux_soclinux_cpu_time_cmp_storage[63:56]; |
| assign csrbank0_timer_time_cmp6_w = soclinux_soclinux_cpu_time_cmp_storage[55:48]; |
| assign csrbank0_timer_time_cmp5_w = soclinux_soclinux_cpu_time_cmp_storage[47:40]; |
| assign csrbank0_timer_time_cmp4_w = soclinux_soclinux_cpu_time_cmp_storage[39:32]; |
| assign csrbank0_timer_time_cmp3_w = soclinux_soclinux_cpu_time_cmp_storage[31:24]; |
| assign csrbank0_timer_time_cmp2_w = soclinux_soclinux_cpu_time_cmp_storage[23:16]; |
| assign csrbank0_timer_time_cmp1_w = soclinux_soclinux_cpu_time_cmp_storage[15:8]; |
| assign csrbank0_timer_time_cmp0_w = soclinux_soclinux_cpu_time_cmp_storage[7:0]; |
| assign csrbank1_sel = (interface1_bank_bus_adr[13:9] == 1'd0); |
| assign csrbank1_reset0_r = interface1_bank_bus_dat_w[0]; |
| assign csrbank1_reset0_re = ((csrbank1_sel & interface1_bank_bus_we) & (interface1_bank_bus_adr[3:0] == 1'd0)); |
| assign csrbank1_reset0_we = ((csrbank1_sel & (~interface1_bank_bus_we)) & (interface1_bank_bus_adr[3:0] == 1'd0)); |
| assign csrbank1_scratch3_r = interface1_bank_bus_dat_w[7:0]; |
| assign csrbank1_scratch3_re = ((csrbank1_sel & interface1_bank_bus_we) & (interface1_bank_bus_adr[3:0] == 1'd1)); |
| assign csrbank1_scratch3_we = ((csrbank1_sel & (~interface1_bank_bus_we)) & (interface1_bank_bus_adr[3:0] == 1'd1)); |
| assign csrbank1_scratch2_r = interface1_bank_bus_dat_w[7:0]; |
| assign csrbank1_scratch2_re = ((csrbank1_sel & interface1_bank_bus_we) & (interface1_bank_bus_adr[3:0] == 2'd2)); |
| assign csrbank1_scratch2_we = ((csrbank1_sel & (~interface1_bank_bus_we)) & (interface1_bank_bus_adr[3:0] == 2'd2)); |
| assign csrbank1_scratch1_r = interface1_bank_bus_dat_w[7:0]; |
| assign csrbank1_scratch1_re = ((csrbank1_sel & interface1_bank_bus_we) & (interface1_bank_bus_adr[3:0] == 2'd3)); |
| assign csrbank1_scratch1_we = ((csrbank1_sel & (~interface1_bank_bus_we)) & (interface1_bank_bus_adr[3:0] == 2'd3)); |
| assign csrbank1_scratch0_r = interface1_bank_bus_dat_w[7:0]; |
| assign csrbank1_scratch0_re = ((csrbank1_sel & interface1_bank_bus_we) & (interface1_bank_bus_adr[3:0] == 3'd4)); |
| assign csrbank1_scratch0_we = ((csrbank1_sel & (~interface1_bank_bus_we)) & (interface1_bank_bus_adr[3:0] == 3'd4)); |
| assign csrbank1_bus_errors3_r = interface1_bank_bus_dat_w[7:0]; |
| assign csrbank1_bus_errors3_re = ((csrbank1_sel & interface1_bank_bus_we) & (interface1_bank_bus_adr[3:0] == 3'd5)); |
| assign csrbank1_bus_errors3_we = ((csrbank1_sel & (~interface1_bank_bus_we)) & (interface1_bank_bus_adr[3:0] == 3'd5)); |
| assign csrbank1_bus_errors2_r = interface1_bank_bus_dat_w[7:0]; |
| assign csrbank1_bus_errors2_re = ((csrbank1_sel & interface1_bank_bus_we) & (interface1_bank_bus_adr[3:0] == 3'd6)); |
| assign csrbank1_bus_errors2_we = ((csrbank1_sel & (~interface1_bank_bus_we)) & (interface1_bank_bus_adr[3:0] == 3'd6)); |
| assign csrbank1_bus_errors1_r = interface1_bank_bus_dat_w[7:0]; |
| assign csrbank1_bus_errors1_re = ((csrbank1_sel & interface1_bank_bus_we) & (interface1_bank_bus_adr[3:0] == 3'd7)); |
| assign csrbank1_bus_errors1_we = ((csrbank1_sel & (~interface1_bank_bus_we)) & (interface1_bank_bus_adr[3:0] == 3'd7)); |
| assign csrbank1_bus_errors0_r = interface1_bank_bus_dat_w[7:0]; |
| assign csrbank1_bus_errors0_re = ((csrbank1_sel & interface1_bank_bus_we) & (interface1_bank_bus_adr[3:0] == 4'd8)); |
| assign csrbank1_bus_errors0_we = ((csrbank1_sel & (~interface1_bank_bus_we)) & (interface1_bank_bus_adr[3:0] == 4'd8)); |
| assign csrbank1_reset0_w = soclinux_soclinux_soccontroller_reset_storage; |
| assign csrbank1_scratch3_w = soclinux_soclinux_soccontroller_scratch_storage[31:24]; |
| assign csrbank1_scratch2_w = soclinux_soclinux_soccontroller_scratch_storage[23:16]; |
| assign csrbank1_scratch1_w = soclinux_soclinux_soccontroller_scratch_storage[15:8]; |
| assign csrbank1_scratch0_w = soclinux_soclinux_soccontroller_scratch_storage[7:0]; |
| assign csrbank1_bus_errors3_w = soclinux_soclinux_soccontroller_bus_errors_status[31:24]; |
| assign csrbank1_bus_errors2_w = soclinux_soclinux_soccontroller_bus_errors_status[23:16]; |
| assign csrbank1_bus_errors1_w = soclinux_soclinux_soccontroller_bus_errors_status[15:8]; |
| assign csrbank1_bus_errors0_w = soclinux_soclinux_soccontroller_bus_errors_status[7:0]; |
| assign soclinux_soclinux_soccontroller_bus_errors_we = csrbank1_bus_errors0_we; |
| assign csrbank2_sel = (interface2_bank_bus_adr[13:9] == 3'd5); |
| assign csrbank2_en_vtc0_r = interface2_bank_bus_dat_w[0]; |
| assign csrbank2_en_vtc0_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 1'd0)); |
| assign csrbank2_en_vtc0_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 1'd0)); |
| assign csrbank2_half_sys8x_taps1_r = interface2_bank_bus_dat_w[0]; |
| assign csrbank2_half_sys8x_taps1_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 1'd1)); |
| assign csrbank2_half_sys8x_taps1_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 1'd1)); |
| assign csrbank2_half_sys8x_taps0_r = interface2_bank_bus_dat_w[7:0]; |
| assign csrbank2_half_sys8x_taps0_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 2'd2)); |
| assign csrbank2_half_sys8x_taps0_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 2'd2)); |
| assign csrbank2_wlevel_en0_r = interface2_bank_bus_dat_w[0]; |
| assign csrbank2_wlevel_en0_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 2'd3)); |
| assign csrbank2_wlevel_en0_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 2'd3)); |
| assign soclinux_usddrphy_wlevel_strobe_r = interface2_bank_bus_dat_w[0]; |
| assign soclinux_usddrphy_wlevel_strobe_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 3'd4)); |
| assign soclinux_usddrphy_wlevel_strobe_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 3'd4)); |
| assign soclinux_usddrphy_cdly_rst_r = interface2_bank_bus_dat_w[0]; |
| assign soclinux_usddrphy_cdly_rst_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 3'd5)); |
| assign soclinux_usddrphy_cdly_rst_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 3'd5)); |
| assign soclinux_usddrphy_cdly_inc_r = interface2_bank_bus_dat_w[0]; |
| assign soclinux_usddrphy_cdly_inc_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 3'd6)); |
| assign soclinux_usddrphy_cdly_inc_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 3'd6)); |
| assign csrbank2_dly_sel0_r = interface2_bank_bus_dat_w[3:0]; |
| assign csrbank2_dly_sel0_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 3'd7)); |
| assign csrbank2_dly_sel0_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 3'd7)); |
| assign soclinux_usddrphy_rdly_dq_rst_r = interface2_bank_bus_dat_w[0]; |
| assign soclinux_usddrphy_rdly_dq_rst_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 4'd8)); |
| assign soclinux_usddrphy_rdly_dq_rst_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 4'd8)); |
| assign soclinux_usddrphy_rdly_dq_inc_r = interface2_bank_bus_dat_w[0]; |
| assign soclinux_usddrphy_rdly_dq_inc_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 4'd9)); |
| assign soclinux_usddrphy_rdly_dq_inc_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 4'd9)); |
| assign soclinux_usddrphy_rdly_dq_bitslip_rst_r = interface2_bank_bus_dat_w[0]; |
| assign soclinux_usddrphy_rdly_dq_bitslip_rst_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 4'd10)); |
| assign soclinux_usddrphy_rdly_dq_bitslip_rst_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 4'd10)); |
| assign soclinux_usddrphy_rdly_dq_bitslip_r = interface2_bank_bus_dat_w[0]; |
| assign soclinux_usddrphy_rdly_dq_bitslip_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 4'd11)); |
| assign soclinux_usddrphy_rdly_dq_bitslip_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 4'd11)); |
| assign soclinux_usddrphy_wdly_dq_rst_r = interface2_bank_bus_dat_w[0]; |
| assign soclinux_usddrphy_wdly_dq_rst_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 4'd12)); |
| assign soclinux_usddrphy_wdly_dq_rst_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 4'd12)); |
| assign soclinux_usddrphy_wdly_dq_inc_r = interface2_bank_bus_dat_w[0]; |
| assign soclinux_usddrphy_wdly_dq_inc_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 4'd13)); |
| assign soclinux_usddrphy_wdly_dq_inc_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 4'd13)); |
| assign soclinux_usddrphy_wdly_dqs_rst_r = interface2_bank_bus_dat_w[0]; |
| assign soclinux_usddrphy_wdly_dqs_rst_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 4'd14)); |
| assign soclinux_usddrphy_wdly_dqs_rst_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 4'd14)); |
| assign soclinux_usddrphy_wdly_dqs_inc_r = interface2_bank_bus_dat_w[0]; |
| assign soclinux_usddrphy_wdly_dqs_inc_re = ((csrbank2_sel & interface2_bank_bus_we) & (interface2_bank_bus_adr[3:0] == 4'd15)); |
| assign soclinux_usddrphy_wdly_dqs_inc_we = ((csrbank2_sel & (~interface2_bank_bus_we)) & (interface2_bank_bus_adr[3:0] == 4'd15)); |
| assign csrbank2_en_vtc0_w = soclinux_usddrphy_en_vtc_storage; |
| assign csrbank2_half_sys8x_taps1_w = soclinux_usddrphy_status[8]; |
| assign csrbank2_half_sys8x_taps0_w = soclinux_usddrphy_status[7:0]; |
| assign soclinux_usddrphy_we = csrbank2_half_sys8x_taps0_we; |
| assign csrbank2_wlevel_en0_w = soclinux_usddrphy_wlevel_en_storage; |
| assign csrbank2_dly_sel0_w = soclinux_usddrphy_dly_sel_storage[3:0]; |
| assign csrbank3_sel = (interface3_bank_bus_adr[13:9] == 3'd6); |
| assign csrbank3_dfii_control0_r = interface3_bank_bus_dat_w[3:0]; |
| assign csrbank3_dfii_control0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 1'd0)); |
| assign csrbank3_dfii_control0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 1'd0)); |
| assign csrbank3_dfii_pi0_command0_r = interface3_bank_bus_dat_w[5:0]; |
| assign csrbank3_dfii_pi0_command0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 1'd1)); |
| assign csrbank3_dfii_pi0_command0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 1'd1)); |
| assign soclinux_sdram_phaseinjector0_command_issue_r = interface3_bank_bus_dat_w[0]; |
| assign soclinux_sdram_phaseinjector0_command_issue_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 2'd2)); |
| assign soclinux_sdram_phaseinjector0_command_issue_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 2'd2)); |
| assign csrbank3_dfii_pi0_address1_r = interface3_bank_bus_dat_w[6:0]; |
| assign csrbank3_dfii_pi0_address1_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 2'd3)); |
| assign csrbank3_dfii_pi0_address1_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 2'd3)); |
| assign csrbank3_dfii_pi0_address0_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_address0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 3'd4)); |
| assign csrbank3_dfii_pi0_address0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 3'd4)); |
| assign csrbank3_dfii_pi0_baddress0_r = interface3_bank_bus_dat_w[3:0]; |
| assign csrbank3_dfii_pi0_baddress0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 3'd5)); |
| assign csrbank3_dfii_pi0_baddress0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 3'd5)); |
| assign csrbank3_dfii_pi0_wrdata7_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_wrdata7_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 3'd6)); |
| assign csrbank3_dfii_pi0_wrdata7_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 3'd6)); |
| assign csrbank3_dfii_pi0_wrdata6_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_wrdata6_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 3'd7)); |
| assign csrbank3_dfii_pi0_wrdata6_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 3'd7)); |
| assign csrbank3_dfii_pi0_wrdata5_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_wrdata5_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 4'd8)); |
| assign csrbank3_dfii_pi0_wrdata5_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 4'd8)); |
| assign csrbank3_dfii_pi0_wrdata4_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_wrdata4_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 4'd9)); |
| assign csrbank3_dfii_pi0_wrdata4_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 4'd9)); |
| assign csrbank3_dfii_pi0_wrdata3_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_wrdata3_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 4'd10)); |
| assign csrbank3_dfii_pi0_wrdata3_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 4'd10)); |
| assign csrbank3_dfii_pi0_wrdata2_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_wrdata2_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 4'd11)); |
| assign csrbank3_dfii_pi0_wrdata2_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 4'd11)); |
| assign csrbank3_dfii_pi0_wrdata1_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_wrdata1_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 4'd12)); |
| assign csrbank3_dfii_pi0_wrdata1_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 4'd12)); |
| assign csrbank3_dfii_pi0_wrdata0_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_wrdata0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 4'd13)); |
| assign csrbank3_dfii_pi0_wrdata0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 4'd13)); |
| assign csrbank3_dfii_pi0_rddata7_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_rddata7_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 4'd14)); |
| assign csrbank3_dfii_pi0_rddata7_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 4'd14)); |
| assign csrbank3_dfii_pi0_rddata6_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_rddata6_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 4'd15)); |
| assign csrbank3_dfii_pi0_rddata6_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 4'd15)); |
| assign csrbank3_dfii_pi0_rddata5_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_rddata5_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd16)); |
| assign csrbank3_dfii_pi0_rddata5_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd16)); |
| assign csrbank3_dfii_pi0_rddata4_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_rddata4_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd17)); |
| assign csrbank3_dfii_pi0_rddata4_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd17)); |
| assign csrbank3_dfii_pi0_rddata3_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_rddata3_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd18)); |
| assign csrbank3_dfii_pi0_rddata3_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd18)); |
| assign csrbank3_dfii_pi0_rddata2_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_rddata2_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd19)); |
| assign csrbank3_dfii_pi0_rddata2_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd19)); |
| assign csrbank3_dfii_pi0_rddata1_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_rddata1_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd20)); |
| assign csrbank3_dfii_pi0_rddata1_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd20)); |
| assign csrbank3_dfii_pi0_rddata0_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi0_rddata0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd21)); |
| assign csrbank3_dfii_pi0_rddata0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd21)); |
| assign csrbank3_dfii_pi1_command0_r = interface3_bank_bus_dat_w[5:0]; |
| assign csrbank3_dfii_pi1_command0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd22)); |
| assign csrbank3_dfii_pi1_command0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd22)); |
| assign soclinux_sdram_phaseinjector1_command_issue_r = interface3_bank_bus_dat_w[0]; |
| assign soclinux_sdram_phaseinjector1_command_issue_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd23)); |
| assign soclinux_sdram_phaseinjector1_command_issue_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd23)); |
| assign csrbank3_dfii_pi1_address1_r = interface3_bank_bus_dat_w[6:0]; |
| assign csrbank3_dfii_pi1_address1_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd24)); |
| assign csrbank3_dfii_pi1_address1_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd24)); |
| assign csrbank3_dfii_pi1_address0_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_address0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd25)); |
| assign csrbank3_dfii_pi1_address0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd25)); |
| assign csrbank3_dfii_pi1_baddress0_r = interface3_bank_bus_dat_w[3:0]; |
| assign csrbank3_dfii_pi1_baddress0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd26)); |
| assign csrbank3_dfii_pi1_baddress0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd26)); |
| assign csrbank3_dfii_pi1_wrdata7_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_wrdata7_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd27)); |
| assign csrbank3_dfii_pi1_wrdata7_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd27)); |
| assign csrbank3_dfii_pi1_wrdata6_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_wrdata6_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd28)); |
| assign csrbank3_dfii_pi1_wrdata6_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd28)); |
| assign csrbank3_dfii_pi1_wrdata5_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_wrdata5_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd29)); |
| assign csrbank3_dfii_pi1_wrdata5_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd29)); |
| assign csrbank3_dfii_pi1_wrdata4_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_wrdata4_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd30)); |
| assign csrbank3_dfii_pi1_wrdata4_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd30)); |
| assign csrbank3_dfii_pi1_wrdata3_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_wrdata3_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 5'd31)); |
| assign csrbank3_dfii_pi1_wrdata3_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 5'd31)); |
| assign csrbank3_dfii_pi1_wrdata2_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_wrdata2_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd32)); |
| assign csrbank3_dfii_pi1_wrdata2_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd32)); |
| assign csrbank3_dfii_pi1_wrdata1_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_wrdata1_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd33)); |
| assign csrbank3_dfii_pi1_wrdata1_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd33)); |
| assign csrbank3_dfii_pi1_wrdata0_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_wrdata0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd34)); |
| assign csrbank3_dfii_pi1_wrdata0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd34)); |
| assign csrbank3_dfii_pi1_rddata7_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_rddata7_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd35)); |
| assign csrbank3_dfii_pi1_rddata7_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd35)); |
| assign csrbank3_dfii_pi1_rddata6_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_rddata6_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd36)); |
| assign csrbank3_dfii_pi1_rddata6_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd36)); |
| assign csrbank3_dfii_pi1_rddata5_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_rddata5_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd37)); |
| assign csrbank3_dfii_pi1_rddata5_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd37)); |
| assign csrbank3_dfii_pi1_rddata4_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_rddata4_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd38)); |
| assign csrbank3_dfii_pi1_rddata4_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd38)); |
| assign csrbank3_dfii_pi1_rddata3_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_rddata3_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd39)); |
| assign csrbank3_dfii_pi1_rddata3_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd39)); |
| assign csrbank3_dfii_pi1_rddata2_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_rddata2_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd40)); |
| assign csrbank3_dfii_pi1_rddata2_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd40)); |
| assign csrbank3_dfii_pi1_rddata1_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_rddata1_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd41)); |
| assign csrbank3_dfii_pi1_rddata1_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd41)); |
| assign csrbank3_dfii_pi1_rddata0_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi1_rddata0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd42)); |
| assign csrbank3_dfii_pi1_rddata0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd42)); |
| assign csrbank3_dfii_pi2_command0_r = interface3_bank_bus_dat_w[5:0]; |
| assign csrbank3_dfii_pi2_command0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd43)); |
| assign csrbank3_dfii_pi2_command0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd43)); |
| assign soclinux_sdram_phaseinjector2_command_issue_r = interface3_bank_bus_dat_w[0]; |
| assign soclinux_sdram_phaseinjector2_command_issue_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd44)); |
| assign soclinux_sdram_phaseinjector2_command_issue_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd44)); |
| assign csrbank3_dfii_pi2_address1_r = interface3_bank_bus_dat_w[6:0]; |
| assign csrbank3_dfii_pi2_address1_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd45)); |
| assign csrbank3_dfii_pi2_address1_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd45)); |
| assign csrbank3_dfii_pi2_address0_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_address0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd46)); |
| assign csrbank3_dfii_pi2_address0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd46)); |
| assign csrbank3_dfii_pi2_baddress0_r = interface3_bank_bus_dat_w[3:0]; |
| assign csrbank3_dfii_pi2_baddress0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd47)); |
| assign csrbank3_dfii_pi2_baddress0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd47)); |
| assign csrbank3_dfii_pi2_wrdata7_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_wrdata7_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd48)); |
| assign csrbank3_dfii_pi2_wrdata7_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd48)); |
| assign csrbank3_dfii_pi2_wrdata6_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_wrdata6_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd49)); |
| assign csrbank3_dfii_pi2_wrdata6_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd49)); |
| assign csrbank3_dfii_pi2_wrdata5_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_wrdata5_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd50)); |
| assign csrbank3_dfii_pi2_wrdata5_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd50)); |
| assign csrbank3_dfii_pi2_wrdata4_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_wrdata4_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd51)); |
| assign csrbank3_dfii_pi2_wrdata4_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd51)); |
| assign csrbank3_dfii_pi2_wrdata3_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_wrdata3_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd52)); |
| assign csrbank3_dfii_pi2_wrdata3_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd52)); |
| assign csrbank3_dfii_pi2_wrdata2_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_wrdata2_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd53)); |
| assign csrbank3_dfii_pi2_wrdata2_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd53)); |
| assign csrbank3_dfii_pi2_wrdata1_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_wrdata1_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd54)); |
| assign csrbank3_dfii_pi2_wrdata1_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd54)); |
| assign csrbank3_dfii_pi2_wrdata0_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_wrdata0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd55)); |
| assign csrbank3_dfii_pi2_wrdata0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd55)); |
| assign csrbank3_dfii_pi2_rddata7_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_rddata7_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd56)); |
| assign csrbank3_dfii_pi2_rddata7_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd56)); |
| assign csrbank3_dfii_pi2_rddata6_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_rddata6_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd57)); |
| assign csrbank3_dfii_pi2_rddata6_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd57)); |
| assign csrbank3_dfii_pi2_rddata5_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_rddata5_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd58)); |
| assign csrbank3_dfii_pi2_rddata5_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd58)); |
| assign csrbank3_dfii_pi2_rddata4_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_rddata4_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd59)); |
| assign csrbank3_dfii_pi2_rddata4_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd59)); |
| assign csrbank3_dfii_pi2_rddata3_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_rddata3_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd60)); |
| assign csrbank3_dfii_pi2_rddata3_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd60)); |
| assign csrbank3_dfii_pi2_rddata2_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_rddata2_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd61)); |
| assign csrbank3_dfii_pi2_rddata2_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd61)); |
| assign csrbank3_dfii_pi2_rddata1_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_rddata1_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd62)); |
| assign csrbank3_dfii_pi2_rddata1_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd62)); |
| assign csrbank3_dfii_pi2_rddata0_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi2_rddata0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 6'd63)); |
| assign csrbank3_dfii_pi2_rddata0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 6'd63)); |
| assign csrbank3_dfii_pi3_command0_r = interface3_bank_bus_dat_w[5:0]; |
| assign csrbank3_dfii_pi3_command0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd64)); |
| assign csrbank3_dfii_pi3_command0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd64)); |
| assign soclinux_sdram_phaseinjector3_command_issue_r = interface3_bank_bus_dat_w[0]; |
| assign soclinux_sdram_phaseinjector3_command_issue_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd65)); |
| assign soclinux_sdram_phaseinjector3_command_issue_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd65)); |
| assign csrbank3_dfii_pi3_address1_r = interface3_bank_bus_dat_w[6:0]; |
| assign csrbank3_dfii_pi3_address1_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd66)); |
| assign csrbank3_dfii_pi3_address1_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd66)); |
| assign csrbank3_dfii_pi3_address0_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_address0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd67)); |
| assign csrbank3_dfii_pi3_address0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd67)); |
| assign csrbank3_dfii_pi3_baddress0_r = interface3_bank_bus_dat_w[3:0]; |
| assign csrbank3_dfii_pi3_baddress0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd68)); |
| assign csrbank3_dfii_pi3_baddress0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd68)); |
| assign csrbank3_dfii_pi3_wrdata7_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_wrdata7_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd69)); |
| assign csrbank3_dfii_pi3_wrdata7_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd69)); |
| assign csrbank3_dfii_pi3_wrdata6_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_wrdata6_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd70)); |
| assign csrbank3_dfii_pi3_wrdata6_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd70)); |
| assign csrbank3_dfii_pi3_wrdata5_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_wrdata5_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd71)); |
| assign csrbank3_dfii_pi3_wrdata5_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd71)); |
| assign csrbank3_dfii_pi3_wrdata4_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_wrdata4_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd72)); |
| assign csrbank3_dfii_pi3_wrdata4_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd72)); |
| assign csrbank3_dfii_pi3_wrdata3_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_wrdata3_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd73)); |
| assign csrbank3_dfii_pi3_wrdata3_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd73)); |
| assign csrbank3_dfii_pi3_wrdata2_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_wrdata2_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd74)); |
| assign csrbank3_dfii_pi3_wrdata2_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd74)); |
| assign csrbank3_dfii_pi3_wrdata1_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_wrdata1_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd75)); |
| assign csrbank3_dfii_pi3_wrdata1_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd75)); |
| assign csrbank3_dfii_pi3_wrdata0_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_wrdata0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd76)); |
| assign csrbank3_dfii_pi3_wrdata0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd76)); |
| assign csrbank3_dfii_pi3_rddata7_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_rddata7_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd77)); |
| assign csrbank3_dfii_pi3_rddata7_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd77)); |
| assign csrbank3_dfii_pi3_rddata6_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_rddata6_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd78)); |
| assign csrbank3_dfii_pi3_rddata6_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd78)); |
| assign csrbank3_dfii_pi3_rddata5_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_rddata5_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd79)); |
| assign csrbank3_dfii_pi3_rddata5_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd79)); |
| assign csrbank3_dfii_pi3_rddata4_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_rddata4_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd80)); |
| assign csrbank3_dfii_pi3_rddata4_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd80)); |
| assign csrbank3_dfii_pi3_rddata3_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_rddata3_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd81)); |
| assign csrbank3_dfii_pi3_rddata3_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd81)); |
| assign csrbank3_dfii_pi3_rddata2_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_rddata2_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd82)); |
| assign csrbank3_dfii_pi3_rddata2_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd82)); |
| assign csrbank3_dfii_pi3_rddata1_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_rddata1_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd83)); |
| assign csrbank3_dfii_pi3_rddata1_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd83)); |
| assign csrbank3_dfii_pi3_rddata0_r = interface3_bank_bus_dat_w[7:0]; |
| assign csrbank3_dfii_pi3_rddata0_re = ((csrbank3_sel & interface3_bank_bus_we) & (interface3_bank_bus_adr[6:0] == 7'd84)); |
| assign csrbank3_dfii_pi3_rddata0_we = ((csrbank3_sel & (~interface3_bank_bus_we)) & (interface3_bank_bus_adr[6:0] == 7'd84)); |
| assign csrbank3_dfii_control0_w = soclinux_sdram_storage[3:0]; |
| assign csrbank3_dfii_pi0_command0_w = soclinux_sdram_phaseinjector0_command_storage[5:0]; |
| assign csrbank3_dfii_pi0_address1_w = soclinux_sdram_phaseinjector0_address_storage[14:8]; |
| assign csrbank3_dfii_pi0_address0_w = soclinux_sdram_phaseinjector0_address_storage[7:0]; |
| assign csrbank3_dfii_pi0_baddress0_w = soclinux_sdram_phaseinjector0_baddress_storage[3:0]; |
| assign csrbank3_dfii_pi0_wrdata7_w = soclinux_sdram_phaseinjector0_wrdata_storage[63:56]; |
| assign csrbank3_dfii_pi0_wrdata6_w = soclinux_sdram_phaseinjector0_wrdata_storage[55:48]; |
| assign csrbank3_dfii_pi0_wrdata5_w = soclinux_sdram_phaseinjector0_wrdata_storage[47:40]; |
| assign csrbank3_dfii_pi0_wrdata4_w = soclinux_sdram_phaseinjector0_wrdata_storage[39:32]; |
| assign csrbank3_dfii_pi0_wrdata3_w = soclinux_sdram_phaseinjector0_wrdata_storage[31:24]; |
| assign csrbank3_dfii_pi0_wrdata2_w = soclinux_sdram_phaseinjector0_wrdata_storage[23:16]; |
| assign csrbank3_dfii_pi0_wrdata1_w = soclinux_sdram_phaseinjector0_wrdata_storage[15:8]; |
| assign csrbank3_dfii_pi0_wrdata0_w = soclinux_sdram_phaseinjector0_wrdata_storage[7:0]; |
| assign csrbank3_dfii_pi0_rddata7_w = soclinux_sdram_phaseinjector0_status[63:56]; |
| assign csrbank3_dfii_pi0_rddata6_w = soclinux_sdram_phaseinjector0_status[55:48]; |
| assign csrbank3_dfii_pi0_rddata5_w = soclinux_sdram_phaseinjector0_status[47:40]; |
| assign csrbank3_dfii_pi0_rddata4_w = soclinux_sdram_phaseinjector0_status[39:32]; |
| assign csrbank3_dfii_pi0_rddata3_w = soclinux_sdram_phaseinjector0_status[31:24]; |
| assign csrbank3_dfii_pi0_rddata2_w = soclinux_sdram_phaseinjector0_status[23:16]; |
| assign csrbank3_dfii_pi0_rddata1_w = soclinux_sdram_phaseinjector0_status[15:8]; |
| assign csrbank3_dfii_pi0_rddata0_w = soclinux_sdram_phaseinjector0_status[7:0]; |
| assign soclinux_sdram_phaseinjector0_we = csrbank3_dfii_pi0_rddata0_we; |
| assign csrbank3_dfii_pi1_command0_w = soclinux_sdram_phaseinjector1_command_storage[5:0]; |
| assign csrbank3_dfii_pi1_address1_w = soclinux_sdram_phaseinjector1_address_storage[14:8]; |
| assign csrbank3_dfii_pi1_address0_w = soclinux_sdram_phaseinjector1_address_storage[7:0]; |
| assign csrbank3_dfii_pi1_baddress0_w = soclinux_sdram_phaseinjector1_baddress_storage[3:0]; |
| assign csrbank3_dfii_pi1_wrdata7_w = soclinux_sdram_phaseinjector1_wrdata_storage[63:56]; |
| assign csrbank3_dfii_pi1_wrdata6_w = soclinux_sdram_phaseinjector1_wrdata_storage[55:48]; |
| assign csrbank3_dfii_pi1_wrdata5_w = soclinux_sdram_phaseinjector1_wrdata_storage[47:40]; |
| assign csrbank3_dfii_pi1_wrdata4_w = soclinux_sdram_phaseinjector1_wrdata_storage[39:32]; |
| assign csrbank3_dfii_pi1_wrdata3_w = soclinux_sdram_phaseinjector1_wrdata_storage[31:24]; |
| assign csrbank3_dfii_pi1_wrdata2_w = soclinux_sdram_phaseinjector1_wrdata_storage[23:16]; |
| assign csrbank3_dfii_pi1_wrdata1_w = soclinux_sdram_phaseinjector1_wrdata_storage[15:8]; |
| assign csrbank3_dfii_pi1_wrdata0_w = soclinux_sdram_phaseinjector1_wrdata_storage[7:0]; |
| assign csrbank3_dfii_pi1_rddata7_w = soclinux_sdram_phaseinjector1_status[63:56]; |
| assign csrbank3_dfii_pi1_rddata6_w = soclinux_sdram_phaseinjector1_status[55:48]; |
| assign csrbank3_dfii_pi1_rddata5_w = soclinux_sdram_phaseinjector1_status[47:40]; |
| assign csrbank3_dfii_pi1_rddata4_w = soclinux_sdram_phaseinjector1_status[39:32]; |
| assign csrbank3_dfii_pi1_rddata3_w = soclinux_sdram_phaseinjector1_status[31:24]; |
| assign csrbank3_dfii_pi1_rddata2_w = soclinux_sdram_phaseinjector1_status[23:16]; |
| assign csrbank3_dfii_pi1_rddata1_w = soclinux_sdram_phaseinjector1_status[15:8]; |
| assign csrbank3_dfii_pi1_rddata0_w = soclinux_sdram_phaseinjector1_status[7:0]; |
| assign soclinux_sdram_phaseinjector1_we = csrbank3_dfii_pi1_rddata0_we; |
| assign csrbank3_dfii_pi2_command0_w = soclinux_sdram_phaseinjector2_command_storage[5:0]; |
| assign csrbank3_dfii_pi2_address1_w = soclinux_sdram_phaseinjector2_address_storage[14:8]; |
| assign csrbank3_dfii_pi2_address0_w = soclinux_sdram_phaseinjector2_address_storage[7:0]; |
| assign csrbank3_dfii_pi2_baddress0_w = soclinux_sdram_phaseinjector2_baddress_storage[3:0]; |
| assign csrbank3_dfii_pi2_wrdata7_w = soclinux_sdram_phaseinjector2_wrdata_storage[63:56]; |
| assign csrbank3_dfii_pi2_wrdata6_w = soclinux_sdram_phaseinjector2_wrdata_storage[55:48]; |
| assign csrbank3_dfii_pi2_wrdata5_w = soclinux_sdram_phaseinjector2_wrdata_storage[47:40]; |
| assign csrbank3_dfii_pi2_wrdata4_w = soclinux_sdram_phaseinjector2_wrdata_storage[39:32]; |
| assign csrbank3_dfii_pi2_wrdata3_w = soclinux_sdram_phaseinjector2_wrdata_storage[31:24]; |
| assign csrbank3_dfii_pi2_wrdata2_w = soclinux_sdram_phaseinjector2_wrdata_storage[23:16]; |
| assign csrbank3_dfii_pi2_wrdata1_w = soclinux_sdram_phaseinjector2_wrdata_storage[15:8]; |
| assign csrbank3_dfii_pi2_wrdata0_w = soclinux_sdram_phaseinjector2_wrdata_storage[7:0]; |
| assign csrbank3_dfii_pi2_rddata7_w = soclinux_sdram_phaseinjector2_status[63:56]; |
| assign csrbank3_dfii_pi2_rddata6_w = soclinux_sdram_phaseinjector2_status[55:48]; |
| assign csrbank3_dfii_pi2_rddata5_w = soclinux_sdram_phaseinjector2_status[47:40]; |
| assign csrbank3_dfii_pi2_rddata4_w = soclinux_sdram_phaseinjector2_status[39:32]; |
| assign csrbank3_dfii_pi2_rddata3_w = soclinux_sdram_phaseinjector2_status[31:24]; |
| assign csrbank3_dfii_pi2_rddata2_w = soclinux_sdram_phaseinjector2_status[23:16]; |
| assign csrbank3_dfii_pi2_rddata1_w = soclinux_sdram_phaseinjector2_status[15:8]; |
| assign csrbank3_dfii_pi2_rddata0_w = soclinux_sdram_phaseinjector2_status[7:0]; |
| assign soclinux_sdram_phaseinjector2_we = csrbank3_dfii_pi2_rddata0_we; |
| assign csrbank3_dfii_pi3_command0_w = soclinux_sdram_phaseinjector3_command_storage[5:0]; |
| assign csrbank3_dfii_pi3_address1_w = soclinux_sdram_phaseinjector3_address_storage[14:8]; |
| assign csrbank3_dfii_pi3_address0_w = soclinux_sdram_phaseinjector3_address_storage[7:0]; |
| assign csrbank3_dfii_pi3_baddress0_w = soclinux_sdram_phaseinjector3_baddress_storage[3:0]; |
| assign csrbank3_dfii_pi3_wrdata7_w = soclinux_sdram_phaseinjector3_wrdata_storage[63:56]; |
| assign csrbank3_dfii_pi3_wrdata6_w = soclinux_sdram_phaseinjector3_wrdata_storage[55:48]; |
| assign csrbank3_dfii_pi3_wrdata5_w = soclinux_sdram_phaseinjector3_wrdata_storage[47:40]; |
| assign csrbank3_dfii_pi3_wrdata4_w = soclinux_sdram_phaseinjector3_wrdata_storage[39:32]; |
| assign csrbank3_dfii_pi3_wrdata3_w = soclinux_sdram_phaseinjector3_wrdata_storage[31:24]; |
| assign csrbank3_dfii_pi3_wrdata2_w = soclinux_sdram_phaseinjector3_wrdata_storage[23:16]; |
| assign csrbank3_dfii_pi3_wrdata1_w = soclinux_sdram_phaseinjector3_wrdata_storage[15:8]; |
| assign csrbank3_dfii_pi3_wrdata0_w = soclinux_sdram_phaseinjector3_wrdata_storage[7:0]; |
| assign csrbank3_dfii_pi3_rddata7_w = soclinux_sdram_phaseinjector3_status[63:56]; |
| assign csrbank3_dfii_pi3_rddata6_w = soclinux_sdram_phaseinjector3_status[55:48]; |
| assign csrbank3_dfii_pi3_rddata5_w = soclinux_sdram_phaseinjector3_status[47:40]; |
| assign csrbank3_dfii_pi3_rddata4_w = soclinux_sdram_phaseinjector3_status[39:32]; |
| assign csrbank3_dfii_pi3_rddata3_w = soclinux_sdram_phaseinjector3_status[31:24]; |
| assign csrbank3_dfii_pi3_rddata2_w = soclinux_sdram_phaseinjector3_status[23:16]; |
| assign csrbank3_dfii_pi3_rddata1_w = soclinux_sdram_phaseinjector3_status[15:8]; |
| assign csrbank3_dfii_pi3_rddata0_w = soclinux_sdram_phaseinjector3_status[7:0]; |
| assign soclinux_sdram_phaseinjector3_we = csrbank3_dfii_pi3_rddata0_we; |
| assign csrbank4_sel = (interface4_bank_bus_adr[13:9] == 2'd3); |
| assign csrbank4_load3_r = interface4_bank_bus_dat_w[7:0]; |
| assign csrbank4_load3_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 1'd0)); |
| assign csrbank4_load3_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 1'd0)); |
| assign csrbank4_load2_r = interface4_bank_bus_dat_w[7:0]; |
| assign csrbank4_load2_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 1'd1)); |
| assign csrbank4_load2_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 1'd1)); |
| assign csrbank4_load1_r = interface4_bank_bus_dat_w[7:0]; |
| assign csrbank4_load1_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 2'd2)); |
| assign csrbank4_load1_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 2'd2)); |
| assign csrbank4_load0_r = interface4_bank_bus_dat_w[7:0]; |
| assign csrbank4_load0_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 2'd3)); |
| assign csrbank4_load0_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 2'd3)); |
| assign csrbank4_reload3_r = interface4_bank_bus_dat_w[7:0]; |
| assign csrbank4_reload3_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 3'd4)); |
| assign csrbank4_reload3_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 3'd4)); |
| assign csrbank4_reload2_r = interface4_bank_bus_dat_w[7:0]; |
| assign csrbank4_reload2_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 3'd5)); |
| assign csrbank4_reload2_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 3'd5)); |
| assign csrbank4_reload1_r = interface4_bank_bus_dat_w[7:0]; |
| assign csrbank4_reload1_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 3'd6)); |
| assign csrbank4_reload1_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 3'd6)); |
| assign csrbank4_reload0_r = interface4_bank_bus_dat_w[7:0]; |
| assign csrbank4_reload0_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 3'd7)); |
| assign csrbank4_reload0_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 3'd7)); |
| assign csrbank4_en0_r = interface4_bank_bus_dat_w[0]; |
| assign csrbank4_en0_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 4'd8)); |
| assign csrbank4_en0_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 4'd8)); |
| assign csrbank4_update_value0_r = interface4_bank_bus_dat_w[0]; |
| assign csrbank4_update_value0_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 4'd9)); |
| assign csrbank4_update_value0_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 4'd9)); |
| assign csrbank4_value3_r = interface4_bank_bus_dat_w[7:0]; |
| assign csrbank4_value3_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 4'd10)); |
| assign csrbank4_value3_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 4'd10)); |
| assign csrbank4_value2_r = interface4_bank_bus_dat_w[7:0]; |
| assign csrbank4_value2_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 4'd11)); |
| assign csrbank4_value2_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 4'd11)); |
| assign csrbank4_value1_r = interface4_bank_bus_dat_w[7:0]; |
| assign csrbank4_value1_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 4'd12)); |
| assign csrbank4_value1_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 4'd12)); |
| assign csrbank4_value0_r = interface4_bank_bus_dat_w[7:0]; |
| assign csrbank4_value0_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 4'd13)); |
| assign csrbank4_value0_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 4'd13)); |
| assign soclinux_soclinux_timer_eventmanager_status_r = interface4_bank_bus_dat_w[0]; |
| assign soclinux_soclinux_timer_eventmanager_status_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 4'd14)); |
| assign soclinux_soclinux_timer_eventmanager_status_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 4'd14)); |
| assign soclinux_soclinux_timer_eventmanager_pending_r = interface4_bank_bus_dat_w[0]; |
| assign soclinux_soclinux_timer_eventmanager_pending_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 4'd15)); |
| assign soclinux_soclinux_timer_eventmanager_pending_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 4'd15)); |
| assign csrbank4_ev_enable0_r = interface4_bank_bus_dat_w[0]; |
| assign csrbank4_ev_enable0_re = ((csrbank4_sel & interface4_bank_bus_we) & (interface4_bank_bus_adr[4:0] == 5'd16)); |
| assign csrbank4_ev_enable0_we = ((csrbank4_sel & (~interface4_bank_bus_we)) & (interface4_bank_bus_adr[4:0] == 5'd16)); |
| assign csrbank4_load3_w = soclinux_soclinux_timer_load_storage[31:24]; |
| assign csrbank4_load2_w = soclinux_soclinux_timer_load_storage[23:16]; |
| assign csrbank4_load1_w = soclinux_soclinux_timer_load_storage[15:8]; |
| assign csrbank4_load0_w = soclinux_soclinux_timer_load_storage[7:0]; |
| assign csrbank4_reload3_w = soclinux_soclinux_timer_reload_storage[31:24]; |
| assign csrbank4_reload2_w = soclinux_soclinux_timer_reload_storage[23:16]; |
| assign csrbank4_reload1_w = soclinux_soclinux_timer_reload_storage[15:8]; |
| assign csrbank4_reload0_w = soclinux_soclinux_timer_reload_storage[7:0]; |
| assign csrbank4_en0_w = soclinux_soclinux_timer_en_storage; |
| assign csrbank4_update_value0_w = soclinux_soclinux_timer_update_value_storage; |
| assign csrbank4_value3_w = soclinux_soclinux_timer_value_status[31:24]; |
| assign csrbank4_value2_w = soclinux_soclinux_timer_value_status[23:16]; |
| assign csrbank4_value1_w = soclinux_soclinux_timer_value_status[15:8]; |
| assign csrbank4_value0_w = soclinux_soclinux_timer_value_status[7:0]; |
| assign soclinux_soclinux_timer_value_we = csrbank4_value0_we; |
| assign csrbank4_ev_enable0_w = soclinux_soclinux_timer_eventmanager_storage; |
| assign csrbank5_sel = (interface5_bank_bus_adr[13:9] == 2'd2); |
| assign soclinux_soclinux_uart_rxtx_r = interface5_bank_bus_dat_w[7:0]; |
| assign soclinux_soclinux_uart_rxtx_re = ((csrbank5_sel & interface5_bank_bus_we) & (interface5_bank_bus_adr[2:0] == 1'd0)); |
| assign soclinux_soclinux_uart_rxtx_we = ((csrbank5_sel & (~interface5_bank_bus_we)) & (interface5_bank_bus_adr[2:0] == 1'd0)); |
| assign csrbank5_txfull_r = interface5_bank_bus_dat_w[0]; |
| assign csrbank5_txfull_re = ((csrbank5_sel & interface5_bank_bus_we) & (interface5_bank_bus_adr[2:0] == 1'd1)); |
| assign csrbank5_txfull_we = ((csrbank5_sel & (~interface5_bank_bus_we)) & (interface5_bank_bus_adr[2:0] == 1'd1)); |
| assign csrbank5_rxempty_r = interface5_bank_bus_dat_w[0]; |
| assign csrbank5_rxempty_re = ((csrbank5_sel & interface5_bank_bus_we) & (interface5_bank_bus_adr[2:0] == 2'd2)); |
| assign csrbank5_rxempty_we = ((csrbank5_sel & (~interface5_bank_bus_we)) & (interface5_bank_bus_adr[2:0] == 2'd2)); |
| assign soclinux_soclinux_uart_eventmanager_status_r = interface5_bank_bus_dat_w[1:0]; |
| assign soclinux_soclinux_uart_eventmanager_status_re = ((csrbank5_sel & interface5_bank_bus_we) & (interface5_bank_bus_adr[2:0] == 2'd3)); |
| assign soclinux_soclinux_uart_eventmanager_status_we = ((csrbank5_sel & (~interface5_bank_bus_we)) & (interface5_bank_bus_adr[2:0] == 2'd3)); |
| assign soclinux_soclinux_uart_eventmanager_pending_r = interface5_bank_bus_dat_w[1:0]; |
| assign soclinux_soclinux_uart_eventmanager_pending_re = ((csrbank5_sel & interface5_bank_bus_we) & (interface5_bank_bus_adr[2:0] == 3'd4)); |
| assign soclinux_soclinux_uart_eventmanager_pending_we = ((csrbank5_sel & (~interface5_bank_bus_we)) & (interface5_bank_bus_adr[2:0] == 3'd4)); |
| assign csrbank5_ev_enable0_r = interface5_bank_bus_dat_w[1:0]; |
| assign csrbank5_ev_enable0_re = ((csrbank5_sel & interface5_bank_bus_we) & (interface5_bank_bus_adr[2:0] == 3'd5)); |
| assign csrbank5_ev_enable0_we = ((csrbank5_sel & (~interface5_bank_bus_we)) & (interface5_bank_bus_adr[2:0] == 3'd5)); |
| assign csrbank5_txfull_w = soclinux_soclinux_uart_txfull_status; |
| assign soclinux_soclinux_uart_txfull_we = csrbank5_txfull_we; |
| assign csrbank5_rxempty_w = soclinux_soclinux_uart_rxempty_status; |
| assign soclinux_soclinux_uart_rxempty_we = csrbank5_rxempty_we; |
| assign csrbank5_ev_enable0_w = soclinux_soclinux_uart_eventmanager_storage[1:0]; |
| assign csrbank6_sel = (interface6_bank_bus_adr[13:9] == 3'd4); |
| assign csrbank6_tuning_word3_r = interface6_bank_bus_dat_w[7:0]; |
| assign csrbank6_tuning_word3_re = ((csrbank6_sel & interface6_bank_bus_we) & (interface6_bank_bus_adr[1:0] == 1'd0)); |
| assign csrbank6_tuning_word3_we = ((csrbank6_sel & (~interface6_bank_bus_we)) & (interface6_bank_bus_adr[1:0] == 1'd0)); |
| assign csrbank6_tuning_word2_r = interface6_bank_bus_dat_w[7:0]; |
| assign csrbank6_tuning_word2_re = ((csrbank6_sel & interface6_bank_bus_we) & (interface6_bank_bus_adr[1:0] == 1'd1)); |
| assign csrbank6_tuning_word2_we = ((csrbank6_sel & (~interface6_bank_bus_we)) & (interface6_bank_bus_adr[1:0] == 1'd1)); |
| assign csrbank6_tuning_word1_r = interface6_bank_bus_dat_w[7:0]; |
| assign csrbank6_tuning_word1_re = ((csrbank6_sel & interface6_bank_bus_we) & (interface6_bank_bus_adr[1:0] == 2'd2)); |
| assign csrbank6_tuning_word1_we = ((csrbank6_sel & (~interface6_bank_bus_we)) & (interface6_bank_bus_adr[1:0] == 2'd2)); |
| assign csrbank6_tuning_word0_r = interface6_bank_bus_dat_w[7:0]; |
| assign csrbank6_tuning_word0_re = ((csrbank6_sel & interface6_bank_bus_we) & (interface6_bank_bus_adr[1:0] == 2'd3)); |
| assign csrbank6_tuning_word0_we = ((csrbank6_sel & (~interface6_bank_bus_we)) & (interface6_bank_bus_adr[1:0] == 2'd3)); |
| assign csrbank6_tuning_word3_w = soclinux_soclinux_storage[31:24]; |
| assign csrbank6_tuning_word2_w = soclinux_soclinux_storage[23:16]; |
| assign csrbank6_tuning_word1_w = soclinux_soclinux_storage[15:8]; |
| assign csrbank6_tuning_word0_w = soclinux_soclinux_storage[7:0]; |
| assign adr = soclinux_soclinux_interface_adr; |
| assign we = soclinux_soclinux_interface_we; |
| assign dat_w = soclinux_soclinux_interface_dat_w; |
| assign soclinux_soclinux_interface_dat_r = dat_r; |
| assign interface0_bank_bus_adr = adr; |
| assign interface1_bank_bus_adr = adr; |
| assign interface2_bank_bus_adr = adr; |
| assign interface3_bank_bus_adr = adr; |
| assign interface4_bank_bus_adr = adr; |
| assign interface5_bank_bus_adr = adr; |
| assign interface6_bank_bus_adr = adr; |
| assign interface0_bank_bus_we = we; |
| assign interface1_bank_bus_we = we; |
| assign interface2_bank_bus_we = we; |
| assign interface3_bank_bus_we = we; |
| assign interface4_bank_bus_we = we; |
| assign interface5_bank_bus_we = we; |
| assign interface6_bank_bus_we = we; |
| assign interface0_bank_bus_dat_w = dat_w; |
| assign interface1_bank_bus_dat_w = dat_w; |
| assign interface2_bank_bus_dat_w = dat_w; |
| assign interface3_bank_bus_dat_w = dat_w; |
| assign interface4_bank_bus_dat_w = dat_w; |
| assign interface5_bank_bus_dat_w = dat_w; |
| assign interface6_bank_bus_dat_w = dat_w; |
| assign dat_r = ((((((interface0_bank_bus_dat_r | interface1_bank_bus_dat_r) | interface2_bank_bus_dat_r) | interface3_bank_bus_dat_r) | interface4_bank_bus_dat_r) | interface5_bank_bus_dat_r) | interface6_bank_bus_dat_r); |
| always @(*) begin |
| rhs_array_muxed0 <= 1'd0; |
| case (soclinux_sdram_choose_cmd_grant) |
| 1'd0: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[0]; |
| end |
| 1'd1: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[1]; |
| end |
| 2'd2: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[2]; |
| end |
| 2'd3: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[3]; |
| end |
| 3'd4: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[4]; |
| end |
| 3'd5: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[5]; |
| end |
| 3'd6: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[6]; |
| end |
| 3'd7: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[7]; |
| end |
| 4'd8: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[8]; |
| end |
| 4'd9: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[9]; |
| end |
| 4'd10: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[10]; |
| end |
| 4'd11: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[11]; |
| end |
| 4'd12: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[12]; |
| end |
| 4'd13: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[13]; |
| end |
| 4'd14: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[14]; |
| end |
| default: begin |
| rhs_array_muxed0 <= soclinux_sdram_choose_cmd_valids[15]; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed1 <= 15'd0; |
| case (soclinux_sdram_choose_cmd_grant) |
| 1'd0: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine0_cmd_payload_a; |
| end |
| 1'd1: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine1_cmd_payload_a; |
| end |
| 2'd2: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine2_cmd_payload_a; |
| end |
| 2'd3: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine3_cmd_payload_a; |
| end |
| 3'd4: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine4_cmd_payload_a; |
| end |
| 3'd5: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine5_cmd_payload_a; |
| end |
| 3'd6: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine6_cmd_payload_a; |
| end |
| 3'd7: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine7_cmd_payload_a; |
| end |
| 4'd8: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine8_cmd_payload_a; |
| end |
| 4'd9: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine9_cmd_payload_a; |
| end |
| 4'd10: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine10_cmd_payload_a; |
| end |
| 4'd11: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine11_cmd_payload_a; |
| end |
| 4'd12: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine12_cmd_payload_a; |
| end |
| 4'd13: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine13_cmd_payload_a; |
| end |
| 4'd14: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine14_cmd_payload_a; |
| end |
| default: begin |
| rhs_array_muxed1 <= soclinux_sdram_bankmachine15_cmd_payload_a; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed2 <= 4'd0; |
| case (soclinux_sdram_choose_cmd_grant) |
| 1'd0: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine0_cmd_payload_ba; |
| end |
| 1'd1: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine1_cmd_payload_ba; |
| end |
| 2'd2: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine2_cmd_payload_ba; |
| end |
| 2'd3: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine3_cmd_payload_ba; |
| end |
| 3'd4: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine4_cmd_payload_ba; |
| end |
| 3'd5: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine5_cmd_payload_ba; |
| end |
| 3'd6: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine6_cmd_payload_ba; |
| end |
| 3'd7: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine7_cmd_payload_ba; |
| end |
| 4'd8: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine8_cmd_payload_ba; |
| end |
| 4'd9: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine9_cmd_payload_ba; |
| end |
| 4'd10: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine10_cmd_payload_ba; |
| end |
| 4'd11: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine11_cmd_payload_ba; |
| end |
| 4'd12: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine12_cmd_payload_ba; |
| end |
| 4'd13: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine13_cmd_payload_ba; |
| end |
| 4'd14: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine14_cmd_payload_ba; |
| end |
| default: begin |
| rhs_array_muxed2 <= soclinux_sdram_bankmachine15_cmd_payload_ba; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed3 <= 1'd0; |
| case (soclinux_sdram_choose_cmd_grant) |
| 1'd0: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine0_cmd_payload_is_read; |
| end |
| 1'd1: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine1_cmd_payload_is_read; |
| end |
| 2'd2: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine2_cmd_payload_is_read; |
| end |
| 2'd3: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine3_cmd_payload_is_read; |
| end |
| 3'd4: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine4_cmd_payload_is_read; |
| end |
| 3'd5: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine5_cmd_payload_is_read; |
| end |
| 3'd6: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine6_cmd_payload_is_read; |
| end |
| 3'd7: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine7_cmd_payload_is_read; |
| end |
| 4'd8: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine8_cmd_payload_is_read; |
| end |
| 4'd9: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine9_cmd_payload_is_read; |
| end |
| 4'd10: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine10_cmd_payload_is_read; |
| end |
| 4'd11: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine11_cmd_payload_is_read; |
| end |
| 4'd12: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine12_cmd_payload_is_read; |
| end |
| 4'd13: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine13_cmd_payload_is_read; |
| end |
| 4'd14: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine14_cmd_payload_is_read; |
| end |
| default: begin |
| rhs_array_muxed3 <= soclinux_sdram_bankmachine15_cmd_payload_is_read; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed4 <= 1'd0; |
| case (soclinux_sdram_choose_cmd_grant) |
| 1'd0: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine0_cmd_payload_is_write; |
| end |
| 1'd1: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine1_cmd_payload_is_write; |
| end |
| 2'd2: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine2_cmd_payload_is_write; |
| end |
| 2'd3: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine3_cmd_payload_is_write; |
| end |
| 3'd4: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine4_cmd_payload_is_write; |
| end |
| 3'd5: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine5_cmd_payload_is_write; |
| end |
| 3'd6: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine6_cmd_payload_is_write; |
| end |
| 3'd7: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine7_cmd_payload_is_write; |
| end |
| 4'd8: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine8_cmd_payload_is_write; |
| end |
| 4'd9: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine9_cmd_payload_is_write; |
| end |
| 4'd10: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine10_cmd_payload_is_write; |
| end |
| 4'd11: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine11_cmd_payload_is_write; |
| end |
| 4'd12: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine12_cmd_payload_is_write; |
| end |
| 4'd13: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine13_cmd_payload_is_write; |
| end |
| 4'd14: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine14_cmd_payload_is_write; |
| end |
| default: begin |
| rhs_array_muxed4 <= soclinux_sdram_bankmachine15_cmd_payload_is_write; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed5 <= 1'd0; |
| case (soclinux_sdram_choose_cmd_grant) |
| 1'd0: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine0_cmd_payload_is_cmd; |
| end |
| 1'd1: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine1_cmd_payload_is_cmd; |
| end |
| 2'd2: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine2_cmd_payload_is_cmd; |
| end |
| 2'd3: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine3_cmd_payload_is_cmd; |
| end |
| 3'd4: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine4_cmd_payload_is_cmd; |
| end |
| 3'd5: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine5_cmd_payload_is_cmd; |
| end |
| 3'd6: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine6_cmd_payload_is_cmd; |
| end |
| 3'd7: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine7_cmd_payload_is_cmd; |
| end |
| 4'd8: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine8_cmd_payload_is_cmd; |
| end |
| 4'd9: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine9_cmd_payload_is_cmd; |
| end |
| 4'd10: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine10_cmd_payload_is_cmd; |
| end |
| 4'd11: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine11_cmd_payload_is_cmd; |
| end |
| 4'd12: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine12_cmd_payload_is_cmd; |
| end |
| 4'd13: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine13_cmd_payload_is_cmd; |
| end |
| 4'd14: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine14_cmd_payload_is_cmd; |
| end |
| default: begin |
| rhs_array_muxed5 <= soclinux_sdram_bankmachine15_cmd_payload_is_cmd; |
| end |
| endcase |
| end |
| always @(*) begin |
| t_array_muxed0 <= 1'd0; |
| case (soclinux_sdram_choose_cmd_grant) |
| 1'd0: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine0_cmd_payload_cas; |
| end |
| 1'd1: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine1_cmd_payload_cas; |
| end |
| 2'd2: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine2_cmd_payload_cas; |
| end |
| 2'd3: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine3_cmd_payload_cas; |
| end |
| 3'd4: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine4_cmd_payload_cas; |
| end |
| 3'd5: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine5_cmd_payload_cas; |
| end |
| 3'd6: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine6_cmd_payload_cas; |
| end |
| 3'd7: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine7_cmd_payload_cas; |
| end |
| 4'd8: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine8_cmd_payload_cas; |
| end |
| 4'd9: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine9_cmd_payload_cas; |
| end |
| 4'd10: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine10_cmd_payload_cas; |
| end |
| 4'd11: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine11_cmd_payload_cas; |
| end |
| 4'd12: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine12_cmd_payload_cas; |
| end |
| 4'd13: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine13_cmd_payload_cas; |
| end |
| 4'd14: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine14_cmd_payload_cas; |
| end |
| default: begin |
| t_array_muxed0 <= soclinux_sdram_bankmachine15_cmd_payload_cas; |
| end |
| endcase |
| end |
| always @(*) begin |
| t_array_muxed1 <= 1'd0; |
| case (soclinux_sdram_choose_cmd_grant) |
| 1'd0: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine0_cmd_payload_ras; |
| end |
| 1'd1: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine1_cmd_payload_ras; |
| end |
| 2'd2: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine2_cmd_payload_ras; |
| end |
| 2'd3: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine3_cmd_payload_ras; |
| end |
| 3'd4: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine4_cmd_payload_ras; |
| end |
| 3'd5: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine5_cmd_payload_ras; |
| end |
| 3'd6: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine6_cmd_payload_ras; |
| end |
| 3'd7: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine7_cmd_payload_ras; |
| end |
| 4'd8: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine8_cmd_payload_ras; |
| end |
| 4'd9: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine9_cmd_payload_ras; |
| end |
| 4'd10: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine10_cmd_payload_ras; |
| end |
| 4'd11: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine11_cmd_payload_ras; |
| end |
| 4'd12: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine12_cmd_payload_ras; |
| end |
| 4'd13: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine13_cmd_payload_ras; |
| end |
| 4'd14: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine14_cmd_payload_ras; |
| end |
| default: begin |
| t_array_muxed1 <= soclinux_sdram_bankmachine15_cmd_payload_ras; |
| end |
| endcase |
| end |
| always @(*) begin |
| t_array_muxed2 <= 1'd0; |
| case (soclinux_sdram_choose_cmd_grant) |
| 1'd0: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine0_cmd_payload_we; |
| end |
| 1'd1: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine1_cmd_payload_we; |
| end |
| 2'd2: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine2_cmd_payload_we; |
| end |
| 2'd3: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine3_cmd_payload_we; |
| end |
| 3'd4: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine4_cmd_payload_we; |
| end |
| 3'd5: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine5_cmd_payload_we; |
| end |
| 3'd6: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine6_cmd_payload_we; |
| end |
| 3'd7: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine7_cmd_payload_we; |
| end |
| 4'd8: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine8_cmd_payload_we; |
| end |
| 4'd9: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine9_cmd_payload_we; |
| end |
| 4'd10: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine10_cmd_payload_we; |
| end |
| 4'd11: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine11_cmd_payload_we; |
| end |
| 4'd12: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine12_cmd_payload_we; |
| end |
| 4'd13: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine13_cmd_payload_we; |
| end |
| 4'd14: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine14_cmd_payload_we; |
| end |
| default: begin |
| t_array_muxed2 <= soclinux_sdram_bankmachine15_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed6 <= 1'd0; |
| case (soclinux_sdram_choose_req_grant) |
| 1'd0: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[0]; |
| end |
| 1'd1: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[1]; |
| end |
| 2'd2: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[2]; |
| end |
| 2'd3: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[3]; |
| end |
| 3'd4: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[4]; |
| end |
| 3'd5: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[5]; |
| end |
| 3'd6: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[6]; |
| end |
| 3'd7: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[7]; |
| end |
| 4'd8: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[8]; |
| end |
| 4'd9: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[9]; |
| end |
| 4'd10: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[10]; |
| end |
| 4'd11: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[11]; |
| end |
| 4'd12: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[12]; |
| end |
| 4'd13: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[13]; |
| end |
| 4'd14: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[14]; |
| end |
| default: begin |
| rhs_array_muxed6 <= soclinux_sdram_choose_req_valids[15]; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed7 <= 15'd0; |
| case (soclinux_sdram_choose_req_grant) |
| 1'd0: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine0_cmd_payload_a; |
| end |
| 1'd1: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine1_cmd_payload_a; |
| end |
| 2'd2: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine2_cmd_payload_a; |
| end |
| 2'd3: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine3_cmd_payload_a; |
| end |
| 3'd4: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine4_cmd_payload_a; |
| end |
| 3'd5: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine5_cmd_payload_a; |
| end |
| 3'd6: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine6_cmd_payload_a; |
| end |
| 3'd7: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine7_cmd_payload_a; |
| end |
| 4'd8: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine8_cmd_payload_a; |
| end |
| 4'd9: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine9_cmd_payload_a; |
| end |
| 4'd10: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine10_cmd_payload_a; |
| end |
| 4'd11: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine11_cmd_payload_a; |
| end |
| 4'd12: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine12_cmd_payload_a; |
| end |
| 4'd13: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine13_cmd_payload_a; |
| end |
| 4'd14: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine14_cmd_payload_a; |
| end |
| default: begin |
| rhs_array_muxed7 <= soclinux_sdram_bankmachine15_cmd_payload_a; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed8 <= 4'd0; |
| case (soclinux_sdram_choose_req_grant) |
| 1'd0: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine0_cmd_payload_ba; |
| end |
| 1'd1: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine1_cmd_payload_ba; |
| end |
| 2'd2: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine2_cmd_payload_ba; |
| end |
| 2'd3: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine3_cmd_payload_ba; |
| end |
| 3'd4: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine4_cmd_payload_ba; |
| end |
| 3'd5: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine5_cmd_payload_ba; |
| end |
| 3'd6: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine6_cmd_payload_ba; |
| end |
| 3'd7: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine7_cmd_payload_ba; |
| end |
| 4'd8: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine8_cmd_payload_ba; |
| end |
| 4'd9: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine9_cmd_payload_ba; |
| end |
| 4'd10: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine10_cmd_payload_ba; |
| end |
| 4'd11: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine11_cmd_payload_ba; |
| end |
| 4'd12: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine12_cmd_payload_ba; |
| end |
| 4'd13: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine13_cmd_payload_ba; |
| end |
| 4'd14: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine14_cmd_payload_ba; |
| end |
| default: begin |
| rhs_array_muxed8 <= soclinux_sdram_bankmachine15_cmd_payload_ba; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed9 <= 1'd0; |
| case (soclinux_sdram_choose_req_grant) |
| 1'd0: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine0_cmd_payload_is_read; |
| end |
| 1'd1: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine1_cmd_payload_is_read; |
| end |
| 2'd2: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine2_cmd_payload_is_read; |
| end |
| 2'd3: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine3_cmd_payload_is_read; |
| end |
| 3'd4: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine4_cmd_payload_is_read; |
| end |
| 3'd5: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine5_cmd_payload_is_read; |
| end |
| 3'd6: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine6_cmd_payload_is_read; |
| end |
| 3'd7: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine7_cmd_payload_is_read; |
| end |
| 4'd8: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine8_cmd_payload_is_read; |
| end |
| 4'd9: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine9_cmd_payload_is_read; |
| end |
| 4'd10: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine10_cmd_payload_is_read; |
| end |
| 4'd11: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine11_cmd_payload_is_read; |
| end |
| 4'd12: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine12_cmd_payload_is_read; |
| end |
| 4'd13: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine13_cmd_payload_is_read; |
| end |
| 4'd14: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine14_cmd_payload_is_read; |
| end |
| default: begin |
| rhs_array_muxed9 <= soclinux_sdram_bankmachine15_cmd_payload_is_read; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed10 <= 1'd0; |
| case (soclinux_sdram_choose_req_grant) |
| 1'd0: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine0_cmd_payload_is_write; |
| end |
| 1'd1: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine1_cmd_payload_is_write; |
| end |
| 2'd2: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine2_cmd_payload_is_write; |
| end |
| 2'd3: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine3_cmd_payload_is_write; |
| end |
| 3'd4: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine4_cmd_payload_is_write; |
| end |
| 3'd5: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine5_cmd_payload_is_write; |
| end |
| 3'd6: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine6_cmd_payload_is_write; |
| end |
| 3'd7: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine7_cmd_payload_is_write; |
| end |
| 4'd8: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine8_cmd_payload_is_write; |
| end |
| 4'd9: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine9_cmd_payload_is_write; |
| end |
| 4'd10: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine10_cmd_payload_is_write; |
| end |
| 4'd11: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine11_cmd_payload_is_write; |
| end |
| 4'd12: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine12_cmd_payload_is_write; |
| end |
| 4'd13: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine13_cmd_payload_is_write; |
| end |
| 4'd14: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine14_cmd_payload_is_write; |
| end |
| default: begin |
| rhs_array_muxed10 <= soclinux_sdram_bankmachine15_cmd_payload_is_write; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed11 <= 1'd0; |
| case (soclinux_sdram_choose_req_grant) |
| 1'd0: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine0_cmd_payload_is_cmd; |
| end |
| 1'd1: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine1_cmd_payload_is_cmd; |
| end |
| 2'd2: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine2_cmd_payload_is_cmd; |
| end |
| 2'd3: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine3_cmd_payload_is_cmd; |
| end |
| 3'd4: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine4_cmd_payload_is_cmd; |
| end |
| 3'd5: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine5_cmd_payload_is_cmd; |
| end |
| 3'd6: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine6_cmd_payload_is_cmd; |
| end |
| 3'd7: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine7_cmd_payload_is_cmd; |
| end |
| 4'd8: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine8_cmd_payload_is_cmd; |
| end |
| 4'd9: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine9_cmd_payload_is_cmd; |
| end |
| 4'd10: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine10_cmd_payload_is_cmd; |
| end |
| 4'd11: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine11_cmd_payload_is_cmd; |
| end |
| 4'd12: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine12_cmd_payload_is_cmd; |
| end |
| 4'd13: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine13_cmd_payload_is_cmd; |
| end |
| 4'd14: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine14_cmd_payload_is_cmd; |
| end |
| default: begin |
| rhs_array_muxed11 <= soclinux_sdram_bankmachine15_cmd_payload_is_cmd; |
| end |
| endcase |
| end |
| always @(*) begin |
| t_array_muxed3 <= 1'd0; |
| case (soclinux_sdram_choose_req_grant) |
| 1'd0: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine0_cmd_payload_cas; |
| end |
| 1'd1: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine1_cmd_payload_cas; |
| end |
| 2'd2: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine2_cmd_payload_cas; |
| end |
| 2'd3: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine3_cmd_payload_cas; |
| end |
| 3'd4: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine4_cmd_payload_cas; |
| end |
| 3'd5: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine5_cmd_payload_cas; |
| end |
| 3'd6: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine6_cmd_payload_cas; |
| end |
| 3'd7: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine7_cmd_payload_cas; |
| end |
| 4'd8: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine8_cmd_payload_cas; |
| end |
| 4'd9: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine9_cmd_payload_cas; |
| end |
| 4'd10: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine10_cmd_payload_cas; |
| end |
| 4'd11: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine11_cmd_payload_cas; |
| end |
| 4'd12: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine12_cmd_payload_cas; |
| end |
| 4'd13: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine13_cmd_payload_cas; |
| end |
| 4'd14: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine14_cmd_payload_cas; |
| end |
| default: begin |
| t_array_muxed3 <= soclinux_sdram_bankmachine15_cmd_payload_cas; |
| end |
| endcase |
| end |
| always @(*) begin |
| t_array_muxed4 <= 1'd0; |
| case (soclinux_sdram_choose_req_grant) |
| 1'd0: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine0_cmd_payload_ras; |
| end |
| 1'd1: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine1_cmd_payload_ras; |
| end |
| 2'd2: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine2_cmd_payload_ras; |
| end |
| 2'd3: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine3_cmd_payload_ras; |
| end |
| 3'd4: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine4_cmd_payload_ras; |
| end |
| 3'd5: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine5_cmd_payload_ras; |
| end |
| 3'd6: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine6_cmd_payload_ras; |
| end |
| 3'd7: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine7_cmd_payload_ras; |
| end |
| 4'd8: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine8_cmd_payload_ras; |
| end |
| 4'd9: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine9_cmd_payload_ras; |
| end |
| 4'd10: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine10_cmd_payload_ras; |
| end |
| 4'd11: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine11_cmd_payload_ras; |
| end |
| 4'd12: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine12_cmd_payload_ras; |
| end |
| 4'd13: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine13_cmd_payload_ras; |
| end |
| 4'd14: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine14_cmd_payload_ras; |
| end |
| default: begin |
| t_array_muxed4 <= soclinux_sdram_bankmachine15_cmd_payload_ras; |
| end |
| endcase |
| end |
| always @(*) begin |
| t_array_muxed5 <= 1'd0; |
| case (soclinux_sdram_choose_req_grant) |
| 1'd0: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine0_cmd_payload_we; |
| end |
| 1'd1: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine1_cmd_payload_we; |
| end |
| 2'd2: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine2_cmd_payload_we; |
| end |
| 2'd3: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine3_cmd_payload_we; |
| end |
| 3'd4: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine4_cmd_payload_we; |
| end |
| 3'd5: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine5_cmd_payload_we; |
| end |
| 3'd6: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine6_cmd_payload_we; |
| end |
| 3'd7: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine7_cmd_payload_we; |
| end |
| 4'd8: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine8_cmd_payload_we; |
| end |
| 4'd9: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine9_cmd_payload_we; |
| end |
| 4'd10: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine10_cmd_payload_we; |
| end |
| 4'd11: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine11_cmd_payload_we; |
| end |
| 4'd12: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine12_cmd_payload_we; |
| end |
| 4'd13: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine13_cmd_payload_we; |
| end |
| 4'd14: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine14_cmd_payload_we; |
| end |
| default: begin |
| t_array_muxed5 <= soclinux_sdram_bankmachine15_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed12 <= 22'd0; |
| case (roundrobin0_grant) |
| default: begin |
| rhs_array_muxed12 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed13 <= 1'd0; |
| case (roundrobin0_grant) |
| default: begin |
| rhs_array_muxed13 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed14 <= 1'd0; |
| case (roundrobin0_grant) |
| default: begin |
| rhs_array_muxed14 <= (((soclinux_port_cmd_payload_addr[10:7] == 1'd0) & (~(((((((((((((((locked0 | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed15 <= 22'd0; |
| case (roundrobin1_grant) |
| default: begin |
| rhs_array_muxed15 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed16 <= 1'd0; |
| case (roundrobin1_grant) |
| default: begin |
| rhs_array_muxed16 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed17 <= 1'd0; |
| case (roundrobin1_grant) |
| default: begin |
| rhs_array_muxed17 <= (((soclinux_port_cmd_payload_addr[10:7] == 1'd1) & (~(((((((((((((((locked1 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed18 <= 22'd0; |
| case (roundrobin2_grant) |
| default: begin |
| rhs_array_muxed18 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed19 <= 1'd0; |
| case (roundrobin2_grant) |
| default: begin |
| rhs_array_muxed19 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed20 <= 1'd0; |
| case (roundrobin2_grant) |
| default: begin |
| rhs_array_muxed20 <= (((soclinux_port_cmd_payload_addr[10:7] == 2'd2) & (~(((((((((((((((locked2 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed21 <= 22'd0; |
| case (roundrobin3_grant) |
| default: begin |
| rhs_array_muxed21 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed22 <= 1'd0; |
| case (roundrobin3_grant) |
| default: begin |
| rhs_array_muxed22 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed23 <= 1'd0; |
| case (roundrobin3_grant) |
| default: begin |
| rhs_array_muxed23 <= (((soclinux_port_cmd_payload_addr[10:7] == 2'd3) & (~(((((((((((((((locked3 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed24 <= 22'd0; |
| case (roundrobin4_grant) |
| default: begin |
| rhs_array_muxed24 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed25 <= 1'd0; |
| case (roundrobin4_grant) |
| default: begin |
| rhs_array_muxed25 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed26 <= 1'd0; |
| case (roundrobin4_grant) |
| default: begin |
| rhs_array_muxed26 <= (((soclinux_port_cmd_payload_addr[10:7] == 3'd4) & (~(((((((((((((((locked4 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed27 <= 22'd0; |
| case (roundrobin5_grant) |
| default: begin |
| rhs_array_muxed27 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed28 <= 1'd0; |
| case (roundrobin5_grant) |
| default: begin |
| rhs_array_muxed28 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed29 <= 1'd0; |
| case (roundrobin5_grant) |
| default: begin |
| rhs_array_muxed29 <= (((soclinux_port_cmd_payload_addr[10:7] == 3'd5) & (~(((((((((((((((locked5 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed30 <= 22'd0; |
| case (roundrobin6_grant) |
| default: begin |
| rhs_array_muxed30 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed31 <= 1'd0; |
| case (roundrobin6_grant) |
| default: begin |
| rhs_array_muxed31 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed32 <= 1'd0; |
| case (roundrobin6_grant) |
| default: begin |
| rhs_array_muxed32 <= (((soclinux_port_cmd_payload_addr[10:7] == 3'd6) & (~(((((((((((((((locked6 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed33 <= 22'd0; |
| case (roundrobin7_grant) |
| default: begin |
| rhs_array_muxed33 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed34 <= 1'd0; |
| case (roundrobin7_grant) |
| default: begin |
| rhs_array_muxed34 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed35 <= 1'd0; |
| case (roundrobin7_grant) |
| default: begin |
| rhs_array_muxed35 <= (((soclinux_port_cmd_payload_addr[10:7] == 3'd7) & (~(((((((((((((((locked7 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed36 <= 22'd0; |
| case (roundrobin8_grant) |
| default: begin |
| rhs_array_muxed36 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed37 <= 1'd0; |
| case (roundrobin8_grant) |
| default: begin |
| rhs_array_muxed37 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed38 <= 1'd0; |
| case (roundrobin8_grant) |
| default: begin |
| rhs_array_muxed38 <= (((soclinux_port_cmd_payload_addr[10:7] == 4'd8) & (~(((((((((((((((locked8 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed39 <= 22'd0; |
| case (roundrobin9_grant) |
| default: begin |
| rhs_array_muxed39 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed40 <= 1'd0; |
| case (roundrobin9_grant) |
| default: begin |
| rhs_array_muxed40 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed41 <= 1'd0; |
| case (roundrobin9_grant) |
| default: begin |
| rhs_array_muxed41 <= (((soclinux_port_cmd_payload_addr[10:7] == 4'd9) & (~(((((((((((((((locked9 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed42 <= 22'd0; |
| case (roundrobin10_grant) |
| default: begin |
| rhs_array_muxed42 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed43 <= 1'd0; |
| case (roundrobin10_grant) |
| default: begin |
| rhs_array_muxed43 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed44 <= 1'd0; |
| case (roundrobin10_grant) |
| default: begin |
| rhs_array_muxed44 <= (((soclinux_port_cmd_payload_addr[10:7] == 4'd10) & (~(((((((((((((((locked10 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed45 <= 22'd0; |
| case (roundrobin11_grant) |
| default: begin |
| rhs_array_muxed45 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed46 <= 1'd0; |
| case (roundrobin11_grant) |
| default: begin |
| rhs_array_muxed46 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed47 <= 1'd0; |
| case (roundrobin11_grant) |
| default: begin |
| rhs_array_muxed47 <= (((soclinux_port_cmd_payload_addr[10:7] == 4'd11) & (~(((((((((((((((locked11 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed48 <= 22'd0; |
| case (roundrobin12_grant) |
| default: begin |
| rhs_array_muxed48 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed49 <= 1'd0; |
| case (roundrobin12_grant) |
| default: begin |
| rhs_array_muxed49 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed50 <= 1'd0; |
| case (roundrobin12_grant) |
| default: begin |
| rhs_array_muxed50 <= (((soclinux_port_cmd_payload_addr[10:7] == 4'd12) & (~(((((((((((((((locked12 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed51 <= 22'd0; |
| case (roundrobin13_grant) |
| default: begin |
| rhs_array_muxed51 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed52 <= 1'd0; |
| case (roundrobin13_grant) |
| default: begin |
| rhs_array_muxed52 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed53 <= 1'd0; |
| case (roundrobin13_grant) |
| default: begin |
| rhs_array_muxed53 <= (((soclinux_port_cmd_payload_addr[10:7] == 4'd13) & (~(((((((((((((((locked13 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed54 <= 22'd0; |
| case (roundrobin14_grant) |
| default: begin |
| rhs_array_muxed54 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed55 <= 1'd0; |
| case (roundrobin14_grant) |
| default: begin |
| rhs_array_muxed55 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed56 <= 1'd0; |
| case (roundrobin14_grant) |
| default: begin |
| rhs_array_muxed56 <= (((soclinux_port_cmd_payload_addr[10:7] == 4'd14) & (~(((((((((((((((locked14 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank15_lock & (roundrobin15_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed57 <= 22'd0; |
| case (roundrobin15_grant) |
| default: begin |
| rhs_array_muxed57 <= {soclinux_port_cmd_payload_addr[25:11], soclinux_port_cmd_payload_addr[6:0]}; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed58 <= 1'd0; |
| case (roundrobin15_grant) |
| default: begin |
| rhs_array_muxed58 <= soclinux_port_cmd_payload_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed59 <= 1'd0; |
| case (roundrobin15_grant) |
| default: begin |
| rhs_array_muxed59 <= (((soclinux_port_cmd_payload_addr[10:7] == 4'd15) & (~(((((((((((((((locked15 | (soclinux_sdram_interface_bank0_lock & (roundrobin0_grant == 1'd0))) | (soclinux_sdram_interface_bank1_lock & (roundrobin1_grant == 1'd0))) | (soclinux_sdram_interface_bank2_lock & (roundrobin2_grant == 1'd0))) | (soclinux_sdram_interface_bank3_lock & (roundrobin3_grant == 1'd0))) | (soclinux_sdram_interface_bank4_lock & (roundrobin4_grant == 1'd0))) | (soclinux_sdram_interface_bank5_lock & (roundrobin5_grant == 1'd0))) | (soclinux_sdram_interface_bank6_lock & (roundrobin6_grant == 1'd0))) | (soclinux_sdram_interface_bank7_lock & (roundrobin7_grant == 1'd0))) | (soclinux_sdram_interface_bank8_lock & (roundrobin8_grant == 1'd0))) | (soclinux_sdram_interface_bank9_lock & (roundrobin9_grant == 1'd0))) | (soclinux_sdram_interface_bank10_lock & (roundrobin10_grant == 1'd0))) | (soclinux_sdram_interface_bank11_lock & (roundrobin11_grant == 1'd0))) | (soclinux_sdram_interface_bank12_lock & (roundrobin12_grant == 1'd0))) | (soclinux_sdram_interface_bank13_lock & (roundrobin13_grant == 1'd0))) | (soclinux_sdram_interface_bank14_lock & (roundrobin14_grant == 1'd0))))) & soclinux_port_cmd_valid); |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed60 <= 30'd0; |
| case (grant) |
| 1'd0: begin |
| rhs_array_muxed60 <= soclinux_soclinux_cpu_ibus_adr; |
| end |
| default: begin |
| rhs_array_muxed60 <= soclinux_soclinux_cpu_dbus_adr; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed61 <= 32'd0; |
| case (grant) |
| 1'd0: begin |
| rhs_array_muxed61 <= soclinux_soclinux_cpu_ibus_dat_w; |
| end |
| default: begin |
| rhs_array_muxed61 <= soclinux_soclinux_cpu_dbus_dat_w; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed62 <= 4'd0; |
| case (grant) |
| 1'd0: begin |
| rhs_array_muxed62 <= soclinux_soclinux_cpu_ibus_sel; |
| end |
| default: begin |
| rhs_array_muxed62 <= soclinux_soclinux_cpu_dbus_sel; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed63 <= 1'd0; |
| case (grant) |
| 1'd0: begin |
| rhs_array_muxed63 <= soclinux_soclinux_cpu_ibus_cyc; |
| end |
| default: begin |
| rhs_array_muxed63 <= soclinux_soclinux_cpu_dbus_cyc; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed64 <= 1'd0; |
| case (grant) |
| 1'd0: begin |
| rhs_array_muxed64 <= soclinux_soclinux_cpu_ibus_stb; |
| end |
| default: begin |
| rhs_array_muxed64 <= soclinux_soclinux_cpu_dbus_stb; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed65 <= 1'd0; |
| case (grant) |
| 1'd0: begin |
| rhs_array_muxed65 <= soclinux_soclinux_cpu_ibus_we; |
| end |
| default: begin |
| rhs_array_muxed65 <= soclinux_soclinux_cpu_dbus_we; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed66 <= 3'd0; |
| case (grant) |
| 1'd0: begin |
| rhs_array_muxed66 <= soclinux_soclinux_cpu_ibus_cti; |
| end |
| default: begin |
| rhs_array_muxed66 <= soclinux_soclinux_cpu_dbus_cti; |
| end |
| endcase |
| end |
| always @(*) begin |
| rhs_array_muxed67 <= 2'd0; |
| case (grant) |
| 1'd0: begin |
| rhs_array_muxed67 <= soclinux_soclinux_cpu_ibus_bte; |
| end |
| default: begin |
| rhs_array_muxed67 <= soclinux_soclinux_cpu_dbus_bte; |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed0 <= 4'd0; |
| case (soclinux_sdram_steerer_sel0) |
| 1'd0: begin |
| array_muxed0 <= soclinux_sdram_nop_ba[3:0]; |
| end |
| 1'd1: begin |
| array_muxed0 <= soclinux_sdram_choose_cmd_cmd_payload_ba[3:0]; |
| end |
| 2'd2: begin |
| array_muxed0 <= soclinux_sdram_choose_req_cmd_payload_ba[3:0]; |
| end |
| default: begin |
| array_muxed0 <= soclinux_sdram_cmd_payload_ba[3:0]; |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed1 <= 15'd0; |
| case (soclinux_sdram_steerer_sel0) |
| 1'd0: begin |
| array_muxed1 <= soclinux_sdram_nop_a; |
| end |
| 1'd1: begin |
| array_muxed1 <= soclinux_sdram_choose_cmd_cmd_payload_a; |
| end |
| 2'd2: begin |
| array_muxed1 <= soclinux_sdram_choose_req_cmd_payload_a; |
| end |
| default: begin |
| array_muxed1 <= soclinux_sdram_cmd_payload_a; |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed2 <= 1'd0; |
| case (soclinux_sdram_steerer_sel0) |
| 1'd0: begin |
| array_muxed2 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed2 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_cas); |
| end |
| 2'd2: begin |
| array_muxed2 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_cas); |
| end |
| default: begin |
| array_muxed2 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_cas); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed3 <= 1'd0; |
| case (soclinux_sdram_steerer_sel0) |
| 1'd0: begin |
| array_muxed3 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed3 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_ras); |
| end |
| 2'd2: begin |
| array_muxed3 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_ras); |
| end |
| default: begin |
| array_muxed3 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_ras); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed4 <= 1'd0; |
| case (soclinux_sdram_steerer_sel0) |
| 1'd0: begin |
| array_muxed4 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed4 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_we); |
| end |
| 2'd2: begin |
| array_muxed4 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_we); |
| end |
| default: begin |
| array_muxed4 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_we); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed5 <= 1'd0; |
| case (soclinux_sdram_steerer_sel0) |
| 1'd0: begin |
| array_muxed5 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed5 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_is_read); |
| end |
| 2'd2: begin |
| array_muxed5 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_is_read); |
| end |
| default: begin |
| array_muxed5 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_is_read); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed6 <= 1'd0; |
| case (soclinux_sdram_steerer_sel0) |
| 1'd0: begin |
| array_muxed6 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed6 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_is_write); |
| end |
| 2'd2: begin |
| array_muxed6 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_is_write); |
| end |
| default: begin |
| array_muxed6 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_is_write); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed7 <= 4'd0; |
| case (soclinux_sdram_steerer_sel1) |
| 1'd0: begin |
| array_muxed7 <= soclinux_sdram_nop_ba[3:0]; |
| end |
| 1'd1: begin |
| array_muxed7 <= soclinux_sdram_choose_cmd_cmd_payload_ba[3:0]; |
| end |
| 2'd2: begin |
| array_muxed7 <= soclinux_sdram_choose_req_cmd_payload_ba[3:0]; |
| end |
| default: begin |
| array_muxed7 <= soclinux_sdram_cmd_payload_ba[3:0]; |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed8 <= 15'd0; |
| case (soclinux_sdram_steerer_sel1) |
| 1'd0: begin |
| array_muxed8 <= soclinux_sdram_nop_a; |
| end |
| 1'd1: begin |
| array_muxed8 <= soclinux_sdram_choose_cmd_cmd_payload_a; |
| end |
| 2'd2: begin |
| array_muxed8 <= soclinux_sdram_choose_req_cmd_payload_a; |
| end |
| default: begin |
| array_muxed8 <= soclinux_sdram_cmd_payload_a; |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed9 <= 1'd0; |
| case (soclinux_sdram_steerer_sel1) |
| 1'd0: begin |
| array_muxed9 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed9 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_cas); |
| end |
| 2'd2: begin |
| array_muxed9 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_cas); |
| end |
| default: begin |
| array_muxed9 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_cas); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed10 <= 1'd0; |
| case (soclinux_sdram_steerer_sel1) |
| 1'd0: begin |
| array_muxed10 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed10 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_ras); |
| end |
| 2'd2: begin |
| array_muxed10 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_ras); |
| end |
| default: begin |
| array_muxed10 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_ras); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed11 <= 1'd0; |
| case (soclinux_sdram_steerer_sel1) |
| 1'd0: begin |
| array_muxed11 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed11 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_we); |
| end |
| 2'd2: begin |
| array_muxed11 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_we); |
| end |
| default: begin |
| array_muxed11 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_we); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed12 <= 1'd0; |
| case (soclinux_sdram_steerer_sel1) |
| 1'd0: begin |
| array_muxed12 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed12 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_is_read); |
| end |
| 2'd2: begin |
| array_muxed12 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_is_read); |
| end |
| default: begin |
| array_muxed12 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_is_read); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed13 <= 1'd0; |
| case (soclinux_sdram_steerer_sel1) |
| 1'd0: begin |
| array_muxed13 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed13 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_is_write); |
| end |
| 2'd2: begin |
| array_muxed13 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_is_write); |
| end |
| default: begin |
| array_muxed13 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_is_write); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed14 <= 4'd0; |
| case (soclinux_sdram_steerer_sel2) |
| 1'd0: begin |
| array_muxed14 <= soclinux_sdram_nop_ba[3:0]; |
| end |
| 1'd1: begin |
| array_muxed14 <= soclinux_sdram_choose_cmd_cmd_payload_ba[3:0]; |
| end |
| 2'd2: begin |
| array_muxed14 <= soclinux_sdram_choose_req_cmd_payload_ba[3:0]; |
| end |
| default: begin |
| array_muxed14 <= soclinux_sdram_cmd_payload_ba[3:0]; |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed15 <= 15'd0; |
| case (soclinux_sdram_steerer_sel2) |
| 1'd0: begin |
| array_muxed15 <= soclinux_sdram_nop_a; |
| end |
| 1'd1: begin |
| array_muxed15 <= soclinux_sdram_choose_cmd_cmd_payload_a; |
| end |
| 2'd2: begin |
| array_muxed15 <= soclinux_sdram_choose_req_cmd_payload_a; |
| end |
| default: begin |
| array_muxed15 <= soclinux_sdram_cmd_payload_a; |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed16 <= 1'd0; |
| case (soclinux_sdram_steerer_sel2) |
| 1'd0: begin |
| array_muxed16 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed16 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_cas); |
| end |
| 2'd2: begin |
| array_muxed16 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_cas); |
| end |
| default: begin |
| array_muxed16 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_cas); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed17 <= 1'd0; |
| case (soclinux_sdram_steerer_sel2) |
| 1'd0: begin |
| array_muxed17 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed17 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_ras); |
| end |
| 2'd2: begin |
| array_muxed17 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_ras); |
| end |
| default: begin |
| array_muxed17 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_ras); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed18 <= 1'd0; |
| case (soclinux_sdram_steerer_sel2) |
| 1'd0: begin |
| array_muxed18 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed18 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_we); |
| end |
| 2'd2: begin |
| array_muxed18 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_we); |
| end |
| default: begin |
| array_muxed18 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_we); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed19 <= 1'd0; |
| case (soclinux_sdram_steerer_sel2) |
| 1'd0: begin |
| array_muxed19 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed19 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_is_read); |
| end |
| 2'd2: begin |
| array_muxed19 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_is_read); |
| end |
| default: begin |
| array_muxed19 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_is_read); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed20 <= 1'd0; |
| case (soclinux_sdram_steerer_sel2) |
| 1'd0: begin |
| array_muxed20 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed20 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_is_write); |
| end |
| 2'd2: begin |
| array_muxed20 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_is_write); |
| end |
| default: begin |
| array_muxed20 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_is_write); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed21 <= 4'd0; |
| case (soclinux_sdram_steerer_sel3) |
| 1'd0: begin |
| array_muxed21 <= soclinux_sdram_nop_ba[3:0]; |
| end |
| 1'd1: begin |
| array_muxed21 <= soclinux_sdram_choose_cmd_cmd_payload_ba[3:0]; |
| end |
| 2'd2: begin |
| array_muxed21 <= soclinux_sdram_choose_req_cmd_payload_ba[3:0]; |
| end |
| default: begin |
| array_muxed21 <= soclinux_sdram_cmd_payload_ba[3:0]; |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed22 <= 15'd0; |
| case (soclinux_sdram_steerer_sel3) |
| 1'd0: begin |
| array_muxed22 <= soclinux_sdram_nop_a; |
| end |
| 1'd1: begin |
| array_muxed22 <= soclinux_sdram_choose_cmd_cmd_payload_a; |
| end |
| 2'd2: begin |
| array_muxed22 <= soclinux_sdram_choose_req_cmd_payload_a; |
| end |
| default: begin |
| array_muxed22 <= soclinux_sdram_cmd_payload_a; |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed23 <= 1'd0; |
| case (soclinux_sdram_steerer_sel3) |
| 1'd0: begin |
| array_muxed23 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed23 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_cas); |
| end |
| 2'd2: begin |
| array_muxed23 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_cas); |
| end |
| default: begin |
| array_muxed23 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_cas); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed24 <= 1'd0; |
| case (soclinux_sdram_steerer_sel3) |
| 1'd0: begin |
| array_muxed24 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed24 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_ras); |
| end |
| 2'd2: begin |
| array_muxed24 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_ras); |
| end |
| default: begin |
| array_muxed24 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_ras); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed25 <= 1'd0; |
| case (soclinux_sdram_steerer_sel3) |
| 1'd0: begin |
| array_muxed25 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed25 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_we); |
| end |
| 2'd2: begin |
| array_muxed25 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_we); |
| end |
| default: begin |
| array_muxed25 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_we); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed26 <= 1'd0; |
| case (soclinux_sdram_steerer_sel3) |
| 1'd0: begin |
| array_muxed26 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed26 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_is_read); |
| end |
| 2'd2: begin |
| array_muxed26 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_is_read); |
| end |
| default: begin |
| array_muxed26 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_is_read); |
| end |
| endcase |
| end |
| always @(*) begin |
| array_muxed27 <= 1'd0; |
| case (soclinux_sdram_steerer_sel3) |
| 1'd0: begin |
| array_muxed27 <= 1'd0; |
| end |
| 1'd1: begin |
| array_muxed27 <= ((soclinux_sdram_choose_cmd_cmd_valid & soclinux_sdram_choose_cmd_cmd_ready) & soclinux_sdram_choose_cmd_cmd_payload_is_write); |
| end |
| 2'd2: begin |
| array_muxed27 <= ((soclinux_sdram_choose_req_cmd_valid & soclinux_sdram_choose_req_cmd_ready) & soclinux_sdram_choose_req_cmd_payload_is_write); |
| end |
| default: begin |
| array_muxed27 <= ((soclinux_sdram_cmd_valid & soclinux_sdram_cmd_ready) & soclinux_sdram_cmd_payload_is_write); |
| end |
| endcase |
| end |
| assign soclinux_soclinux_rx = regs1; |
| assign xilinxasyncresetsynchronizerimpl0 = (~soclinux_locked); |
| |
| always @(posedge clk500_clk) begin |
| if ((soclinux_ic_reset_counter != 1'd0)) begin |
| soclinux_ic_reset_counter <= (soclinux_ic_reset_counter - 1'd1); |
| end else begin |
| soclinux_ic_reset <= 1'd0; |
| end |
| if (clk500_rst) begin |
| soclinux_ic_reset_counter <= 6'd63; |
| soclinux_ic_reset <= 1'd1; |
| end |
| end |
| |
| always @(posedge ic_clk) begin |
| if (soclinux_ic_rdy) begin |
| if ((soclinux_ic_rdy_counter != 1'd0)) begin |
| soclinux_ic_rdy_counter <= (soclinux_ic_rdy_counter - 1'd1); |
| end else begin |
| sys_rst <= 1'd0; |
| end |
| end |
| if (ic_rst) begin |
| sys_rst <= 1'd1; |
| soclinux_ic_rdy_counter <= 6'd63; |
| end |
| end |
| |
| always @(posedge sys_clk) begin |
| if ((soclinux_soclinux_soccontroller_bus_errors != 32'd4294967295)) begin |
| if (soclinux_soclinux_soccontroller_bus_error) begin |
| soclinux_soclinux_soccontroller_bus_errors <= (soclinux_soclinux_soccontroller_bus_errors + 1'd1); |
| end |
| end |
| soclinux_soclinux_cpu_time <= (soclinux_soclinux_cpu_time + 1'd1); |
| if (soclinux_soclinux_cpu_latch_re) begin |
| soclinux_soclinux_cpu_time_status <= soclinux_soclinux_cpu_time; |
| end |
| if (soclinux_soclinux_cpu_latch_re) begin |
| soclinux_soclinux_cpu_time_cmp <= soclinux_soclinux_cpu_time_cmp_storage; |
| end |
| soclinux_soclinux_soclinux_ram_bus_ack <= 1'd0; |
| if (((soclinux_soclinux_soclinux_ram_bus_cyc & soclinux_soclinux_soclinux_ram_bus_stb) & (~soclinux_soclinux_soclinux_ram_bus_ack))) begin |
| soclinux_soclinux_soclinux_ram_bus_ack <= 1'd1; |
| end |
| soclinux_soclinux_ram_bus_ram_bus_ack <= 1'd0; |
| if (((soclinux_soclinux_ram_bus_ram_bus_cyc & soclinux_soclinux_ram_bus_ram_bus_stb) & (~soclinux_soclinux_ram_bus_ram_bus_ack))) begin |
| soclinux_soclinux_ram_bus_ram_bus_ack <= 1'd1; |
| end |
| soclinux_soclinux_sink_ready <= 1'd0; |
| if (((soclinux_soclinux_sink_valid & (~soclinux_soclinux_tx_busy)) & (~soclinux_soclinux_sink_ready))) begin |
| soclinux_soclinux_tx_reg <= soclinux_soclinux_sink_payload_data; |
| soclinux_soclinux_tx_bitcount <= 1'd0; |
| soclinux_soclinux_tx_busy <= 1'd1; |
| serial_tx <= 1'd0; |
| end else begin |
| if ((soclinux_soclinux_uart_clk_txen & soclinux_soclinux_tx_busy)) begin |
| soclinux_soclinux_tx_bitcount <= (soclinux_soclinux_tx_bitcount + 1'd1); |
| if ((soclinux_soclinux_tx_bitcount == 4'd8)) begin |
| serial_tx <= 1'd1; |
| end else begin |
| if ((soclinux_soclinux_tx_bitcount == 4'd9)) begin |
| serial_tx <= 1'd1; |
| soclinux_soclinux_tx_busy <= 1'd0; |
| soclinux_soclinux_sink_ready <= 1'd1; |
| end else begin |
| serial_tx <= soclinux_soclinux_tx_reg[0]; |
| soclinux_soclinux_tx_reg <= {1'd0, soclinux_soclinux_tx_reg[7:1]}; |
| end |
| end |
| end |
| end |
| if (soclinux_soclinux_tx_busy) begin |
| {soclinux_soclinux_uart_clk_txen, soclinux_soclinux_phase_accumulator_tx} <= (soclinux_soclinux_phase_accumulator_tx + soclinux_soclinux_storage); |
| end else begin |
| {soclinux_soclinux_uart_clk_txen, soclinux_soclinux_phase_accumulator_tx} <= 1'd0; |
| end |
| soclinux_soclinux_source_valid <= 1'd0; |
| soclinux_soclinux_rx_r <= soclinux_soclinux_rx; |
| if ((~soclinux_soclinux_rx_busy)) begin |
| if (((~soclinux_soclinux_rx) & soclinux_soclinux_rx_r)) begin |
| soclinux_soclinux_rx_busy <= 1'd1; |
| soclinux_soclinux_rx_bitcount <= 1'd0; |
| end |
| end else begin |
| if (soclinux_soclinux_uart_clk_rxen) begin |
| soclinux_soclinux_rx_bitcount <= (soclinux_soclinux_rx_bitcount + 1'd1); |
| if ((soclinux_soclinux_rx_bitcount == 1'd0)) begin |
| if (soclinux_soclinux_rx) begin |
| soclinux_soclinux_rx_busy <= 1'd0; |
| end |
| end else begin |
| if ((soclinux_soclinux_rx_bitcount == 4'd9)) begin |
| soclinux_soclinux_rx_busy <= 1'd0; |
| if (soclinux_soclinux_rx) begin |
| soclinux_soclinux_source_payload_data <= soclinux_soclinux_rx_reg; |
| soclinux_soclinux_source_valid <= 1'd1; |
| end |
| end else begin |
| soclinux_soclinux_rx_reg <= {soclinux_soclinux_rx, soclinux_soclinux_rx_reg[7:1]}; |
| end |
| end |
| end |
| end |
| if (soclinux_soclinux_rx_busy) begin |
| {soclinux_soclinux_uart_clk_rxen, soclinux_soclinux_phase_accumulator_rx} <= (soclinux_soclinux_phase_accumulator_rx + soclinux_soclinux_storage); |
| end else begin |
| {soclinux_soclinux_uart_clk_rxen, soclinux_soclinux_phase_accumulator_rx} <= 32'd2147483648; |
| end |
| if (soclinux_soclinux_uart_tx_clear) begin |
| soclinux_soclinux_uart_tx_pending <= 1'd0; |
| end |
| soclinux_soclinux_uart_tx_old_trigger <= soclinux_soclinux_uart_tx_trigger; |
| if (((~soclinux_soclinux_uart_tx_trigger) & soclinux_soclinux_uart_tx_old_trigger)) begin |
| soclinux_soclinux_uart_tx_pending <= 1'd1; |
| end |
| if (soclinux_soclinux_uart_rx_clear) begin |
| soclinux_soclinux_uart_rx_pending <= 1'd0; |
| end |
| soclinux_soclinux_uart_rx_old_trigger <= soclinux_soclinux_uart_rx_trigger; |
| if (((~soclinux_soclinux_uart_rx_trigger) & soclinux_soclinux_uart_rx_old_trigger)) begin |
| soclinux_soclinux_uart_rx_pending <= 1'd1; |
| end |
| if (soclinux_soclinux_uart_tx_fifo_syncfifo_re) begin |
| soclinux_soclinux_uart_tx_fifo_readable <= 1'd1; |
| end else begin |
| if (soclinux_soclinux_uart_tx_fifo_re) begin |
| soclinux_soclinux_uart_tx_fifo_readable <= 1'd0; |
| end |
| end |
| if (((soclinux_soclinux_uart_tx_fifo_syncfifo_we & soclinux_soclinux_uart_tx_fifo_syncfifo_writable) & (~soclinux_soclinux_uart_tx_fifo_replace))) begin |
| soclinux_soclinux_uart_tx_fifo_produce <= (soclinux_soclinux_uart_tx_fifo_produce + 1'd1); |
| end |
| if (soclinux_soclinux_uart_tx_fifo_do_read) begin |
| soclinux_soclinux_uart_tx_fifo_consume <= (soclinux_soclinux_uart_tx_fifo_consume + 1'd1); |
| end |
| if (((soclinux_soclinux_uart_tx_fifo_syncfifo_we & soclinux_soclinux_uart_tx_fifo_syncfifo_writable) & (~soclinux_soclinux_uart_tx_fifo_replace))) begin |
| if ((~soclinux_soclinux_uart_tx_fifo_do_read)) begin |
| soclinux_soclinux_uart_tx_fifo_level0 <= (soclinux_soclinux_uart_tx_fifo_level0 + 1'd1); |
| end |
| end else begin |
| if (soclinux_soclinux_uart_tx_fifo_do_read) begin |
| soclinux_soclinux_uart_tx_fifo_level0 <= (soclinux_soclinux_uart_tx_fifo_level0 - 1'd1); |
| end |
| end |
| if (soclinux_soclinux_uart_rx_fifo_syncfifo_re) begin |
| soclinux_soclinux_uart_rx_fifo_readable <= 1'd1; |
| end else begin |
| if (soclinux_soclinux_uart_rx_fifo_re) begin |
| soclinux_soclinux_uart_rx_fifo_readable <= 1'd0; |
| end |
| end |
| if (((soclinux_soclinux_uart_rx_fifo_syncfifo_we & soclinux_soclinux_uart_rx_fifo_syncfifo_writable) & (~soclinux_soclinux_uart_rx_fifo_replace))) begin |
| soclinux_soclinux_uart_rx_fifo_produce <= (soclinux_soclinux_uart_rx_fifo_produce + 1'd1); |
| end |
| if (soclinux_soclinux_uart_rx_fifo_do_read) begin |
| soclinux_soclinux_uart_rx_fifo_consume <= (soclinux_soclinux_uart_rx_fifo_consume + 1'd1); |
| end |
| if (((soclinux_soclinux_uart_rx_fifo_syncfifo_we & soclinux_soclinux_uart_rx_fifo_syncfifo_writable) & (~soclinux_soclinux_uart_rx_fifo_replace))) begin |
| if ((~soclinux_soclinux_uart_rx_fifo_do_read)) begin |
| soclinux_soclinux_uart_rx_fifo_level0 <= (soclinux_soclinux_uart_rx_fifo_level0 + 1'd1); |
| end |
| end else begin |
| if (soclinux_soclinux_uart_rx_fifo_do_read) begin |
| soclinux_soclinux_uart_rx_fifo_level0 <= (soclinux_soclinux_uart_rx_fifo_level0 - 1'd1); |
| end |
| end |
| if (soclinux_soclinux_uart_reset) begin |
| soclinux_soclinux_uart_tx_pending <= 1'd0; |
| soclinux_soclinux_uart_tx_old_trigger <= 1'd0; |
| soclinux_soclinux_uart_rx_pending <= 1'd0; |
| soclinux_soclinux_uart_rx_old_trigger <= 1'd0; |
| soclinux_soclinux_uart_tx_fifo_readable <= 1'd0; |
| soclinux_soclinux_uart_tx_fifo_level0 <= 5'd0; |
| soclinux_soclinux_uart_tx_fifo_produce <= 4'd0; |
| soclinux_soclinux_uart_tx_fifo_consume <= 4'd0; |
| soclinux_soclinux_uart_rx_fifo_readable <= 1'd0; |
| soclinux_soclinux_uart_rx_fifo_level0 <= 5'd0; |
| soclinux_soclinux_uart_rx_fifo_produce <= 4'd0; |
| soclinux_soclinux_uart_rx_fifo_consume <= 4'd0; |
| end |
| if (soclinux_soclinux_timer_en_storage) begin |
| if ((soclinux_soclinux_timer_value == 1'd0)) begin |
| soclinux_soclinux_timer_value <= soclinux_soclinux_timer_reload_storage; |
| end else begin |
| soclinux_soclinux_timer_value <= (soclinux_soclinux_timer_value - 1'd1); |
| end |
| end else begin |
| soclinux_soclinux_timer_value <= soclinux_soclinux_timer_load_storage; |
| end |
| if (soclinux_soclinux_timer_update_value_re) begin |
| soclinux_soclinux_timer_value_status <= soclinux_soclinux_timer_value; |
| end |
| if (soclinux_soclinux_timer_zero_clear) begin |
| soclinux_soclinux_timer_zero_pending <= 1'd0; |
| end |
| soclinux_soclinux_timer_zero_old_trigger <= soclinux_soclinux_timer_zero_trigger; |
| if (((~soclinux_soclinux_timer_zero_trigger) & soclinux_soclinux_timer_zero_old_trigger)) begin |
| soclinux_soclinux_timer_zero_pending <= 1'd1; |
| end |
| wb2csr_state <= wb2csr_next_state; |
| if (soclinux_usddrphy_done) begin |
| soclinux_usddrphy_dqs_taps_done <= 1'd1; |
| soclinux_usddrphy_status <= soclinux_usddrphy_dqs_taps; |
| end |
| if (soclinux_usddrphy_dly_sel_storage[0]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip0_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip0_value <= (soclinux_usddrphy_bitslip0_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[0]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip1_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip1_value <= (soclinux_usddrphy_bitslip1_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[0]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip2_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip2_value <= (soclinux_usddrphy_bitslip2_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[0]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip3_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip3_value <= (soclinux_usddrphy_bitslip3_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[0]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip4_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip4_value <= (soclinux_usddrphy_bitslip4_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[0]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip5_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip5_value <= (soclinux_usddrphy_bitslip5_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[0]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip6_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip6_value <= (soclinux_usddrphy_bitslip6_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[0]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip7_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip7_value <= (soclinux_usddrphy_bitslip7_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[1]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip8_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip8_value <= (soclinux_usddrphy_bitslip8_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[1]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip9_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip9_value <= (soclinux_usddrphy_bitslip9_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[1]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip10_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip10_value <= (soclinux_usddrphy_bitslip10_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[1]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip11_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip11_value <= (soclinux_usddrphy_bitslip11_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[1]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip12_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip12_value <= (soclinux_usddrphy_bitslip12_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[1]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip13_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip13_value <= (soclinux_usddrphy_bitslip13_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[1]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip14_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip14_value <= (soclinux_usddrphy_bitslip14_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[1]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip15_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip15_value <= (soclinux_usddrphy_bitslip15_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[2]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip16_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip16_value <= (soclinux_usddrphy_bitslip16_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[2]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip17_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip17_value <= (soclinux_usddrphy_bitslip17_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[2]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip18_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip18_value <= (soclinux_usddrphy_bitslip18_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[2]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip19_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip19_value <= (soclinux_usddrphy_bitslip19_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[2]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip20_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip20_value <= (soclinux_usddrphy_bitslip20_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[2]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip21_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip21_value <= (soclinux_usddrphy_bitslip21_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[2]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip22_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip22_value <= (soclinux_usddrphy_bitslip22_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[2]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip23_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip23_value <= (soclinux_usddrphy_bitslip23_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[3]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip24_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip24_value <= (soclinux_usddrphy_bitslip24_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[3]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip25_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip25_value <= (soclinux_usddrphy_bitslip25_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[3]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip26_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip26_value <= (soclinux_usddrphy_bitslip26_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[3]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip27_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip27_value <= (soclinux_usddrphy_bitslip27_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[3]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip28_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip28_value <= (soclinux_usddrphy_bitslip28_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[3]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip29_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip29_value <= (soclinux_usddrphy_bitslip29_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[3]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip30_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip30_value <= (soclinux_usddrphy_bitslip30_value + 1'd1); |
| end |
| end |
| end |
| if (soclinux_usddrphy_dly_sel_storage[3]) begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_rst_re) begin |
| soclinux_usddrphy_bitslip31_value <= 1'd0; |
| end else begin |
| if (soclinux_usddrphy_rdly_dq_bitslip_re) begin |
| soclinux_usddrphy_bitslip31_value <= (soclinux_usddrphy_bitslip31_value + 1'd1); |
| end |
| end |
| end |
| soclinux_usddrphy_n_rddata_en0 <= soclinux_usddrphy_interface1_dfi_p1_rddata_en; |
| soclinux_usddrphy_n_rddata_en1 <= soclinux_usddrphy_n_rddata_en0; |
| soclinux_usddrphy_n_rddata_en2 <= soclinux_usddrphy_n_rddata_en1; |
| soclinux_usddrphy_n_rddata_en3 <= soclinux_usddrphy_n_rddata_en2; |
| soclinux_usddrphy_n_rddata_en4 <= soclinux_usddrphy_n_rddata_en3; |
| soclinux_usddrphy_n_rddata_en5 <= soclinux_usddrphy_n_rddata_en4; |
| soclinux_usddrphy_n_rddata_en6 <= soclinux_usddrphy_n_rddata_en5; |
| soclinux_usddrphy_phase_rddata_valid0 <= (soclinux_usddrphy_n_rddata_en6 | soclinux_usddrphy_wlevel_en_storage); |
| soclinux_usddrphy_phase_rddata_valid1 <= (soclinux_usddrphy_n_rddata_en6 | soclinux_usddrphy_wlevel_en_storage); |
| soclinux_usddrphy_phase_rddata_valid2 <= (soclinux_usddrphy_n_rddata_en6 | soclinux_usddrphy_wlevel_en_storage); |
| soclinux_usddrphy_phase_rddata_valid3 <= (soclinux_usddrphy_n_rddata_en6 | soclinux_usddrphy_wlevel_en_storage); |
| soclinux_usddrphy_last_wrdata_en <= {soclinux_usddrphy_last_wrdata_en[3:0], soclinux_usddrphy_interface1_dfi_p2_wrdata_en}; |
| if (soclinux_usddrphy_wlevel_en_storage) begin |
| soclinux_usddrphy_oe_dqs <= 1'd1; |
| soclinux_usddrphy_oe_dq <= 1'd0; |
| end else begin |
| soclinux_usddrphy_oe_dqs <= soclinux_usddrphy_oe; |
| soclinux_usddrphy_oe_dq <= soclinux_usddrphy_oe; |
| end |
| if (soclinux_usddrphy_wait) begin |
| if ((~soclinux_usddrphy_done)) begin |
| soclinux_usddrphy_count <= (soclinux_usddrphy_count - 1'd1); |
| end |
| end else begin |
| soclinux_usddrphy_count <= 17'd65536; |
| end |
| soclinux_usddrphy_bitslip0_r <= {soclinux_usddrphy_bitslip0_i, soclinux_usddrphy_bitslip0_r[15:8]}; |
| soclinux_usddrphy_bitslip1_r <= {soclinux_usddrphy_bitslip1_i, soclinux_usddrphy_bitslip1_r[15:8]}; |
| soclinux_usddrphy_bitslip2_r <= {soclinux_usddrphy_bitslip2_i, soclinux_usddrphy_bitslip2_r[15:8]}; |
| soclinux_usddrphy_bitslip3_r <= {soclinux_usddrphy_bitslip3_i, soclinux_usddrphy_bitslip3_r[15:8]}; |
| soclinux_usddrphy_bitslip4_r <= {soclinux_usddrphy_bitslip4_i, soclinux_usddrphy_bitslip4_r[15:8]}; |
| soclinux_usddrphy_bitslip5_r <= {soclinux_usddrphy_bitslip5_i, soclinux_usddrphy_bitslip5_r[15:8]}; |
| soclinux_usddrphy_bitslip6_r <= {soclinux_usddrphy_bitslip6_i, soclinux_usddrphy_bitslip6_r[15:8]}; |
| soclinux_usddrphy_bitslip7_r <= {soclinux_usddrphy_bitslip7_i, soclinux_usddrphy_bitslip7_r[15:8]}; |
| soclinux_usddrphy_bitslip8_r <= {soclinux_usddrphy_bitslip8_i, soclinux_usddrphy_bitslip8_r[15:8]}; |
| soclinux_usddrphy_bitslip9_r <= {soclinux_usddrphy_bitslip9_i, soclinux_usddrphy_bitslip9_r[15:8]}; |
| soclinux_usddrphy_bitslip10_r <= {soclinux_usddrphy_bitslip10_i, soclinux_usddrphy_bitslip10_r[15:8]}; |
| soclinux_usddrphy_bitslip11_r <= {soclinux_usddrphy_bitslip11_i, soclinux_usddrphy_bitslip11_r[15:8]}; |
| soclinux_usddrphy_bitslip12_r <= {soclinux_usddrphy_bitslip12_i, soclinux_usddrphy_bitslip12_r[15:8]}; |
| soclinux_usddrphy_bitslip13_r <= {soclinux_usddrphy_bitslip13_i, soclinux_usddrphy_bitslip13_r[15:8]}; |
| soclinux_usddrphy_bitslip14_r <= {soclinux_usddrphy_bitslip14_i, soclinux_usddrphy_bitslip14_r[15:8]}; |
| soclinux_usddrphy_bitslip15_r <= {soclinux_usddrphy_bitslip15_i, soclinux_usddrphy_bitslip15_r[15:8]}; |
| soclinux_usddrphy_bitslip16_r <= {soclinux_usddrphy_bitslip16_i, soclinux_usddrphy_bitslip16_r[15:8]}; |
| soclinux_usddrphy_bitslip17_r <= {soclinux_usddrphy_bitslip17_i, soclinux_usddrphy_bitslip17_r[15:8]}; |
| soclinux_usddrphy_bitslip18_r <= {soclinux_usddrphy_bitslip18_i, soclinux_usddrphy_bitslip18_r[15:8]}; |
| soclinux_usddrphy_bitslip19_r <= {soclinux_usddrphy_bitslip19_i, soclinux_usddrphy_bitslip19_r[15:8]}; |
| soclinux_usddrphy_bitslip20_r <= {soclinux_usddrphy_bitslip20_i, soclinux_usddrphy_bitslip20_r[15:8]}; |
| soclinux_usddrphy_bitslip21_r <= {soclinux_usddrphy_bitslip21_i, soclinux_usddrphy_bitslip21_r[15:8]}; |
| soclinux_usddrphy_bitslip22_r <= {soclinux_usddrphy_bitslip22_i, soclinux_usddrphy_bitslip22_r[15:8]}; |
| soclinux_usddrphy_bitslip23_r <= {soclinux_usddrphy_bitslip23_i, soclinux_usddrphy_bitslip23_r[15:8]}; |
| soclinux_usddrphy_bitslip24_r <= {soclinux_usddrphy_bitslip24_i, soclinux_usddrphy_bitslip24_r[15:8]}; |
| soclinux_usddrphy_bitslip25_r <= {soclinux_usddrphy_bitslip25_i, soclinux_usddrphy_bitslip25_r[15:8]}; |
| soclinux_usddrphy_bitslip26_r <= {soclinux_usddrphy_bitslip26_i, soclinux_usddrphy_bitslip26_r[15:8]}; |
| soclinux_usddrphy_bitslip27_r <= {soclinux_usddrphy_bitslip27_i, soclinux_usddrphy_bitslip27_r[15:8]}; |
| soclinux_usddrphy_bitslip28_r <= {soclinux_usddrphy_bitslip28_i, soclinux_usddrphy_bitslip28_r[15:8]}; |
| soclinux_usddrphy_bitslip29_r <= {soclinux_usddrphy_bitslip29_i, soclinux_usddrphy_bitslip29_r[15:8]}; |
| soclinux_usddrphy_bitslip30_r <= {soclinux_usddrphy_bitslip30_i, soclinux_usddrphy_bitslip30_r[15:8]}; |
| soclinux_usddrphy_bitslip31_r <= {soclinux_usddrphy_bitslip31_i, soclinux_usddrphy_bitslip31_r[15:8]}; |
| if (soclinux_sdram_inti_p0_rddata_valid) begin |
| soclinux_sdram_phaseinjector0_status <= soclinux_sdram_inti_p0_rddata; |
| end |
| if (soclinux_sdram_inti_p1_rddata_valid) begin |
| soclinux_sdram_phaseinjector1_status <= soclinux_sdram_inti_p1_rddata; |
| end |
| if (soclinux_sdram_inti_p2_rddata_valid) begin |
| soclinux_sdram_phaseinjector2_status <= soclinux_sdram_inti_p2_rddata; |
| end |
| if (soclinux_sdram_inti_p3_rddata_valid) begin |
| soclinux_sdram_phaseinjector3_status <= soclinux_sdram_inti_p3_rddata; |
| end |
| if ((soclinux_sdram_timer_wait & (~soclinux_sdram_timer_done0))) begin |
| soclinux_sdram_timer_count1 <= (soclinux_sdram_timer_count1 - 1'd1); |
| end else begin |
| soclinux_sdram_timer_count1 <= 10'd976; |
| end |
| soclinux_sdram_postponer_req_o <= 1'd0; |
| if (soclinux_sdram_postponer_req_i) begin |
| soclinux_sdram_postponer_count <= (soclinux_sdram_postponer_count - 1'd1); |
| if ((soclinux_sdram_postponer_count == 1'd0)) begin |
| soclinux_sdram_postponer_count <= 1'd0; |
| soclinux_sdram_postponer_req_o <= 1'd1; |
| end |
| end |
| if (soclinux_sdram_sequencer_start0) begin |
| soclinux_sdram_sequencer_count <= 1'd0; |
| end else begin |
| if (soclinux_sdram_sequencer_done1) begin |
| if ((soclinux_sdram_sequencer_count != 1'd0)) begin |
| soclinux_sdram_sequencer_count <= (soclinux_sdram_sequencer_count - 1'd1); |
| end |
| end |
| end |
| soclinux_sdram_cmd_payload_a <= 1'd0; |
| soclinux_sdram_cmd_payload_ba <= 1'd0; |
| soclinux_sdram_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_cmd_payload_we <= 1'd0; |
| soclinux_sdram_sequencer_done1 <= 1'd0; |
| if ((soclinux_sdram_sequencer_start1 & (soclinux_sdram_sequencer_counter == 1'd0))) begin |
| soclinux_sdram_cmd_payload_a <= 11'd1024; |
| soclinux_sdram_cmd_payload_ba <= 1'd0; |
| soclinux_sdram_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_cmd_payload_we <= 1'd1; |
| end |
| if ((soclinux_sdram_sequencer_counter == 2'd3)) begin |
| soclinux_sdram_cmd_payload_a <= 1'd0; |
| soclinux_sdram_cmd_payload_ba <= 1'd0; |
| soclinux_sdram_cmd_payload_cas <= 1'd1; |
| soclinux_sdram_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_cmd_payload_we <= 1'd0; |
| end |
| if ((soclinux_sdram_sequencer_counter == 6'd48)) begin |
| soclinux_sdram_cmd_payload_a <= 1'd0; |
| soclinux_sdram_cmd_payload_ba <= 1'd0; |
| soclinux_sdram_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_cmd_payload_we <= 1'd0; |
| soclinux_sdram_sequencer_done1 <= 1'd1; |
| end |
| if ((soclinux_sdram_sequencer_counter == 6'd48)) begin |
| soclinux_sdram_sequencer_counter <= 1'd0; |
| end else begin |
| if ((soclinux_sdram_sequencer_counter != 1'd0)) begin |
| soclinux_sdram_sequencer_counter <= (soclinux_sdram_sequencer_counter + 1'd1); |
| end else begin |
| if (soclinux_sdram_sequencer_start1) begin |
| soclinux_sdram_sequencer_counter <= 1'd1; |
| end |
| end |
| end |
| if ((soclinux_sdram_zqcs_timer_wait & (~soclinux_sdram_zqcs_timer_done0))) begin |
| soclinux_sdram_zqcs_timer_count1 <= (soclinux_sdram_zqcs_timer_count1 - 1'd1); |
| end else begin |
| soclinux_sdram_zqcs_timer_count1 <= 27'd124999999; |
| end |
| soclinux_sdram_zqcs_executer_done <= 1'd0; |
| if ((soclinux_sdram_zqcs_executer_start & (soclinux_sdram_zqcs_executer_counter == 1'd0))) begin |
| soclinux_sdram_cmd_payload_a <= 11'd1024; |
| soclinux_sdram_cmd_payload_ba <= 1'd0; |
| soclinux_sdram_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_cmd_payload_ras <= 1'd1; |
| soclinux_sdram_cmd_payload_we <= 1'd1; |
| end |
| if ((soclinux_sdram_zqcs_executer_counter == 2'd3)) begin |
| soclinux_sdram_cmd_payload_a <= 1'd0; |
| soclinux_sdram_cmd_payload_ba <= 1'd0; |
| soclinux_sdram_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_cmd_payload_we <= 1'd1; |
| end |
| if ((soclinux_sdram_zqcs_executer_counter == 6'd35)) begin |
| soclinux_sdram_cmd_payload_a <= 1'd0; |
| soclinux_sdram_cmd_payload_ba <= 1'd0; |
| soclinux_sdram_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_cmd_payload_we <= 1'd0; |
| soclinux_sdram_zqcs_executer_done <= 1'd1; |
| end |
| if ((soclinux_sdram_zqcs_executer_counter == 6'd35)) begin |
| soclinux_sdram_zqcs_executer_counter <= 1'd0; |
| end else begin |
| if ((soclinux_sdram_zqcs_executer_counter != 1'd0)) begin |
| soclinux_sdram_zqcs_executer_counter <= (soclinux_sdram_zqcs_executer_counter + 1'd1); |
| end else begin |
| if (soclinux_sdram_zqcs_executer_start) begin |
| soclinux_sdram_zqcs_executer_counter <= 1'd1; |
| end |
| end |
| end |
| refresher_state <= refresher_next_state; |
| if (soclinux_sdram_bankmachine0_row_close) begin |
| soclinux_sdram_bankmachine0_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine0_row_open) begin |
| soclinux_sdram_bankmachine0_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine0_row <= soclinux_sdram_bankmachine0_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_we & soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_writable) & (~soclinux_sdram_bankmachine0_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine0_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine0_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_we & soclinux_sdram_bankmachine0_cmd_buffer_lookahead_syncfifo0_writable) & (~soclinux_sdram_bankmachine0_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine0_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine0_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine0_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine0_cmd_buffer_source_valid) | soclinux_sdram_bankmachine0_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine0_cmd_buffer_source_valid <= soclinux_sdram_bankmachine0_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine0_cmd_buffer_source_first <= soclinux_sdram_bankmachine0_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine0_cmd_buffer_source_last <= soclinux_sdram_bankmachine0_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine0_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine0_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine0_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine0_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine0_twtpcon_valid) begin |
| soclinux_sdram_bankmachine0_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine0_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine0_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine0_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine0_twtpcon_count <= (soclinux_sdram_bankmachine0_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine0_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine0_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine0_trccon_valid) begin |
| soclinux_sdram_bankmachine0_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine0_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine0_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine0_trccon_ready)) begin |
| soclinux_sdram_bankmachine0_trccon_count <= (soclinux_sdram_bankmachine0_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine0_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine0_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine0_trascon_valid) begin |
| soclinux_sdram_bankmachine0_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine0_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine0_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine0_trascon_ready)) begin |
| soclinux_sdram_bankmachine0_trascon_count <= (soclinux_sdram_bankmachine0_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine0_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine0_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine0_state <= bankmachine0_next_state; |
| if (soclinux_sdram_bankmachine1_row_close) begin |
| soclinux_sdram_bankmachine1_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine1_row_open) begin |
| soclinux_sdram_bankmachine1_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine1_row <= soclinux_sdram_bankmachine1_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_we & soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_writable) & (~soclinux_sdram_bankmachine1_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine1_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine1_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_we & soclinux_sdram_bankmachine1_cmd_buffer_lookahead_syncfifo1_writable) & (~soclinux_sdram_bankmachine1_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine1_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine1_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine1_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine1_cmd_buffer_source_valid) | soclinux_sdram_bankmachine1_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine1_cmd_buffer_source_valid <= soclinux_sdram_bankmachine1_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine1_cmd_buffer_source_first <= soclinux_sdram_bankmachine1_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine1_cmd_buffer_source_last <= soclinux_sdram_bankmachine1_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine1_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine1_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine1_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine1_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine1_twtpcon_valid) begin |
| soclinux_sdram_bankmachine1_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine1_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine1_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine1_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine1_twtpcon_count <= (soclinux_sdram_bankmachine1_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine1_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine1_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine1_trccon_valid) begin |
| soclinux_sdram_bankmachine1_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine1_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine1_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine1_trccon_ready)) begin |
| soclinux_sdram_bankmachine1_trccon_count <= (soclinux_sdram_bankmachine1_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine1_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine1_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine1_trascon_valid) begin |
| soclinux_sdram_bankmachine1_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine1_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine1_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine1_trascon_ready)) begin |
| soclinux_sdram_bankmachine1_trascon_count <= (soclinux_sdram_bankmachine1_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine1_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine1_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine1_state <= bankmachine1_next_state; |
| if (soclinux_sdram_bankmachine2_row_close) begin |
| soclinux_sdram_bankmachine2_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine2_row_open) begin |
| soclinux_sdram_bankmachine2_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine2_row <= soclinux_sdram_bankmachine2_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_we & soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_writable) & (~soclinux_sdram_bankmachine2_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine2_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine2_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_we & soclinux_sdram_bankmachine2_cmd_buffer_lookahead_syncfifo2_writable) & (~soclinux_sdram_bankmachine2_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine2_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine2_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine2_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine2_cmd_buffer_source_valid) | soclinux_sdram_bankmachine2_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine2_cmd_buffer_source_valid <= soclinux_sdram_bankmachine2_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine2_cmd_buffer_source_first <= soclinux_sdram_bankmachine2_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine2_cmd_buffer_source_last <= soclinux_sdram_bankmachine2_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine2_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine2_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine2_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine2_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine2_twtpcon_valid) begin |
| soclinux_sdram_bankmachine2_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine2_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine2_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine2_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine2_twtpcon_count <= (soclinux_sdram_bankmachine2_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine2_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine2_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine2_trccon_valid) begin |
| soclinux_sdram_bankmachine2_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine2_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine2_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine2_trccon_ready)) begin |
| soclinux_sdram_bankmachine2_trccon_count <= (soclinux_sdram_bankmachine2_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine2_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine2_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine2_trascon_valid) begin |
| soclinux_sdram_bankmachine2_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine2_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine2_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine2_trascon_ready)) begin |
| soclinux_sdram_bankmachine2_trascon_count <= (soclinux_sdram_bankmachine2_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine2_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine2_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine2_state <= bankmachine2_next_state; |
| if (soclinux_sdram_bankmachine3_row_close) begin |
| soclinux_sdram_bankmachine3_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine3_row_open) begin |
| soclinux_sdram_bankmachine3_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine3_row <= soclinux_sdram_bankmachine3_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_we & soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_writable) & (~soclinux_sdram_bankmachine3_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine3_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine3_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_we & soclinux_sdram_bankmachine3_cmd_buffer_lookahead_syncfifo3_writable) & (~soclinux_sdram_bankmachine3_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine3_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine3_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine3_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine3_cmd_buffer_source_valid) | soclinux_sdram_bankmachine3_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine3_cmd_buffer_source_valid <= soclinux_sdram_bankmachine3_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine3_cmd_buffer_source_first <= soclinux_sdram_bankmachine3_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine3_cmd_buffer_source_last <= soclinux_sdram_bankmachine3_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine3_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine3_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine3_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine3_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine3_twtpcon_valid) begin |
| soclinux_sdram_bankmachine3_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine3_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine3_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine3_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine3_twtpcon_count <= (soclinux_sdram_bankmachine3_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine3_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine3_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine3_trccon_valid) begin |
| soclinux_sdram_bankmachine3_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine3_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine3_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine3_trccon_ready)) begin |
| soclinux_sdram_bankmachine3_trccon_count <= (soclinux_sdram_bankmachine3_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine3_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine3_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine3_trascon_valid) begin |
| soclinux_sdram_bankmachine3_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine3_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine3_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine3_trascon_ready)) begin |
| soclinux_sdram_bankmachine3_trascon_count <= (soclinux_sdram_bankmachine3_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine3_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine3_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine3_state <= bankmachine3_next_state; |
| if (soclinux_sdram_bankmachine4_row_close) begin |
| soclinux_sdram_bankmachine4_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine4_row_open) begin |
| soclinux_sdram_bankmachine4_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine4_row <= soclinux_sdram_bankmachine4_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_we & soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_writable) & (~soclinux_sdram_bankmachine4_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine4_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine4_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_we & soclinux_sdram_bankmachine4_cmd_buffer_lookahead_syncfifo4_writable) & (~soclinux_sdram_bankmachine4_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine4_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine4_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine4_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine4_cmd_buffer_source_valid) | soclinux_sdram_bankmachine4_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine4_cmd_buffer_source_valid <= soclinux_sdram_bankmachine4_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine4_cmd_buffer_source_first <= soclinux_sdram_bankmachine4_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine4_cmd_buffer_source_last <= soclinux_sdram_bankmachine4_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine4_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine4_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine4_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine4_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine4_twtpcon_valid) begin |
| soclinux_sdram_bankmachine4_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine4_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine4_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine4_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine4_twtpcon_count <= (soclinux_sdram_bankmachine4_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine4_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine4_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine4_trccon_valid) begin |
| soclinux_sdram_bankmachine4_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine4_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine4_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine4_trccon_ready)) begin |
| soclinux_sdram_bankmachine4_trccon_count <= (soclinux_sdram_bankmachine4_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine4_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine4_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine4_trascon_valid) begin |
| soclinux_sdram_bankmachine4_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine4_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine4_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine4_trascon_ready)) begin |
| soclinux_sdram_bankmachine4_trascon_count <= (soclinux_sdram_bankmachine4_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine4_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine4_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine4_state <= bankmachine4_next_state; |
| if (soclinux_sdram_bankmachine5_row_close) begin |
| soclinux_sdram_bankmachine5_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine5_row_open) begin |
| soclinux_sdram_bankmachine5_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine5_row <= soclinux_sdram_bankmachine5_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_we & soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_writable) & (~soclinux_sdram_bankmachine5_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine5_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine5_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_we & soclinux_sdram_bankmachine5_cmd_buffer_lookahead_syncfifo5_writable) & (~soclinux_sdram_bankmachine5_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine5_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine5_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine5_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine5_cmd_buffer_source_valid) | soclinux_sdram_bankmachine5_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine5_cmd_buffer_source_valid <= soclinux_sdram_bankmachine5_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine5_cmd_buffer_source_first <= soclinux_sdram_bankmachine5_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine5_cmd_buffer_source_last <= soclinux_sdram_bankmachine5_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine5_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine5_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine5_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine5_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine5_twtpcon_valid) begin |
| soclinux_sdram_bankmachine5_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine5_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine5_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine5_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine5_twtpcon_count <= (soclinux_sdram_bankmachine5_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine5_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine5_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine5_trccon_valid) begin |
| soclinux_sdram_bankmachine5_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine5_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine5_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine5_trccon_ready)) begin |
| soclinux_sdram_bankmachine5_trccon_count <= (soclinux_sdram_bankmachine5_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine5_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine5_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine5_trascon_valid) begin |
| soclinux_sdram_bankmachine5_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine5_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine5_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine5_trascon_ready)) begin |
| soclinux_sdram_bankmachine5_trascon_count <= (soclinux_sdram_bankmachine5_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine5_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine5_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine5_state <= bankmachine5_next_state; |
| if (soclinux_sdram_bankmachine6_row_close) begin |
| soclinux_sdram_bankmachine6_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine6_row_open) begin |
| soclinux_sdram_bankmachine6_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine6_row <= soclinux_sdram_bankmachine6_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_we & soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_writable) & (~soclinux_sdram_bankmachine6_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine6_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine6_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_we & soclinux_sdram_bankmachine6_cmd_buffer_lookahead_syncfifo6_writable) & (~soclinux_sdram_bankmachine6_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine6_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine6_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine6_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine6_cmd_buffer_source_valid) | soclinux_sdram_bankmachine6_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine6_cmd_buffer_source_valid <= soclinux_sdram_bankmachine6_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine6_cmd_buffer_source_first <= soclinux_sdram_bankmachine6_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine6_cmd_buffer_source_last <= soclinux_sdram_bankmachine6_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine6_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine6_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine6_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine6_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine6_twtpcon_valid) begin |
| soclinux_sdram_bankmachine6_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine6_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine6_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine6_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine6_twtpcon_count <= (soclinux_sdram_bankmachine6_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine6_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine6_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine6_trccon_valid) begin |
| soclinux_sdram_bankmachine6_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine6_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine6_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine6_trccon_ready)) begin |
| soclinux_sdram_bankmachine6_trccon_count <= (soclinux_sdram_bankmachine6_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine6_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine6_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine6_trascon_valid) begin |
| soclinux_sdram_bankmachine6_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine6_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine6_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine6_trascon_ready)) begin |
| soclinux_sdram_bankmachine6_trascon_count <= (soclinux_sdram_bankmachine6_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine6_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine6_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine6_state <= bankmachine6_next_state; |
| if (soclinux_sdram_bankmachine7_row_close) begin |
| soclinux_sdram_bankmachine7_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine7_row_open) begin |
| soclinux_sdram_bankmachine7_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine7_row <= soclinux_sdram_bankmachine7_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_we & soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_writable) & (~soclinux_sdram_bankmachine7_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine7_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine7_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_we & soclinux_sdram_bankmachine7_cmd_buffer_lookahead_syncfifo7_writable) & (~soclinux_sdram_bankmachine7_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine7_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine7_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine7_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine7_cmd_buffer_source_valid) | soclinux_sdram_bankmachine7_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine7_cmd_buffer_source_valid <= soclinux_sdram_bankmachine7_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine7_cmd_buffer_source_first <= soclinux_sdram_bankmachine7_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine7_cmd_buffer_source_last <= soclinux_sdram_bankmachine7_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine7_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine7_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine7_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine7_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine7_twtpcon_valid) begin |
| soclinux_sdram_bankmachine7_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine7_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine7_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine7_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine7_twtpcon_count <= (soclinux_sdram_bankmachine7_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine7_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine7_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine7_trccon_valid) begin |
| soclinux_sdram_bankmachine7_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine7_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine7_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine7_trccon_ready)) begin |
| soclinux_sdram_bankmachine7_trccon_count <= (soclinux_sdram_bankmachine7_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine7_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine7_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine7_trascon_valid) begin |
| soclinux_sdram_bankmachine7_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine7_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine7_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine7_trascon_ready)) begin |
| soclinux_sdram_bankmachine7_trascon_count <= (soclinux_sdram_bankmachine7_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine7_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine7_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine7_state <= bankmachine7_next_state; |
| if (soclinux_sdram_bankmachine8_row_close) begin |
| soclinux_sdram_bankmachine8_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine8_row_open) begin |
| soclinux_sdram_bankmachine8_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine8_row <= soclinux_sdram_bankmachine8_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_we & soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_writable) & (~soclinux_sdram_bankmachine8_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine8_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine8_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_we & soclinux_sdram_bankmachine8_cmd_buffer_lookahead_syncfifo8_writable) & (~soclinux_sdram_bankmachine8_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine8_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine8_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine8_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine8_cmd_buffer_source_valid) | soclinux_sdram_bankmachine8_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine8_cmd_buffer_source_valid <= soclinux_sdram_bankmachine8_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine8_cmd_buffer_source_first <= soclinux_sdram_bankmachine8_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine8_cmd_buffer_source_last <= soclinux_sdram_bankmachine8_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine8_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine8_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine8_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine8_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine8_twtpcon_valid) begin |
| soclinux_sdram_bankmachine8_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine8_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine8_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine8_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine8_twtpcon_count <= (soclinux_sdram_bankmachine8_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine8_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine8_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine8_trccon_valid) begin |
| soclinux_sdram_bankmachine8_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine8_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine8_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine8_trccon_ready)) begin |
| soclinux_sdram_bankmachine8_trccon_count <= (soclinux_sdram_bankmachine8_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine8_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine8_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine8_trascon_valid) begin |
| soclinux_sdram_bankmachine8_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine8_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine8_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine8_trascon_ready)) begin |
| soclinux_sdram_bankmachine8_trascon_count <= (soclinux_sdram_bankmachine8_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine8_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine8_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine8_state <= bankmachine8_next_state; |
| if (soclinux_sdram_bankmachine9_row_close) begin |
| soclinux_sdram_bankmachine9_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine9_row_open) begin |
| soclinux_sdram_bankmachine9_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine9_row <= soclinux_sdram_bankmachine9_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_we & soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_writable) & (~soclinux_sdram_bankmachine9_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine9_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine9_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_we & soclinux_sdram_bankmachine9_cmd_buffer_lookahead_syncfifo9_writable) & (~soclinux_sdram_bankmachine9_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine9_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine9_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine9_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine9_cmd_buffer_source_valid) | soclinux_sdram_bankmachine9_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine9_cmd_buffer_source_valid <= soclinux_sdram_bankmachine9_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine9_cmd_buffer_source_first <= soclinux_sdram_bankmachine9_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine9_cmd_buffer_source_last <= soclinux_sdram_bankmachine9_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine9_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine9_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine9_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine9_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine9_twtpcon_valid) begin |
| soclinux_sdram_bankmachine9_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine9_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine9_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine9_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine9_twtpcon_count <= (soclinux_sdram_bankmachine9_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine9_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine9_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine9_trccon_valid) begin |
| soclinux_sdram_bankmachine9_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine9_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine9_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine9_trccon_ready)) begin |
| soclinux_sdram_bankmachine9_trccon_count <= (soclinux_sdram_bankmachine9_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine9_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine9_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine9_trascon_valid) begin |
| soclinux_sdram_bankmachine9_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine9_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine9_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine9_trascon_ready)) begin |
| soclinux_sdram_bankmachine9_trascon_count <= (soclinux_sdram_bankmachine9_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine9_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine9_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine9_state <= bankmachine9_next_state; |
| if (soclinux_sdram_bankmachine10_row_close) begin |
| soclinux_sdram_bankmachine10_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine10_row_open) begin |
| soclinux_sdram_bankmachine10_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine10_row <= soclinux_sdram_bankmachine10_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_we & soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_writable) & (~soclinux_sdram_bankmachine10_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine10_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine10_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_we & soclinux_sdram_bankmachine10_cmd_buffer_lookahead_syncfifo10_writable) & (~soclinux_sdram_bankmachine10_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine10_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine10_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine10_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine10_cmd_buffer_source_valid) | soclinux_sdram_bankmachine10_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine10_cmd_buffer_source_valid <= soclinux_sdram_bankmachine10_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine10_cmd_buffer_source_first <= soclinux_sdram_bankmachine10_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine10_cmd_buffer_source_last <= soclinux_sdram_bankmachine10_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine10_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine10_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine10_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine10_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine10_twtpcon_valid) begin |
| soclinux_sdram_bankmachine10_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine10_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine10_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine10_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine10_twtpcon_count <= (soclinux_sdram_bankmachine10_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine10_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine10_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine10_trccon_valid) begin |
| soclinux_sdram_bankmachine10_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine10_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine10_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine10_trccon_ready)) begin |
| soclinux_sdram_bankmachine10_trccon_count <= (soclinux_sdram_bankmachine10_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine10_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine10_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine10_trascon_valid) begin |
| soclinux_sdram_bankmachine10_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine10_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine10_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine10_trascon_ready)) begin |
| soclinux_sdram_bankmachine10_trascon_count <= (soclinux_sdram_bankmachine10_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine10_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine10_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine10_state <= bankmachine10_next_state; |
| if (soclinux_sdram_bankmachine11_row_close) begin |
| soclinux_sdram_bankmachine11_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine11_row_open) begin |
| soclinux_sdram_bankmachine11_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine11_row <= soclinux_sdram_bankmachine11_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_we & soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_writable) & (~soclinux_sdram_bankmachine11_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine11_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine11_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_we & soclinux_sdram_bankmachine11_cmd_buffer_lookahead_syncfifo11_writable) & (~soclinux_sdram_bankmachine11_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine11_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine11_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine11_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine11_cmd_buffer_source_valid) | soclinux_sdram_bankmachine11_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine11_cmd_buffer_source_valid <= soclinux_sdram_bankmachine11_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine11_cmd_buffer_source_first <= soclinux_sdram_bankmachine11_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine11_cmd_buffer_source_last <= soclinux_sdram_bankmachine11_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine11_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine11_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine11_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine11_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine11_twtpcon_valid) begin |
| soclinux_sdram_bankmachine11_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine11_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine11_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine11_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine11_twtpcon_count <= (soclinux_sdram_bankmachine11_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine11_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine11_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine11_trccon_valid) begin |
| soclinux_sdram_bankmachine11_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine11_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine11_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine11_trccon_ready)) begin |
| soclinux_sdram_bankmachine11_trccon_count <= (soclinux_sdram_bankmachine11_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine11_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine11_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine11_trascon_valid) begin |
| soclinux_sdram_bankmachine11_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine11_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine11_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine11_trascon_ready)) begin |
| soclinux_sdram_bankmachine11_trascon_count <= (soclinux_sdram_bankmachine11_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine11_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine11_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine11_state <= bankmachine11_next_state; |
| if (soclinux_sdram_bankmachine12_row_close) begin |
| soclinux_sdram_bankmachine12_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine12_row_open) begin |
| soclinux_sdram_bankmachine12_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine12_row <= soclinux_sdram_bankmachine12_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_we & soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_writable) & (~soclinux_sdram_bankmachine12_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine12_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine12_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_we & soclinux_sdram_bankmachine12_cmd_buffer_lookahead_syncfifo12_writable) & (~soclinux_sdram_bankmachine12_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine12_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine12_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine12_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine12_cmd_buffer_source_valid) | soclinux_sdram_bankmachine12_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine12_cmd_buffer_source_valid <= soclinux_sdram_bankmachine12_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine12_cmd_buffer_source_first <= soclinux_sdram_bankmachine12_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine12_cmd_buffer_source_last <= soclinux_sdram_bankmachine12_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine12_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine12_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine12_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine12_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine12_twtpcon_valid) begin |
| soclinux_sdram_bankmachine12_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine12_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine12_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine12_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine12_twtpcon_count <= (soclinux_sdram_bankmachine12_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine12_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine12_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine12_trccon_valid) begin |
| soclinux_sdram_bankmachine12_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine12_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine12_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine12_trccon_ready)) begin |
| soclinux_sdram_bankmachine12_trccon_count <= (soclinux_sdram_bankmachine12_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine12_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine12_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine12_trascon_valid) begin |
| soclinux_sdram_bankmachine12_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine12_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine12_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine12_trascon_ready)) begin |
| soclinux_sdram_bankmachine12_trascon_count <= (soclinux_sdram_bankmachine12_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine12_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine12_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine12_state <= bankmachine12_next_state; |
| if (soclinux_sdram_bankmachine13_row_close) begin |
| soclinux_sdram_bankmachine13_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine13_row_open) begin |
| soclinux_sdram_bankmachine13_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine13_row <= soclinux_sdram_bankmachine13_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_we & soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_writable) & (~soclinux_sdram_bankmachine13_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine13_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine13_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_we & soclinux_sdram_bankmachine13_cmd_buffer_lookahead_syncfifo13_writable) & (~soclinux_sdram_bankmachine13_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine13_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine13_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine13_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine13_cmd_buffer_source_valid) | soclinux_sdram_bankmachine13_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine13_cmd_buffer_source_valid <= soclinux_sdram_bankmachine13_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine13_cmd_buffer_source_first <= soclinux_sdram_bankmachine13_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine13_cmd_buffer_source_last <= soclinux_sdram_bankmachine13_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine13_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine13_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine13_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine13_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine13_twtpcon_valid) begin |
| soclinux_sdram_bankmachine13_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine13_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine13_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine13_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine13_twtpcon_count <= (soclinux_sdram_bankmachine13_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine13_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine13_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine13_trccon_valid) begin |
| soclinux_sdram_bankmachine13_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine13_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine13_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine13_trccon_ready)) begin |
| soclinux_sdram_bankmachine13_trccon_count <= (soclinux_sdram_bankmachine13_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine13_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine13_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine13_trascon_valid) begin |
| soclinux_sdram_bankmachine13_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine13_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine13_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine13_trascon_ready)) begin |
| soclinux_sdram_bankmachine13_trascon_count <= (soclinux_sdram_bankmachine13_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine13_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine13_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine13_state <= bankmachine13_next_state; |
| if (soclinux_sdram_bankmachine14_row_close) begin |
| soclinux_sdram_bankmachine14_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine14_row_open) begin |
| soclinux_sdram_bankmachine14_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine14_row <= soclinux_sdram_bankmachine14_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_we & soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_writable) & (~soclinux_sdram_bankmachine14_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine14_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine14_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_we & soclinux_sdram_bankmachine14_cmd_buffer_lookahead_syncfifo14_writable) & (~soclinux_sdram_bankmachine14_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine14_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine14_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine14_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine14_cmd_buffer_source_valid) | soclinux_sdram_bankmachine14_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine14_cmd_buffer_source_valid <= soclinux_sdram_bankmachine14_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine14_cmd_buffer_source_first <= soclinux_sdram_bankmachine14_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine14_cmd_buffer_source_last <= soclinux_sdram_bankmachine14_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine14_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine14_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine14_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine14_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine14_twtpcon_valid) begin |
| soclinux_sdram_bankmachine14_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine14_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine14_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine14_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine14_twtpcon_count <= (soclinux_sdram_bankmachine14_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine14_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine14_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine14_trccon_valid) begin |
| soclinux_sdram_bankmachine14_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine14_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine14_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine14_trccon_ready)) begin |
| soclinux_sdram_bankmachine14_trccon_count <= (soclinux_sdram_bankmachine14_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine14_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine14_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine14_trascon_valid) begin |
| soclinux_sdram_bankmachine14_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine14_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine14_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine14_trascon_ready)) begin |
| soclinux_sdram_bankmachine14_trascon_count <= (soclinux_sdram_bankmachine14_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine14_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine14_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine14_state <= bankmachine14_next_state; |
| if (soclinux_sdram_bankmachine15_row_close) begin |
| soclinux_sdram_bankmachine15_row_opened <= 1'd0; |
| end else begin |
| if (soclinux_sdram_bankmachine15_row_open) begin |
| soclinux_sdram_bankmachine15_row_opened <= 1'd1; |
| soclinux_sdram_bankmachine15_row <= soclinux_sdram_bankmachine15_cmd_buffer_source_payload_addr[21:7]; |
| end |
| end |
| if (((soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_we & soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_writable) & (~soclinux_sdram_bankmachine15_cmd_buffer_lookahead_replace))) begin |
| soclinux_sdram_bankmachine15_cmd_buffer_lookahead_produce <= (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_produce + 1'd1); |
| end |
| if (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine15_cmd_buffer_lookahead_consume <= (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_consume + 1'd1); |
| end |
| if (((soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_we & soclinux_sdram_bankmachine15_cmd_buffer_lookahead_syncfifo15_writable) & (~soclinux_sdram_bankmachine15_cmd_buffer_lookahead_replace))) begin |
| if ((~soclinux_sdram_bankmachine15_cmd_buffer_lookahead_do_read)) begin |
| soclinux_sdram_bankmachine15_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_level + 1'd1); |
| end |
| end else begin |
| if (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_do_read) begin |
| soclinux_sdram_bankmachine15_cmd_buffer_lookahead_level <= (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_level - 1'd1); |
| end |
| end |
| if (((~soclinux_sdram_bankmachine15_cmd_buffer_source_valid) | soclinux_sdram_bankmachine15_cmd_buffer_source_ready)) begin |
| soclinux_sdram_bankmachine15_cmd_buffer_source_valid <= soclinux_sdram_bankmachine15_cmd_buffer_sink_valid; |
| soclinux_sdram_bankmachine15_cmd_buffer_source_first <= soclinux_sdram_bankmachine15_cmd_buffer_sink_first; |
| soclinux_sdram_bankmachine15_cmd_buffer_source_last <= soclinux_sdram_bankmachine15_cmd_buffer_sink_last; |
| soclinux_sdram_bankmachine15_cmd_buffer_source_payload_we <= soclinux_sdram_bankmachine15_cmd_buffer_sink_payload_we; |
| soclinux_sdram_bankmachine15_cmd_buffer_source_payload_addr <= soclinux_sdram_bankmachine15_cmd_buffer_sink_payload_addr; |
| end |
| if (soclinux_sdram_bankmachine15_twtpcon_valid) begin |
| soclinux_sdram_bankmachine15_twtpcon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine15_twtpcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine15_twtpcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine15_twtpcon_ready)) begin |
| soclinux_sdram_bankmachine15_twtpcon_count <= (soclinux_sdram_bankmachine15_twtpcon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine15_twtpcon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine15_twtpcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine15_trccon_valid) begin |
| soclinux_sdram_bankmachine15_trccon_count <= 3'd6; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine15_trccon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine15_trccon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine15_trccon_ready)) begin |
| soclinux_sdram_bankmachine15_trccon_count <= (soclinux_sdram_bankmachine15_trccon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine15_trccon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine15_trccon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_bankmachine15_trascon_valid) begin |
| soclinux_sdram_bankmachine15_trascon_count <= 3'd4; |
| if (1'd0) begin |
| soclinux_sdram_bankmachine15_trascon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_bankmachine15_trascon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_bankmachine15_trascon_ready)) begin |
| soclinux_sdram_bankmachine15_trascon_count <= (soclinux_sdram_bankmachine15_trascon_count - 1'd1); |
| if ((soclinux_sdram_bankmachine15_trascon_count == 1'd1)) begin |
| soclinux_sdram_bankmachine15_trascon_ready <= 1'd1; |
| end |
| end |
| end |
| bankmachine15_state <= bankmachine15_next_state; |
| if ((~soclinux_sdram_en0)) begin |
| soclinux_sdram_time0 <= 5'd31; |
| end else begin |
| if ((~soclinux_sdram_max_time0)) begin |
| soclinux_sdram_time0 <= (soclinux_sdram_time0 - 1'd1); |
| end |
| end |
| if ((~soclinux_sdram_en1)) begin |
| soclinux_sdram_time1 <= 4'd15; |
| end else begin |
| if ((~soclinux_sdram_max_time1)) begin |
| soclinux_sdram_time1 <= (soclinux_sdram_time1 - 1'd1); |
| end |
| end |
| if (soclinux_sdram_choose_cmd_ce) begin |
| case (soclinux_sdram_choose_cmd_grant) |
| 1'd0: begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 1'd1: begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 2'd2: begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 2'd3: begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 3'd5: begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 3'd6: begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 3'd7: begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd8: begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd9: begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd10: begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd11: begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd12: begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd13: begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd14: begin |
| if (soclinux_sdram_choose_cmd_request[15]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd15: begin |
| if (soclinux_sdram_choose_cmd_request[0]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[1]) begin |
| soclinux_sdram_choose_cmd_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[2]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[3]) begin |
| soclinux_sdram_choose_cmd_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[4]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[5]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[6]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[7]) begin |
| soclinux_sdram_choose_cmd_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[8]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[9]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[10]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[11]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[12]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[13]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_cmd_request[14]) begin |
| soclinux_sdram_choose_cmd_grant <= 4'd14; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| endcase |
| end |
| if (soclinux_sdram_choose_req_ce) begin |
| case (soclinux_sdram_choose_req_grant) |
| 1'd0: begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 1'd1: begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 2'd2: begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 2'd3: begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 3'd4: begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 3'd5: begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 3'd6: begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 3'd7: begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd8: begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd9: begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd10: begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd11: begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd12: begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd13: begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end else begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd14: begin |
| if (soclinux_sdram_choose_req_request[15]) begin |
| soclinux_sdram_choose_req_grant <= 4'd15; |
| end else begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| 4'd15: begin |
| if (soclinux_sdram_choose_req_request[0]) begin |
| soclinux_sdram_choose_req_grant <= 1'd0; |
| end else begin |
| if (soclinux_sdram_choose_req_request[1]) begin |
| soclinux_sdram_choose_req_grant <= 1'd1; |
| end else begin |
| if (soclinux_sdram_choose_req_request[2]) begin |
| soclinux_sdram_choose_req_grant <= 2'd2; |
| end else begin |
| if (soclinux_sdram_choose_req_request[3]) begin |
| soclinux_sdram_choose_req_grant <= 2'd3; |
| end else begin |
| if (soclinux_sdram_choose_req_request[4]) begin |
| soclinux_sdram_choose_req_grant <= 3'd4; |
| end else begin |
| if (soclinux_sdram_choose_req_request[5]) begin |
| soclinux_sdram_choose_req_grant <= 3'd5; |
| end else begin |
| if (soclinux_sdram_choose_req_request[6]) begin |
| soclinux_sdram_choose_req_grant <= 3'd6; |
| end else begin |
| if (soclinux_sdram_choose_req_request[7]) begin |
| soclinux_sdram_choose_req_grant <= 3'd7; |
| end else begin |
| if (soclinux_sdram_choose_req_request[8]) begin |
| soclinux_sdram_choose_req_grant <= 4'd8; |
| end else begin |
| if (soclinux_sdram_choose_req_request[9]) begin |
| soclinux_sdram_choose_req_grant <= 4'd9; |
| end else begin |
| if (soclinux_sdram_choose_req_request[10]) begin |
| soclinux_sdram_choose_req_grant <= 4'd10; |
| end else begin |
| if (soclinux_sdram_choose_req_request[11]) begin |
| soclinux_sdram_choose_req_grant <= 4'd11; |
| end else begin |
| if (soclinux_sdram_choose_req_request[12]) begin |
| soclinux_sdram_choose_req_grant <= 4'd12; |
| end else begin |
| if (soclinux_sdram_choose_req_request[13]) begin |
| soclinux_sdram_choose_req_grant <= 4'd13; |
| end else begin |
| if (soclinux_sdram_choose_req_request[14]) begin |
| soclinux_sdram_choose_req_grant <= 4'd14; |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| end |
| endcase |
| end |
| soclinux_sdram_dfi_p0_cs_n <= 1'd0; |
| soclinux_sdram_dfi_p0_bank <= array_muxed0; |
| soclinux_sdram_dfi_p0_address <= array_muxed1; |
| soclinux_sdram_dfi_p0_cas_n <= (~array_muxed2); |
| soclinux_sdram_dfi_p0_ras_n <= (~array_muxed3); |
| soclinux_sdram_dfi_p0_we_n <= (~array_muxed4); |
| soclinux_sdram_dfi_p0_rddata_en <= array_muxed5; |
| soclinux_sdram_dfi_p0_wrdata_en <= array_muxed6; |
| soclinux_sdram_dfi_p1_cs_n <= 1'd0; |
| soclinux_sdram_dfi_p1_bank <= array_muxed7; |
| soclinux_sdram_dfi_p1_address <= array_muxed8; |
| soclinux_sdram_dfi_p1_cas_n <= (~array_muxed9); |
| soclinux_sdram_dfi_p1_ras_n <= (~array_muxed10); |
| soclinux_sdram_dfi_p1_we_n <= (~array_muxed11); |
| soclinux_sdram_dfi_p1_rddata_en <= array_muxed12; |
| soclinux_sdram_dfi_p1_wrdata_en <= array_muxed13; |
| soclinux_sdram_dfi_p2_cs_n <= 1'd0; |
| soclinux_sdram_dfi_p2_bank <= array_muxed14; |
| soclinux_sdram_dfi_p2_address <= array_muxed15; |
| soclinux_sdram_dfi_p2_cas_n <= (~array_muxed16); |
| soclinux_sdram_dfi_p2_ras_n <= (~array_muxed17); |
| soclinux_sdram_dfi_p2_we_n <= (~array_muxed18); |
| soclinux_sdram_dfi_p2_rddata_en <= array_muxed19; |
| soclinux_sdram_dfi_p2_wrdata_en <= array_muxed20; |
| soclinux_sdram_dfi_p3_cs_n <= 1'd0; |
| soclinux_sdram_dfi_p3_bank <= array_muxed21; |
| soclinux_sdram_dfi_p3_address <= array_muxed22; |
| soclinux_sdram_dfi_p3_cas_n <= (~array_muxed23); |
| soclinux_sdram_dfi_p3_ras_n <= (~array_muxed24); |
| soclinux_sdram_dfi_p3_we_n <= (~array_muxed25); |
| soclinux_sdram_dfi_p3_rddata_en <= array_muxed26; |
| soclinux_sdram_dfi_p3_wrdata_en <= array_muxed27; |
| if (soclinux_sdram_trrdcon_valid) begin |
| soclinux_sdram_trrdcon_count <= 1'd1; |
| if (1'd0) begin |
| soclinux_sdram_trrdcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_trrdcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_trrdcon_ready)) begin |
| soclinux_sdram_trrdcon_count <= (soclinux_sdram_trrdcon_count - 1'd1); |
| if ((soclinux_sdram_trrdcon_count == 1'd1)) begin |
| soclinux_sdram_trrdcon_ready <= 1'd1; |
| end |
| end |
| end |
| soclinux_sdram_tfawcon_window <= {soclinux_sdram_tfawcon_window, soclinux_sdram_tfawcon_valid}; |
| if ((soclinux_sdram_tfawcon_count < 3'd4)) begin |
| if ((soclinux_sdram_tfawcon_count == 2'd3)) begin |
| soclinux_sdram_tfawcon_ready <= (~soclinux_sdram_tfawcon_valid); |
| end else begin |
| soclinux_sdram_tfawcon_ready <= 1'd1; |
| end |
| end |
| if (soclinux_sdram_tccdcon_valid) begin |
| soclinux_sdram_tccdcon_count <= 1'd0; |
| if (1'd1) begin |
| soclinux_sdram_tccdcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_tccdcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_tccdcon_ready)) begin |
| soclinux_sdram_tccdcon_count <= (soclinux_sdram_tccdcon_count - 1'd1); |
| if ((soclinux_sdram_tccdcon_count == 1'd1)) begin |
| soclinux_sdram_tccdcon_ready <= 1'd1; |
| end |
| end |
| end |
| if (soclinux_sdram_twtrcon_valid) begin |
| soclinux_sdram_twtrcon_count <= 3'd5; |
| if (1'd0) begin |
| soclinux_sdram_twtrcon_ready <= 1'd1; |
| end else begin |
| soclinux_sdram_twtrcon_ready <= 1'd0; |
| end |
| end else begin |
| if ((~soclinux_sdram_twtrcon_ready)) begin |
| soclinux_sdram_twtrcon_count <= (soclinux_sdram_twtrcon_count - 1'd1); |
| if ((soclinux_sdram_twtrcon_count == 1'd1)) begin |
| soclinux_sdram_twtrcon_ready <= 1'd1; |
| end |
| end |
| end |
| multiplexer_state <= multiplexer_next_state; |
| if (((roundrobin0_grant == 1'd0) & soclinux_sdram_interface_bank0_rdata_valid)) begin |
| rbank <= 1'd0; |
| end |
| if (((roundrobin0_grant == 1'd0) & soclinux_sdram_interface_bank0_wdata_ready)) begin |
| wbank <= 1'd0; |
| end |
| if (((roundrobin1_grant == 1'd0) & soclinux_sdram_interface_bank1_rdata_valid)) begin |
| rbank <= 1'd1; |
| end |
| if (((roundrobin1_grant == 1'd0) & soclinux_sdram_interface_bank1_wdata_ready)) begin |
| wbank <= 1'd1; |
| end |
| if (((roundrobin2_grant == 1'd0) & soclinux_sdram_interface_bank2_rdata_valid)) begin |
| rbank <= 2'd2; |
| end |
| if (((roundrobin2_grant == 1'd0) & soclinux_sdram_interface_bank2_wdata_ready)) begin |
| wbank <= 2'd2; |
| end |
| if (((roundrobin3_grant == 1'd0) & soclinux_sdram_interface_bank3_rdata_valid)) begin |
| rbank <= 2'd3; |
| end |
| if (((roundrobin3_grant == 1'd0) & soclinux_sdram_interface_bank3_wdata_ready)) begin |
| wbank <= 2'd3; |
| end |
| if (((roundrobin4_grant == 1'd0) & soclinux_sdram_interface_bank4_rdata_valid)) begin |
| rbank <= 3'd4; |
| end |
| if (((roundrobin4_grant == 1'd0) & soclinux_sdram_interface_bank4_wdata_ready)) begin |
| wbank <= 3'd4; |
| end |
| if (((roundrobin5_grant == 1'd0) & soclinux_sdram_interface_bank5_rdata_valid)) begin |
| rbank <= 3'd5; |
| end |
| if (((roundrobin5_grant == 1'd0) & soclinux_sdram_interface_bank5_wdata_ready)) begin |
| wbank <= 3'd5; |
| end |
| if (((roundrobin6_grant == 1'd0) & soclinux_sdram_interface_bank6_rdata_valid)) begin |
| rbank <= 3'd6; |
| end |
| if (((roundrobin6_grant == 1'd0) & soclinux_sdram_interface_bank6_wdata_ready)) begin |
| wbank <= 3'd6; |
| end |
| if (((roundrobin7_grant == 1'd0) & soclinux_sdram_interface_bank7_rdata_valid)) begin |
| rbank <= 3'd7; |
| end |
| if (((roundrobin7_grant == 1'd0) & soclinux_sdram_interface_bank7_wdata_ready)) begin |
| wbank <= 3'd7; |
| end |
| if (((roundrobin8_grant == 1'd0) & soclinux_sdram_interface_bank8_rdata_valid)) begin |
| rbank <= 4'd8; |
| end |
| if (((roundrobin8_grant == 1'd0) & soclinux_sdram_interface_bank8_wdata_ready)) begin |
| wbank <= 4'd8; |
| end |
| if (((roundrobin9_grant == 1'd0) & soclinux_sdram_interface_bank9_rdata_valid)) begin |
| rbank <= 4'd9; |
| end |
| if (((roundrobin9_grant == 1'd0) & soclinux_sdram_interface_bank9_wdata_ready)) begin |
| wbank <= 4'd9; |
| end |
| if (((roundrobin10_grant == 1'd0) & soclinux_sdram_interface_bank10_rdata_valid)) begin |
| rbank <= 4'd10; |
| end |
| if (((roundrobin10_grant == 1'd0) & soclinux_sdram_interface_bank10_wdata_ready)) begin |
| wbank <= 4'd10; |
| end |
| if (((roundrobin11_grant == 1'd0) & soclinux_sdram_interface_bank11_rdata_valid)) begin |
| rbank <= 4'd11; |
| end |
| if (((roundrobin11_grant == 1'd0) & soclinux_sdram_interface_bank11_wdata_ready)) begin |
| wbank <= 4'd11; |
| end |
| if (((roundrobin12_grant == 1'd0) & soclinux_sdram_interface_bank12_rdata_valid)) begin |
| rbank <= 4'd12; |
| end |
| if (((roundrobin12_grant == 1'd0) & soclinux_sdram_interface_bank12_wdata_ready)) begin |
| wbank <= 4'd12; |
| end |
| if (((roundrobin13_grant == 1'd0) & soclinux_sdram_interface_bank13_rdata_valid)) begin |
| rbank <= 4'd13; |
| end |
| if (((roundrobin13_grant == 1'd0) & soclinux_sdram_interface_bank13_wdata_ready)) begin |
| wbank <= 4'd13; |
| end |
| if (((roundrobin14_grant == 1'd0) & soclinux_sdram_interface_bank14_rdata_valid)) begin |
| rbank <= 4'd14; |
| end |
| if (((roundrobin14_grant == 1'd0) & soclinux_sdram_interface_bank14_wdata_ready)) begin |
| wbank <= 4'd14; |
| end |
| if (((roundrobin15_grant == 1'd0) & soclinux_sdram_interface_bank15_rdata_valid)) begin |
| rbank <= 4'd15; |
| end |
| if (((roundrobin15_grant == 1'd0) & soclinux_sdram_interface_bank15_wdata_ready)) begin |
| wbank <= 4'd15; |
| end |
| new_master_wdata_ready0 <= ((((((((((((((((1'd0 | ((roundrobin0_grant == 1'd0) & soclinux_sdram_interface_bank0_wdata_ready)) | ((roundrobin1_grant == 1'd0) & soclinux_sdram_interface_bank1_wdata_ready)) | ((roundrobin2_grant == 1'd0) & soclinux_sdram_interface_bank2_wdata_ready)) | ((roundrobin3_grant == 1'd0) & soclinux_sdram_interface_bank3_wdata_ready)) | ((roundrobin4_grant == 1'd0) & soclinux_sdram_interface_bank4_wdata_ready)) | ((roundrobin5_grant == 1'd0) & soclinux_sdram_interface_bank5_wdata_ready)) | ((roundrobin6_grant == 1'd0) & soclinux_sdram_interface_bank6_wdata_ready)) | ((roundrobin7_grant == 1'd0) & soclinux_sdram_interface_bank7_wdata_ready)) | ((roundrobin8_grant == 1'd0) & soclinux_sdram_interface_bank8_wdata_ready)) | ((roundrobin9_grant == 1'd0) & soclinux_sdram_interface_bank9_wdata_ready)) | ((roundrobin10_grant == 1'd0) & soclinux_sdram_interface_bank10_wdata_ready)) | ((roundrobin11_grant == 1'd0) & soclinux_sdram_interface_bank11_wdata_ready)) | ((roundrobin12_grant == 1'd0) & soclinux_sdram_interface_bank12_wdata_ready)) | ((roundrobin13_grant == 1'd0) & soclinux_sdram_interface_bank13_wdata_ready)) | ((roundrobin14_grant == 1'd0) & soclinux_sdram_interface_bank14_wdata_ready)) | ((roundrobin15_grant == 1'd0) & soclinux_sdram_interface_bank15_wdata_ready)); |
| new_master_wdata_ready1 <= new_master_wdata_ready0; |
| new_master_wdata_ready2 <= new_master_wdata_ready1; |
| new_master_wdata_ready3 <= new_master_wdata_ready2; |
| new_master_rdata_valid0 <= ((((((((((((((((1'd0 | ((roundrobin0_grant == 1'd0) & soclinux_sdram_interface_bank0_rdata_valid)) | ((roundrobin1_grant == 1'd0) & soclinux_sdram_interface_bank1_rdata_valid)) | ((roundrobin2_grant == 1'd0) & soclinux_sdram_interface_bank2_rdata_valid)) | ((roundrobin3_grant == 1'd0) & soclinux_sdram_interface_bank3_rdata_valid)) | ((roundrobin4_grant == 1'd0) & soclinux_sdram_interface_bank4_rdata_valid)) | ((roundrobin5_grant == 1'd0) & soclinux_sdram_interface_bank5_rdata_valid)) | ((roundrobin6_grant == 1'd0) & soclinux_sdram_interface_bank6_rdata_valid)) | ((roundrobin7_grant == 1'd0) & soclinux_sdram_interface_bank7_rdata_valid)) | ((roundrobin8_grant == 1'd0) & soclinux_sdram_interface_bank8_rdata_valid)) | ((roundrobin9_grant == 1'd0) & soclinux_sdram_interface_bank9_rdata_valid)) | ((roundrobin10_grant == 1'd0) & soclinux_sdram_interface_bank10_rdata_valid)) | ((roundrobin11_grant == 1'd0) & soclinux_sdram_interface_bank11_rdata_valid)) | ((roundrobin12_grant == 1'd0) & soclinux_sdram_interface_bank12_rdata_valid)) | ((roundrobin13_grant == 1'd0) & soclinux_sdram_interface_bank13_rdata_valid)) | ((roundrobin14_grant == 1'd0) & soclinux_sdram_interface_bank14_rdata_valid)) | ((roundrobin15_grant == 1'd0) & soclinux_sdram_interface_bank15_rdata_valid)); |
| new_master_rdata_valid1 <= new_master_rdata_valid0; |
| new_master_rdata_valid2 <= new_master_rdata_valid1; |
| new_master_rdata_valid3 <= new_master_rdata_valid2; |
| new_master_rdata_valid4 <= new_master_rdata_valid3; |
| new_master_rdata_valid5 <= new_master_rdata_valid4; |
| new_master_rdata_valid6 <= new_master_rdata_valid5; |
| new_master_rdata_valid7 <= new_master_rdata_valid6; |
| new_master_rdata_valid8 <= new_master_rdata_valid7; |
| soclinux_adr_offset_r <= soclinux_wb_sdram_adr[2:0]; |
| fullmemorywe_state <= fullmemorywe_next_state; |
| litedramwishbone2native_state <= litedramwishbone2native_next_state; |
| if (soclinux_count_next_value_ce) begin |
| soclinux_count <= soclinux_count_next_value; |
| end |
| emulator_ram_bus_ack <= 1'd0; |
| if (((emulator_ram_bus_cyc & emulator_ram_bus_stb) & (~emulator_ram_bus_ack))) begin |
| emulator_ram_bus_ack <= 1'd1; |
| end |
| case (grant) |
| 1'd0: begin |
| if ((~request[0])) begin |
| if (request[1]) begin |
| grant <= 1'd1; |
| end |
| end |
| end |
| 1'd1: begin |
| if ((~request[1])) begin |
| if (request[0]) begin |
| grant <= 1'd0; |
| end |
| end |
| end |
| endcase |
| slave_sel_r <= slave_sel; |
| if (wait_1) begin |
| if ((~done)) begin |
| count <= (count - 1'd1); |
| end |
| end else begin |
| count <= 20'd1000000; |
| end |
| interface0_bank_bus_dat_r <= 1'd0; |
| if (csrbank0_sel) begin |
| case (interface0_bank_bus_adr[4:0]) |
| 1'd0: begin |
| interface0_bank_bus_dat_r <= soclinux_soclinux_cpu_latch_w; |
| end |
| 1'd1: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time7_w; |
| end |
| 2'd2: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time6_w; |
| end |
| 2'd3: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time5_w; |
| end |
| 3'd4: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time4_w; |
| end |
| 3'd5: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time3_w; |
| end |
| 3'd6: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time2_w; |
| end |
| 3'd7: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time1_w; |
| end |
| 4'd8: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time0_w; |
| end |
| 4'd9: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time_cmp7_w; |
| end |
| 4'd10: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time_cmp6_w; |
| end |
| 4'd11: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time_cmp5_w; |
| end |
| 4'd12: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time_cmp4_w; |
| end |
| 4'd13: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time_cmp3_w; |
| end |
| 4'd14: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time_cmp2_w; |
| end |
| 4'd15: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time_cmp1_w; |
| end |
| 5'd16: begin |
| interface0_bank_bus_dat_r <= csrbank0_timer_time_cmp0_w; |
| end |
| endcase |
| end |
| if (csrbank0_timer_time_cmp7_re) begin |
| soclinux_soclinux_cpu_time_cmp_storage[63:56] <= csrbank0_timer_time_cmp7_r; |
| end |
| if (csrbank0_timer_time_cmp6_re) begin |
| soclinux_soclinux_cpu_time_cmp_storage[55:48] <= csrbank0_timer_time_cmp6_r; |
| end |
| if (csrbank0_timer_time_cmp5_re) begin |
| soclinux_soclinux_cpu_time_cmp_storage[47:40] <= csrbank0_timer_time_cmp5_r; |
| end |
| if (csrbank0_timer_time_cmp4_re) begin |
| soclinux_soclinux_cpu_time_cmp_storage[39:32] <= csrbank0_timer_time_cmp4_r; |
| end |
| if (csrbank0_timer_time_cmp3_re) begin |
| soclinux_soclinux_cpu_time_cmp_storage[31:24] <= csrbank0_timer_time_cmp3_r; |
| end |
| if (csrbank0_timer_time_cmp2_re) begin |
| soclinux_soclinux_cpu_time_cmp_storage[23:16] <= csrbank0_timer_time_cmp2_r; |
| end |
| if (csrbank0_timer_time_cmp1_re) begin |
| soclinux_soclinux_cpu_time_cmp_storage[15:8] <= csrbank0_timer_time_cmp1_r; |
| end |
| if (csrbank0_timer_time_cmp0_re) begin |
| soclinux_soclinux_cpu_time_cmp_storage[7:0] <= csrbank0_timer_time_cmp0_r; |
| end |
| soclinux_soclinux_cpu_time_cmp_re <= csrbank0_timer_time_cmp0_re; |
| interface1_bank_bus_dat_r <= 1'd0; |
| if (csrbank1_sel) begin |
| case (interface1_bank_bus_adr[3:0]) |
| 1'd0: begin |
| interface1_bank_bus_dat_r <= csrbank1_reset0_w; |
| end |
| 1'd1: begin |
| interface1_bank_bus_dat_r <= csrbank1_scratch3_w; |
| end |
| 2'd2: begin |
| interface1_bank_bus_dat_r <= csrbank1_scratch2_w; |
| end |
| 2'd3: begin |
| interface1_bank_bus_dat_r <= csrbank1_scratch1_w; |
| end |
| 3'd4: begin |
| interface1_bank_bus_dat_r <= csrbank1_scratch0_w; |
| end |
| 3'd5: begin |
| interface1_bank_bus_dat_r <= csrbank1_bus_errors3_w; |
| end |
| 3'd6: begin |
| interface1_bank_bus_dat_r <= csrbank1_bus_errors2_w; |
| end |
| 3'd7: begin |
| interface1_bank_bus_dat_r <= csrbank1_bus_errors1_w; |
| end |
| 4'd8: begin |
| interface1_bank_bus_dat_r <= csrbank1_bus_errors0_w; |
| end |
| endcase |
| end |
| if (csrbank1_reset0_re) begin |
| soclinux_soclinux_soccontroller_reset_storage <= csrbank1_reset0_r; |
| end |
| soclinux_soclinux_soccontroller_reset_re <= csrbank1_reset0_re; |
| if (csrbank1_scratch3_re) begin |
| soclinux_soclinux_soccontroller_scratch_storage[31:24] <= csrbank1_scratch3_r; |
| end |
| if (csrbank1_scratch2_re) begin |
| soclinux_soclinux_soccontroller_scratch_storage[23:16] <= csrbank1_scratch2_r; |
| end |
| if (csrbank1_scratch1_re) begin |
| soclinux_soclinux_soccontroller_scratch_storage[15:8] <= csrbank1_scratch1_r; |
| end |
| if (csrbank1_scratch0_re) begin |
| soclinux_soclinux_soccontroller_scratch_storage[7:0] <= csrbank1_scratch0_r; |
| end |
| soclinux_soclinux_soccontroller_scratch_re <= csrbank1_scratch0_re; |
| interface2_bank_bus_dat_r <= 1'd0; |
| if (csrbank2_sel) begin |
| case (interface2_bank_bus_adr[3:0]) |
| 1'd0: begin |
| interface2_bank_bus_dat_r <= csrbank2_en_vtc0_w; |
| end |
| 1'd1: begin |
| interface2_bank_bus_dat_r <= csrbank2_half_sys8x_taps1_w; |
| end |
| 2'd2: begin |
| interface2_bank_bus_dat_r <= csrbank2_half_sys8x_taps0_w; |
| end |
| 2'd3: begin |
| interface2_bank_bus_dat_r <= csrbank2_wlevel_en0_w; |
| end |
| 3'd4: begin |
| interface2_bank_bus_dat_r <= soclinux_usddrphy_wlevel_strobe_w; |
| end |
| 3'd5: begin |
| interface2_bank_bus_dat_r <= soclinux_usddrphy_cdly_rst_w; |
| end |
| 3'd6: begin |
| interface2_bank_bus_dat_r <= soclinux_usddrphy_cdly_inc_w; |
| end |
| 3'd7: begin |
| interface2_bank_bus_dat_r <= csrbank2_dly_sel0_w; |
| end |
| 4'd8: begin |
| interface2_bank_bus_dat_r <= soclinux_usddrphy_rdly_dq_rst_w; |
| end |
| 4'd9: begin |
| interface2_bank_bus_dat_r <= soclinux_usddrphy_rdly_dq_inc_w; |
| end |
| 4'd10: begin |
| interface2_bank_bus_dat_r <= soclinux_usddrphy_rdly_dq_bitslip_rst_w; |
| end |
| 4'd11: begin |
| interface2_bank_bus_dat_r <= soclinux_usddrphy_rdly_dq_bitslip_w; |
| end |
| 4'd12: begin |
| interface2_bank_bus_dat_r <= soclinux_usddrphy_wdly_dq_rst_w; |
| end |
| 4'd13: begin |
| interface2_bank_bus_dat_r <= soclinux_usddrphy_wdly_dq_inc_w; |
| end |
| 4'd14: begin |
| interface2_bank_bus_dat_r <= soclinux_usddrphy_wdly_dqs_rst_w; |
| end |
| 4'd15: begin |
| interface2_bank_bus_dat_r <= soclinux_usddrphy_wdly_dqs_inc_w; |
| end |
| endcase |
| end |
| if (csrbank2_en_vtc0_re) begin |
| soclinux_usddrphy_en_vtc_storage <= csrbank2_en_vtc0_r; |
| end |
| soclinux_usddrphy_en_vtc_re <= csrbank2_en_vtc0_re; |
| if (csrbank2_wlevel_en0_re) begin |
| soclinux_usddrphy_wlevel_en_storage <= csrbank2_wlevel_en0_r; |
| end |
| soclinux_usddrphy_wlevel_en_re <= csrbank2_wlevel_en0_re; |
| if (csrbank2_dly_sel0_re) begin |
| soclinux_usddrphy_dly_sel_storage[3:0] <= csrbank2_dly_sel0_r; |
| end |
| soclinux_usddrphy_dly_sel_re <= csrbank2_dly_sel0_re; |
| interface3_bank_bus_dat_r <= 1'd0; |
| if (csrbank3_sel) begin |
| case (interface3_bank_bus_adr[6:0]) |
| 1'd0: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_control0_w; |
| end |
| 1'd1: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_command0_w; |
| end |
| 2'd2: begin |
| interface3_bank_bus_dat_r <= soclinux_sdram_phaseinjector0_command_issue_w; |
| end |
| 2'd3: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_address1_w; |
| end |
| 3'd4: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_address0_w; |
| end |
| 3'd5: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_baddress0_w; |
| end |
| 3'd6: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_wrdata7_w; |
| end |
| 3'd7: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_wrdata6_w; |
| end |
| 4'd8: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_wrdata5_w; |
| end |
| 4'd9: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_wrdata4_w; |
| end |
| 4'd10: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_wrdata3_w; |
| end |
| 4'd11: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_wrdata2_w; |
| end |
| 4'd12: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_wrdata1_w; |
| end |
| 4'd13: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_wrdata0_w; |
| end |
| 4'd14: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_rddata7_w; |
| end |
| 4'd15: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_rddata6_w; |
| end |
| 5'd16: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_rddata5_w; |
| end |
| 5'd17: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_rddata4_w; |
| end |
| 5'd18: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_rddata3_w; |
| end |
| 5'd19: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_rddata2_w; |
| end |
| 5'd20: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_rddata1_w; |
| end |
| 5'd21: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi0_rddata0_w; |
| end |
| 5'd22: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_command0_w; |
| end |
| 5'd23: begin |
| interface3_bank_bus_dat_r <= soclinux_sdram_phaseinjector1_command_issue_w; |
| end |
| 5'd24: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_address1_w; |
| end |
| 5'd25: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_address0_w; |
| end |
| 5'd26: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_baddress0_w; |
| end |
| 5'd27: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_wrdata7_w; |
| end |
| 5'd28: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_wrdata6_w; |
| end |
| 5'd29: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_wrdata5_w; |
| end |
| 5'd30: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_wrdata4_w; |
| end |
| 5'd31: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_wrdata3_w; |
| end |
| 6'd32: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_wrdata2_w; |
| end |
| 6'd33: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_wrdata1_w; |
| end |
| 6'd34: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_wrdata0_w; |
| end |
| 6'd35: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_rddata7_w; |
| end |
| 6'd36: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_rddata6_w; |
| end |
| 6'd37: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_rddata5_w; |
| end |
| 6'd38: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_rddata4_w; |
| end |
| 6'd39: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_rddata3_w; |
| end |
| 6'd40: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_rddata2_w; |
| end |
| 6'd41: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_rddata1_w; |
| end |
| 6'd42: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi1_rddata0_w; |
| end |
| 6'd43: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_command0_w; |
| end |
| 6'd44: begin |
| interface3_bank_bus_dat_r <= soclinux_sdram_phaseinjector2_command_issue_w; |
| end |
| 6'd45: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_address1_w; |
| end |
| 6'd46: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_address0_w; |
| end |
| 6'd47: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_baddress0_w; |
| end |
| 6'd48: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_wrdata7_w; |
| end |
| 6'd49: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_wrdata6_w; |
| end |
| 6'd50: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_wrdata5_w; |
| end |
| 6'd51: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_wrdata4_w; |
| end |
| 6'd52: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_wrdata3_w; |
| end |
| 6'd53: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_wrdata2_w; |
| end |
| 6'd54: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_wrdata1_w; |
| end |
| 6'd55: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_wrdata0_w; |
| end |
| 6'd56: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_rddata7_w; |
| end |
| 6'd57: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_rddata6_w; |
| end |
| 6'd58: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_rddata5_w; |
| end |
| 6'd59: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_rddata4_w; |
| end |
| 6'd60: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_rddata3_w; |
| end |
| 6'd61: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_rddata2_w; |
| end |
| 6'd62: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_rddata1_w; |
| end |
| 6'd63: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi2_rddata0_w; |
| end |
| 7'd64: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_command0_w; |
| end |
| 7'd65: begin |
| interface3_bank_bus_dat_r <= soclinux_sdram_phaseinjector3_command_issue_w; |
| end |
| 7'd66: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_address1_w; |
| end |
| 7'd67: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_address0_w; |
| end |
| 7'd68: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_baddress0_w; |
| end |
| 7'd69: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_wrdata7_w; |
| end |
| 7'd70: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_wrdata6_w; |
| end |
| 7'd71: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_wrdata5_w; |
| end |
| 7'd72: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_wrdata4_w; |
| end |
| 7'd73: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_wrdata3_w; |
| end |
| 7'd74: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_wrdata2_w; |
| end |
| 7'd75: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_wrdata1_w; |
| end |
| 7'd76: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_wrdata0_w; |
| end |
| 7'd77: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_rddata7_w; |
| end |
| 7'd78: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_rddata6_w; |
| end |
| 7'd79: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_rddata5_w; |
| end |
| 7'd80: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_rddata4_w; |
| end |
| 7'd81: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_rddata3_w; |
| end |
| 7'd82: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_rddata2_w; |
| end |
| 7'd83: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_rddata1_w; |
| end |
| 7'd84: begin |
| interface3_bank_bus_dat_r <= csrbank3_dfii_pi3_rddata0_w; |
| end |
| endcase |
| end |
| if (csrbank3_dfii_control0_re) begin |
| soclinux_sdram_storage[3:0] <= csrbank3_dfii_control0_r; |
| end |
| soclinux_sdram_re <= csrbank3_dfii_control0_re; |
| if (csrbank3_dfii_pi0_command0_re) begin |
| soclinux_sdram_phaseinjector0_command_storage[5:0] <= csrbank3_dfii_pi0_command0_r; |
| end |
| soclinux_sdram_phaseinjector0_command_re <= csrbank3_dfii_pi0_command0_re; |
| if (csrbank3_dfii_pi0_address1_re) begin |
| soclinux_sdram_phaseinjector0_address_storage[14:8] <= csrbank3_dfii_pi0_address1_r; |
| end |
| if (csrbank3_dfii_pi0_address0_re) begin |
| soclinux_sdram_phaseinjector0_address_storage[7:0] <= csrbank3_dfii_pi0_address0_r; |
| end |
| soclinux_sdram_phaseinjector0_address_re <= csrbank3_dfii_pi0_address0_re; |
| if (csrbank3_dfii_pi0_baddress0_re) begin |
| soclinux_sdram_phaseinjector0_baddress_storage[3:0] <= csrbank3_dfii_pi0_baddress0_r; |
| end |
| soclinux_sdram_phaseinjector0_baddress_re <= csrbank3_dfii_pi0_baddress0_re; |
| if (csrbank3_dfii_pi0_wrdata7_re) begin |
| soclinux_sdram_phaseinjector0_wrdata_storage[63:56] <= csrbank3_dfii_pi0_wrdata7_r; |
| end |
| if (csrbank3_dfii_pi0_wrdata6_re) begin |
| soclinux_sdram_phaseinjector0_wrdata_storage[55:48] <= csrbank3_dfii_pi0_wrdata6_r; |
| end |
| if (csrbank3_dfii_pi0_wrdata5_re) begin |
| soclinux_sdram_phaseinjector0_wrdata_storage[47:40] <= csrbank3_dfii_pi0_wrdata5_r; |
| end |
| if (csrbank3_dfii_pi0_wrdata4_re) begin |
| soclinux_sdram_phaseinjector0_wrdata_storage[39:32] <= csrbank3_dfii_pi0_wrdata4_r; |
| end |
| if (csrbank3_dfii_pi0_wrdata3_re) begin |
| soclinux_sdram_phaseinjector0_wrdata_storage[31:24] <= csrbank3_dfii_pi0_wrdata3_r; |
| end |
| if (csrbank3_dfii_pi0_wrdata2_re) begin |
| soclinux_sdram_phaseinjector0_wrdata_storage[23:16] <= csrbank3_dfii_pi0_wrdata2_r; |
| end |
| if (csrbank3_dfii_pi0_wrdata1_re) begin |
| soclinux_sdram_phaseinjector0_wrdata_storage[15:8] <= csrbank3_dfii_pi0_wrdata1_r; |
| end |
| if (csrbank3_dfii_pi0_wrdata0_re) begin |
| soclinux_sdram_phaseinjector0_wrdata_storage[7:0] <= csrbank3_dfii_pi0_wrdata0_r; |
| end |
| soclinux_sdram_phaseinjector0_wrdata_re <= csrbank3_dfii_pi0_wrdata0_re; |
| if (csrbank3_dfii_pi1_command0_re) begin |
| soclinux_sdram_phaseinjector1_command_storage[5:0] <= csrbank3_dfii_pi1_command0_r; |
| end |
| soclinux_sdram_phaseinjector1_command_re <= csrbank3_dfii_pi1_command0_re; |
| if (csrbank3_dfii_pi1_address1_re) begin |
| soclinux_sdram_phaseinjector1_address_storage[14:8] <= csrbank3_dfii_pi1_address1_r; |
| end |
| if (csrbank3_dfii_pi1_address0_re) begin |
| soclinux_sdram_phaseinjector1_address_storage[7:0] <= csrbank3_dfii_pi1_address0_r; |
| end |
| soclinux_sdram_phaseinjector1_address_re <= csrbank3_dfii_pi1_address0_re; |
| if (csrbank3_dfii_pi1_baddress0_re) begin |
| soclinux_sdram_phaseinjector1_baddress_storage[3:0] <= csrbank3_dfii_pi1_baddress0_r; |
| end |
| soclinux_sdram_phaseinjector1_baddress_re <= csrbank3_dfii_pi1_baddress0_re; |
| if (csrbank3_dfii_pi1_wrdata7_re) begin |
| soclinux_sdram_phaseinjector1_wrdata_storage[63:56] <= csrbank3_dfii_pi1_wrdata7_r; |
| end |
| if (csrbank3_dfii_pi1_wrdata6_re) begin |
| soclinux_sdram_phaseinjector1_wrdata_storage[55:48] <= csrbank3_dfii_pi1_wrdata6_r; |
| end |
| if (csrbank3_dfii_pi1_wrdata5_re) begin |
| soclinux_sdram_phaseinjector1_wrdata_storage[47:40] <= csrbank3_dfii_pi1_wrdata5_r; |
| end |
| if (csrbank3_dfii_pi1_wrdata4_re) begin |
| soclinux_sdram_phaseinjector1_wrdata_storage[39:32] <= csrbank3_dfii_pi1_wrdata4_r; |
| end |
| if (csrbank3_dfii_pi1_wrdata3_re) begin |
| soclinux_sdram_phaseinjector1_wrdata_storage[31:24] <= csrbank3_dfii_pi1_wrdata3_r; |
| end |
| if (csrbank3_dfii_pi1_wrdata2_re) begin |
| soclinux_sdram_phaseinjector1_wrdata_storage[23:16] <= csrbank3_dfii_pi1_wrdata2_r; |
| end |
| if (csrbank3_dfii_pi1_wrdata1_re) begin |
| soclinux_sdram_phaseinjector1_wrdata_storage[15:8] <= csrbank3_dfii_pi1_wrdata1_r; |
| end |
| if (csrbank3_dfii_pi1_wrdata0_re) begin |
| soclinux_sdram_phaseinjector1_wrdata_storage[7:0] <= csrbank3_dfii_pi1_wrdata0_r; |
| end |
| soclinux_sdram_phaseinjector1_wrdata_re <= csrbank3_dfii_pi1_wrdata0_re; |
| if (csrbank3_dfii_pi2_command0_re) begin |
| soclinux_sdram_phaseinjector2_command_storage[5:0] <= csrbank3_dfii_pi2_command0_r; |
| end |
| soclinux_sdram_phaseinjector2_command_re <= csrbank3_dfii_pi2_command0_re; |
| if (csrbank3_dfii_pi2_address1_re) begin |
| soclinux_sdram_phaseinjector2_address_storage[14:8] <= csrbank3_dfii_pi2_address1_r; |
| end |
| if (csrbank3_dfii_pi2_address0_re) begin |
| soclinux_sdram_phaseinjector2_address_storage[7:0] <= csrbank3_dfii_pi2_address0_r; |
| end |
| soclinux_sdram_phaseinjector2_address_re <= csrbank3_dfii_pi2_address0_re; |
| if (csrbank3_dfii_pi2_baddress0_re) begin |
| soclinux_sdram_phaseinjector2_baddress_storage[3:0] <= csrbank3_dfii_pi2_baddress0_r; |
| end |
| soclinux_sdram_phaseinjector2_baddress_re <= csrbank3_dfii_pi2_baddress0_re; |
| if (csrbank3_dfii_pi2_wrdata7_re) begin |
| soclinux_sdram_phaseinjector2_wrdata_storage[63:56] <= csrbank3_dfii_pi2_wrdata7_r; |
| end |
| if (csrbank3_dfii_pi2_wrdata6_re) begin |
| soclinux_sdram_phaseinjector2_wrdata_storage[55:48] <= csrbank3_dfii_pi2_wrdata6_r; |
| end |
| if (csrbank3_dfii_pi2_wrdata5_re) begin |
| soclinux_sdram_phaseinjector2_wrdata_storage[47:40] <= csrbank3_dfii_pi2_wrdata5_r; |
| end |
| if (csrbank3_dfii_pi2_wrdata4_re) begin |
| soclinux_sdram_phaseinjector2_wrdata_storage[39:32] <= csrbank3_dfii_pi2_wrdata4_r; |
| end |
| if (csrbank3_dfii_pi2_wrdata3_re) begin |
| soclinux_sdram_phaseinjector2_wrdata_storage[31:24] <= csrbank3_dfii_pi2_wrdata3_r; |
| end |
| if (csrbank3_dfii_pi2_wrdata2_re) begin |
| soclinux_sdram_phaseinjector2_wrdata_storage[23:16] <= csrbank3_dfii_pi2_wrdata2_r; |
| end |
| if (csrbank3_dfii_pi2_wrdata1_re) begin |
| soclinux_sdram_phaseinjector2_wrdata_storage[15:8] <= csrbank3_dfii_pi2_wrdata1_r; |
| end |
| if (csrbank3_dfii_pi2_wrdata0_re) begin |
| soclinux_sdram_phaseinjector2_wrdata_storage[7:0] <= csrbank3_dfii_pi2_wrdata0_r; |
| end |
| soclinux_sdram_phaseinjector2_wrdata_re <= csrbank3_dfii_pi2_wrdata0_re; |
| if (csrbank3_dfii_pi3_command0_re) begin |
| soclinux_sdram_phaseinjector3_command_storage[5:0] <= csrbank3_dfii_pi3_command0_r; |
| end |
| soclinux_sdram_phaseinjector3_command_re <= csrbank3_dfii_pi3_command0_re; |
| if (csrbank3_dfii_pi3_address1_re) begin |
| soclinux_sdram_phaseinjector3_address_storage[14:8] <= csrbank3_dfii_pi3_address1_r; |
| end |
| if (csrbank3_dfii_pi3_address0_re) begin |
| soclinux_sdram_phaseinjector3_address_storage[7:0] <= csrbank3_dfii_pi3_address0_r; |
| end |
| soclinux_sdram_phaseinjector3_address_re <= csrbank3_dfii_pi3_address0_re; |
| if (csrbank3_dfii_pi3_baddress0_re) begin |
| soclinux_sdram_phaseinjector3_baddress_storage[3:0] <= csrbank3_dfii_pi3_baddress0_r; |
| end |
| soclinux_sdram_phaseinjector3_baddress_re <= csrbank3_dfii_pi3_baddress0_re; |
| if (csrbank3_dfii_pi3_wrdata7_re) begin |
| soclinux_sdram_phaseinjector3_wrdata_storage[63:56] <= csrbank3_dfii_pi3_wrdata7_r; |
| end |
| if (csrbank3_dfii_pi3_wrdata6_re) begin |
| soclinux_sdram_phaseinjector3_wrdata_storage[55:48] <= csrbank3_dfii_pi3_wrdata6_r; |
| end |
| if (csrbank3_dfii_pi3_wrdata5_re) begin |
| soclinux_sdram_phaseinjector3_wrdata_storage[47:40] <= csrbank3_dfii_pi3_wrdata5_r; |
| end |
| if (csrbank3_dfii_pi3_wrdata4_re) begin |
| soclinux_sdram_phaseinjector3_wrdata_storage[39:32] <= csrbank3_dfii_pi3_wrdata4_r; |
| end |
| if (csrbank3_dfii_pi3_wrdata3_re) begin |
| soclinux_sdram_phaseinjector3_wrdata_storage[31:24] <= csrbank3_dfii_pi3_wrdata3_r; |
| end |
| if (csrbank3_dfii_pi3_wrdata2_re) begin |
| soclinux_sdram_phaseinjector3_wrdata_storage[23:16] <= csrbank3_dfii_pi3_wrdata2_r; |
| end |
| if (csrbank3_dfii_pi3_wrdata1_re) begin |
| soclinux_sdram_phaseinjector3_wrdata_storage[15:8] <= csrbank3_dfii_pi3_wrdata1_r; |
| end |
| if (csrbank3_dfii_pi3_wrdata0_re) begin |
| soclinux_sdram_phaseinjector3_wrdata_storage[7:0] <= csrbank3_dfii_pi3_wrdata0_r; |
| end |
| soclinux_sdram_phaseinjector3_wrdata_re <= csrbank3_dfii_pi3_wrdata0_re; |
| interface4_bank_bus_dat_r <= 1'd0; |
| if (csrbank4_sel) begin |
| case (interface4_bank_bus_adr[4:0]) |
| 1'd0: begin |
| interface4_bank_bus_dat_r <= csrbank4_load3_w; |
| end |
| 1'd1: begin |
| interface4_bank_bus_dat_r <= csrbank4_load2_w; |
| end |
| 2'd2: begin |
| interface4_bank_bus_dat_r <= csrbank4_load1_w; |
| end |
| 2'd3: begin |
| interface4_bank_bus_dat_r <= csrbank4_load0_w; |
| end |
| 3'd4: begin |
| interface4_bank_bus_dat_r <= csrbank4_reload3_w; |
| end |
| 3'd5: begin |
| interface4_bank_bus_dat_r <= csrbank4_reload2_w; |
| end |
| 3'd6: begin |
| interface4_bank_bus_dat_r <= csrbank4_reload1_w; |
| end |
| 3'd7: begin |
| interface4_bank_bus_dat_r <= csrbank4_reload0_w; |
| end |
| 4'd8: begin |
| interface4_bank_bus_dat_r <= csrbank4_en0_w; |
| end |
| 4'd9: begin |
| interface4_bank_bus_dat_r <= csrbank4_update_value0_w; |
| end |
| 4'd10: begin |
| interface4_bank_bus_dat_r <= csrbank4_value3_w; |
| end |
| 4'd11: begin |
| interface4_bank_bus_dat_r <= csrbank4_value2_w; |
| end |
| 4'd12: begin |
| interface4_bank_bus_dat_r <= csrbank4_value1_w; |
| end |
| 4'd13: begin |
| interface4_bank_bus_dat_r <= csrbank4_value0_w; |
| end |
| 4'd14: begin |
| interface4_bank_bus_dat_r <= soclinux_soclinux_timer_eventmanager_status_w; |
| end |
| 4'd15: begin |
| interface4_bank_bus_dat_r <= soclinux_soclinux_timer_eventmanager_pending_w; |
| end |
| 5'd16: begin |
| interface4_bank_bus_dat_r <= csrbank4_ev_enable0_w; |
| end |
| endcase |
| end |
| if (csrbank4_load3_re) begin |
| soclinux_soclinux_timer_load_storage[31:24] <= csrbank4_load3_r; |
| end |
| if (csrbank4_load2_re) begin |
| soclinux_soclinux_timer_load_storage[23:16] <= csrbank4_load2_r; |
| end |
| if (csrbank4_load1_re) begin |
| soclinux_soclinux_timer_load_storage[15:8] <= csrbank4_load1_r; |
| end |
| if (csrbank4_load0_re) begin |
| soclinux_soclinux_timer_load_storage[7:0] <= csrbank4_load0_r; |
| end |
| soclinux_soclinux_timer_load_re <= csrbank4_load0_re; |
| if (csrbank4_reload3_re) begin |
| soclinux_soclinux_timer_reload_storage[31:24] <= csrbank4_reload3_r; |
| end |
| if (csrbank4_reload2_re) begin |
| soclinux_soclinux_timer_reload_storage[23:16] <= csrbank4_reload2_r; |
| end |
| if (csrbank4_reload1_re) begin |
| soclinux_soclinux_timer_reload_storage[15:8] <= csrbank4_reload1_r; |
| end |
| if (csrbank4_reload0_re) begin |
| soclinux_soclinux_timer_reload_storage[7:0] <= csrbank4_reload0_r; |
| end |
| soclinux_soclinux_timer_reload_re <= csrbank4_reload0_re; |
| if (csrbank4_en0_re) begin |
| soclinux_soclinux_timer_en_storage <= csrbank4_en0_r; |
| end |
| soclinux_soclinux_timer_en_re <= csrbank4_en0_re; |
| if (csrbank4_update_value0_re) begin |
| soclinux_soclinux_timer_update_value_storage <= csrbank4_update_value0_r; |
| end |
| soclinux_soclinux_timer_update_value_re <= csrbank4_update_value0_re; |
| if (csrbank4_ev_enable0_re) begin |
| soclinux_soclinux_timer_eventmanager_storage <= csrbank4_ev_enable0_r; |
| end |
| soclinux_soclinux_timer_eventmanager_re <= csrbank4_ev_enable0_re; |
| interface5_bank_bus_dat_r <= 1'd0; |
| if (csrbank5_sel) begin |
| case (interface5_bank_bus_adr[2:0]) |
| 1'd0: begin |
| interface5_bank_bus_dat_r <= soclinux_soclinux_uart_rxtx_w; |
| end |
| 1'd1: begin |
| interface5_bank_bus_dat_r <= csrbank5_txfull_w; |
| end |
| 2'd2: begin |
| interface5_bank_bus_dat_r <= csrbank5_rxempty_w; |
| end |
| 2'd3: begin |
| interface5_bank_bus_dat_r <= soclinux_soclinux_uart_eventmanager_status_w; |
| end |
| 3'd4: begin |
| interface5_bank_bus_dat_r <= soclinux_soclinux_uart_eventmanager_pending_w; |
| end |
| 3'd5: begin |
| interface5_bank_bus_dat_r <= csrbank5_ev_enable0_w; |
| end |
| endcase |
| end |
| if (csrbank5_ev_enable0_re) begin |
| soclinux_soclinux_uart_eventmanager_storage[1:0] <= csrbank5_ev_enable0_r; |
| end |
| soclinux_soclinux_uart_eventmanager_re <= csrbank5_ev_enable0_re; |
| interface6_bank_bus_dat_r <= 1'd0; |
| if (csrbank6_sel) begin |
| case (interface6_bank_bus_adr[1:0]) |
| 1'd0: begin |
| interface6_bank_bus_dat_r <= csrbank6_tuning_word3_w; |
| end |
| 1'd1: begin |
| interface6_bank_bus_dat_r <= csrbank6_tuning_word2_w; |
| end |
| 2'd2: begin |
| interface6_bank_bus_dat_r <= csrbank6_tuning_word1_w; |
| end |
| 2'd3: begin |
| interface6_bank_bus_dat_r <= csrbank6_tuning_word0_w; |
| end |
| endcase |
| end |
| if (csrbank6_tuning_word3_re) begin |
| soclinux_soclinux_storage[31:24] <= csrbank6_tuning_word3_r; |
| end |
| if (csrbank6_tuning_word2_re) begin |
| soclinux_soclinux_storage[23:16] <= csrbank6_tuning_word2_r; |
| end |
| if (csrbank6_tuning_word1_re) begin |
| soclinux_soclinux_storage[15:8] <= csrbank6_tuning_word1_r; |
| end |
| if (csrbank6_tuning_word0_re) begin |
| soclinux_soclinux_storage[7:0] <= csrbank6_tuning_word0_r; |
| end |
| soclinux_soclinux_re <= csrbank6_tuning_word0_re; |
| if (sys_rst) begin |
| soclinux_soclinux_soccontroller_reset_storage <= 1'd0; |
| soclinux_soclinux_soccontroller_reset_re <= 1'd0; |
| soclinux_soclinux_soccontroller_scratch_storage <= 32'd305419896; |
| soclinux_soclinux_soccontroller_scratch_re <= 1'd0; |
| soclinux_soclinux_soccontroller_bus_errors <= 32'd0; |
| soclinux_soclinux_cpu_time_status <= 64'd0; |
| soclinux_soclinux_cpu_time_cmp_storage <= 64'd18446744073709551615; |
| soclinux_soclinux_cpu_time_cmp_re <= 1'd0; |
| soclinux_soclinux_cpu_time <= 64'd0; |
| soclinux_soclinux_cpu_time_cmp <= 64'd18446744073709551615; |
| soclinux_soclinux_soclinux_ram_bus_ack <= 1'd0; |
| soclinux_soclinux_ram_bus_ram_bus_ack <= 1'd0; |
| serial_tx <= 1'd1; |
| soclinux_soclinux_storage <= 32'd34359738; |
| soclinux_soclinux_re <= 1'd0; |
| soclinux_soclinux_sink_ready <= 1'd0; |
| soclinux_soclinux_uart_clk_txen <= 1'd0; |
| soclinux_soclinux_phase_accumulator_tx <= 32'd0; |
| soclinux_soclinux_tx_reg <= 8'd0; |
| soclinux_soclinux_tx_bitcount <= 4'd0; |
| soclinux_soclinux_tx_busy <= 1'd0; |
| soclinux_soclinux_source_valid <= 1'd0; |
| soclinux_soclinux_source_payload_data <= 8'd0; |
| soclinux_soclinux_uart_clk_rxen <= 1'd0; |
| soclinux_soclinux_phase_accumulator_rx <= 32'd0; |
| soclinux_soclinux_rx_r <= 1'd0; |
| soclinux_soclinux_rx_reg <= 8'd0; |
| soclinux_soclinux_rx_bitcount <= 4'd0; |
| soclinux_soclinux_rx_busy <= 1'd0; |
| soclinux_soclinux_uart_tx_pending <= 1'd0; |
| soclinux_soclinux_uart_tx_old_trigger <= 1'd0; |
| soclinux_soclinux_uart_rx_pending <= 1'd0; |
| soclinux_soclinux_uart_rx_old_trigger <= 1'd0; |
| soclinux_soclinux_uart_eventmanager_storage <= 2'd0; |
| soclinux_soclinux_uart_eventmanager_re <= 1'd0; |
| soclinux_soclinux_uart_tx_fifo_readable <= 1'd0; |
| soclinux_soclinux_uart_tx_fifo_level0 <= 5'd0; |
| soclinux_soclinux_uart_tx_fifo_produce <= 4'd0; |
| soclinux_soclinux_uart_tx_fifo_consume <= 4'd0; |
| soclinux_soclinux_uart_rx_fifo_readable <= 1'd0; |
| soclinux_soclinux_uart_rx_fifo_level0 <= 5'd0; |
| soclinux_soclinux_uart_rx_fifo_produce <= 4'd0; |
| soclinux_soclinux_uart_rx_fifo_consume <= 4'd0; |
| soclinux_soclinux_timer_load_storage <= 32'd0; |
| soclinux_soclinux_timer_load_re <= 1'd0; |
| soclinux_soclinux_timer_reload_storage <= 32'd0; |
| soclinux_soclinux_timer_reload_re <= 1'd0; |
| soclinux_soclinux_timer_en_storage <= 1'd0; |
| soclinux_soclinux_timer_en_re <= 1'd0; |
| soclinux_soclinux_timer_update_value_storage <= 1'd0; |
| soclinux_soclinux_timer_update_value_re <= 1'd0; |
| soclinux_soclinux_timer_value_status <= 32'd0; |
| soclinux_soclinux_timer_zero_pending <= 1'd0; |
| soclinux_soclinux_timer_zero_old_trigger <= 1'd0; |
| soclinux_soclinux_timer_eventmanager_storage <= 1'd0; |
| soclinux_soclinux_timer_eventmanager_re <= 1'd0; |
| soclinux_soclinux_timer_value <= 32'd0; |
| soclinux_usddrphy_en_vtc_storage <= 1'd1; |
| soclinux_usddrphy_en_vtc_re <= 1'd0; |
| soclinux_usddrphy_status <= 9'd0; |
| soclinux_usddrphy_wlevel_en_storage <= 1'd0; |
| soclinux_usddrphy_wlevel_en_re <= 1'd0; |
| soclinux_usddrphy_dly_sel_storage <= 4'd0; |
| soclinux_usddrphy_dly_sel_re <= 1'd0; |
| soclinux_usddrphy_oe_dqs <= 1'd0; |
| soclinux_usddrphy_count <= 17'd65536; |
| soclinux_usddrphy_dqs_taps_done <= 1'd0; |
| soclinux_usddrphy_oe_dq <= 1'd0; |
| soclinux_usddrphy_bitslip0_value <= 3'd0; |
| soclinux_usddrphy_bitslip0_r <= 16'd0; |
| soclinux_usddrphy_bitslip1_value <= 3'd0; |
| soclinux_usddrphy_bitslip1_r <= 16'd0; |
| soclinux_usddrphy_bitslip2_value <= 3'd0; |
| soclinux_usddrphy_bitslip2_r <= 16'd0; |
| soclinux_usddrphy_bitslip3_value <= 3'd0; |
| soclinux_usddrphy_bitslip3_r <= 16'd0; |
| soclinux_usddrphy_bitslip4_value <= 3'd0; |
| soclinux_usddrphy_bitslip4_r <= 16'd0; |
| soclinux_usddrphy_bitslip5_value <= 3'd0; |
| soclinux_usddrphy_bitslip5_r <= 16'd0; |
| soclinux_usddrphy_bitslip6_value <= 3'd0; |
| soclinux_usddrphy_bitslip6_r <= 16'd0; |
| soclinux_usddrphy_bitslip7_value <= 3'd0; |
| soclinux_usddrphy_bitslip7_r <= 16'd0; |
| soclinux_usddrphy_bitslip8_value <= 3'd0; |
| soclinux_usddrphy_bitslip8_r <= 16'd0; |
| soclinux_usddrphy_bitslip9_value <= 3'd0; |
| soclinux_usddrphy_bitslip9_r <= 16'd0; |
| soclinux_usddrphy_bitslip10_value <= 3'd0; |
| soclinux_usddrphy_bitslip10_r <= 16'd0; |
| soclinux_usddrphy_bitslip11_value <= 3'd0; |
| soclinux_usddrphy_bitslip11_r <= 16'd0; |
| soclinux_usddrphy_bitslip12_value <= 3'd0; |
| soclinux_usddrphy_bitslip12_r <= 16'd0; |
| soclinux_usddrphy_bitslip13_value <= 3'd0; |
| soclinux_usddrphy_bitslip13_r <= 16'd0; |
| soclinux_usddrphy_bitslip14_value <= 3'd0; |
| soclinux_usddrphy_bitslip14_r <= 16'd0; |
| soclinux_usddrphy_bitslip15_value <= 3'd0; |
| soclinux_usddrphy_bitslip15_r <= 16'd0; |
| soclinux_usddrphy_bitslip16_value <= 3'd0; |
| soclinux_usddrphy_bitslip16_r <= 16'd0; |
| soclinux_usddrphy_bitslip17_value <= 3'd0; |
| soclinux_usddrphy_bitslip17_r <= 16'd0; |
| soclinux_usddrphy_bitslip18_value <= 3'd0; |
| soclinux_usddrphy_bitslip18_r <= 16'd0; |
| soclinux_usddrphy_bitslip19_value <= 3'd0; |
| soclinux_usddrphy_bitslip19_r <= 16'd0; |
| soclinux_usddrphy_bitslip20_value <= 3'd0; |
| soclinux_usddrphy_bitslip20_r <= 16'd0; |
| soclinux_usddrphy_bitslip21_value <= 3'd0; |
| soclinux_usddrphy_bitslip21_r <= 16'd0; |
| soclinux_usddrphy_bitslip22_value <= 3'd0; |
| soclinux_usddrphy_bitslip22_r <= 16'd0; |
| soclinux_usddrphy_bitslip23_value <= 3'd0; |
| soclinux_usddrphy_bitslip23_r <= 16'd0; |
| soclinux_usddrphy_bitslip24_value <= 3'd0; |
| soclinux_usddrphy_bitslip24_r <= 16'd0; |
| soclinux_usddrphy_bitslip25_value <= 3'd0; |
| soclinux_usddrphy_bitslip25_r <= 16'd0; |
| soclinux_usddrphy_bitslip26_value <= 3'd0; |
| soclinux_usddrphy_bitslip26_r <= 16'd0; |
| soclinux_usddrphy_bitslip27_value <= 3'd0; |
| soclinux_usddrphy_bitslip27_r <= 16'd0; |
| soclinux_usddrphy_bitslip28_value <= 3'd0; |
| soclinux_usddrphy_bitslip28_r <= 16'd0; |
| soclinux_usddrphy_bitslip29_value <= 3'd0; |
| soclinux_usddrphy_bitslip29_r <= 16'd0; |
| soclinux_usddrphy_bitslip30_value <= 3'd0; |
| soclinux_usddrphy_bitslip30_r <= 16'd0; |
| soclinux_usddrphy_bitslip31_value <= 3'd0; |
| soclinux_usddrphy_bitslip31_r <= 16'd0; |
| soclinux_usddrphy_n_rddata_en0 <= 1'd0; |
| soclinux_usddrphy_n_rddata_en1 <= 1'd0; |
| soclinux_usddrphy_n_rddata_en2 <= 1'd0; |
| soclinux_usddrphy_n_rddata_en3 <= 1'd0; |
| soclinux_usddrphy_n_rddata_en4 <= 1'd0; |
| soclinux_usddrphy_n_rddata_en5 <= 1'd0; |
| soclinux_usddrphy_n_rddata_en6 <= 1'd0; |
| soclinux_usddrphy_phase_rddata_valid0 <= 1'd0; |
| soclinux_usddrphy_phase_rddata_valid1 <= 1'd0; |
| soclinux_usddrphy_phase_rddata_valid2 <= 1'd0; |
| soclinux_usddrphy_phase_rddata_valid3 <= 1'd0; |
| soclinux_usddrphy_last_wrdata_en <= 5'd0; |
| soclinux_sdram_storage <= 4'd0; |
| soclinux_sdram_re <= 1'd0; |
| soclinux_sdram_phaseinjector0_command_storage <= 6'd0; |
| soclinux_sdram_phaseinjector0_command_re <= 1'd0; |
| soclinux_sdram_phaseinjector0_address_storage <= 15'd0; |
| soclinux_sdram_phaseinjector0_address_re <= 1'd0; |
| soclinux_sdram_phaseinjector0_baddress_storage <= 4'd0; |
| soclinux_sdram_phaseinjector0_baddress_re <= 1'd0; |
| soclinux_sdram_phaseinjector0_wrdata_storage <= 64'd0; |
| soclinux_sdram_phaseinjector0_wrdata_re <= 1'd0; |
| soclinux_sdram_phaseinjector0_status <= 64'd0; |
| soclinux_sdram_phaseinjector1_command_storage <= 6'd0; |
| soclinux_sdram_phaseinjector1_command_re <= 1'd0; |
| soclinux_sdram_phaseinjector1_address_storage <= 15'd0; |
| soclinux_sdram_phaseinjector1_address_re <= 1'd0; |
| soclinux_sdram_phaseinjector1_baddress_storage <= 4'd0; |
| soclinux_sdram_phaseinjector1_baddress_re <= 1'd0; |
| soclinux_sdram_phaseinjector1_wrdata_storage <= 64'd0; |
| soclinux_sdram_phaseinjector1_wrdata_re <= 1'd0; |
| soclinux_sdram_phaseinjector1_status <= 64'd0; |
| soclinux_sdram_phaseinjector2_command_storage <= 6'd0; |
| soclinux_sdram_phaseinjector2_command_re <= 1'd0; |
| soclinux_sdram_phaseinjector2_address_storage <= 15'd0; |
| soclinux_sdram_phaseinjector2_address_re <= 1'd0; |
| soclinux_sdram_phaseinjector2_baddress_storage <= 4'd0; |
| soclinux_sdram_phaseinjector2_baddress_re <= 1'd0; |
| soclinux_sdram_phaseinjector2_wrdata_storage <= 64'd0; |
| soclinux_sdram_phaseinjector2_wrdata_re <= 1'd0; |
| soclinux_sdram_phaseinjector2_status <= 64'd0; |
| soclinux_sdram_phaseinjector3_command_storage <= 6'd0; |
| soclinux_sdram_phaseinjector3_command_re <= 1'd0; |
| soclinux_sdram_phaseinjector3_address_storage <= 15'd0; |
| soclinux_sdram_phaseinjector3_address_re <= 1'd0; |
| soclinux_sdram_phaseinjector3_baddress_storage <= 4'd0; |
| soclinux_sdram_phaseinjector3_baddress_re <= 1'd0; |
| soclinux_sdram_phaseinjector3_wrdata_storage <= 64'd0; |
| soclinux_sdram_phaseinjector3_wrdata_re <= 1'd0; |
| soclinux_sdram_phaseinjector3_status <= 64'd0; |
| soclinux_sdram_dfi_p0_address <= 15'd0; |
| soclinux_sdram_dfi_p0_bank <= 4'd0; |
| soclinux_sdram_dfi_p0_cas_n <= 1'd1; |
| soclinux_sdram_dfi_p0_cs_n <= 1'd1; |
| soclinux_sdram_dfi_p0_ras_n <= 1'd1; |
| soclinux_sdram_dfi_p0_we_n <= 1'd1; |
| soclinux_sdram_dfi_p0_wrdata_en <= 1'd0; |
| soclinux_sdram_dfi_p0_rddata_en <= 1'd0; |
| soclinux_sdram_dfi_p1_address <= 15'd0; |
| soclinux_sdram_dfi_p1_bank <= 4'd0; |
| soclinux_sdram_dfi_p1_cas_n <= 1'd1; |
| soclinux_sdram_dfi_p1_cs_n <= 1'd1; |
| soclinux_sdram_dfi_p1_ras_n <= 1'd1; |
| soclinux_sdram_dfi_p1_we_n <= 1'd1; |
| soclinux_sdram_dfi_p1_wrdata_en <= 1'd0; |
| soclinux_sdram_dfi_p1_rddata_en <= 1'd0; |
| soclinux_sdram_dfi_p2_address <= 15'd0; |
| soclinux_sdram_dfi_p2_bank <= 4'd0; |
| soclinux_sdram_dfi_p2_cas_n <= 1'd1; |
| soclinux_sdram_dfi_p2_cs_n <= 1'd1; |
| soclinux_sdram_dfi_p2_ras_n <= 1'd1; |
| soclinux_sdram_dfi_p2_we_n <= 1'd1; |
| soclinux_sdram_dfi_p2_wrdata_en <= 1'd0; |
| soclinux_sdram_dfi_p2_rddata_en <= 1'd0; |
| soclinux_sdram_dfi_p3_address <= 15'd0; |
| soclinux_sdram_dfi_p3_bank <= 4'd0; |
| soclinux_sdram_dfi_p3_cas_n <= 1'd1; |
| soclinux_sdram_dfi_p3_cs_n <= 1'd1; |
| soclinux_sdram_dfi_p3_ras_n <= 1'd1; |
| soclinux_sdram_dfi_p3_we_n <= 1'd1; |
| soclinux_sdram_dfi_p3_wrdata_en <= 1'd0; |
| soclinux_sdram_dfi_p3_rddata_en <= 1'd0; |
| soclinux_sdram_cmd_payload_a <= 15'd0; |
| soclinux_sdram_cmd_payload_ba <= 4'd0; |
| soclinux_sdram_cmd_payload_cas <= 1'd0; |
| soclinux_sdram_cmd_payload_ras <= 1'd0; |
| soclinux_sdram_cmd_payload_we <= 1'd0; |
| soclinux_sdram_timer_count1 <= 10'd976; |
| soclinux_sdram_postponer_req_o <= 1'd0; |
| soclinux_sdram_postponer_count <= 1'd0; |
| soclinux_sdram_sequencer_done1 <= 1'd0; |
| soclinux_sdram_sequencer_counter <= 6'd0; |
| soclinux_sdram_sequencer_count <= 1'd0; |
| soclinux_sdram_zqcs_timer_count1 <= 27'd124999999; |
| soclinux_sdram_zqcs_executer_done <= 1'd0; |
| soclinux_sdram_zqcs_executer_counter <= 6'd0; |
| soclinux_sdram_bankmachine0_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine0_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine0_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine0_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine0_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine0_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine0_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine0_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine0_row <= 15'd0; |
| soclinux_sdram_bankmachine0_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine0_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine0_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine0_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine0_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine0_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine0_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine1_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine1_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine1_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine1_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine1_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine1_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine1_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine1_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine1_row <= 15'd0; |
| soclinux_sdram_bankmachine1_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine1_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine1_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine1_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine1_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine1_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine1_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine2_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine2_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine2_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine2_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine2_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine2_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine2_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine2_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine2_row <= 15'd0; |
| soclinux_sdram_bankmachine2_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine2_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine2_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine2_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine2_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine2_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine2_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine3_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine3_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine3_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine3_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine3_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine3_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine3_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine3_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine3_row <= 15'd0; |
| soclinux_sdram_bankmachine3_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine3_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine3_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine3_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine3_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine3_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine3_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine4_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine4_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine4_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine4_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine4_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine4_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine4_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine4_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine4_row <= 15'd0; |
| soclinux_sdram_bankmachine4_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine4_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine4_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine4_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine4_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine4_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine4_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine5_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine5_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine5_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine5_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine5_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine5_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine5_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine5_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine5_row <= 15'd0; |
| soclinux_sdram_bankmachine5_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine5_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine5_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine5_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine5_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine5_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine5_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine6_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine6_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine6_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine6_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine6_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine6_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine6_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine6_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine6_row <= 15'd0; |
| soclinux_sdram_bankmachine6_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine6_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine6_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine6_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine6_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine6_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine6_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine7_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine7_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine7_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine7_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine7_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine7_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine7_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine7_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine7_row <= 15'd0; |
| soclinux_sdram_bankmachine7_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine7_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine7_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine7_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine7_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine7_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine7_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine8_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine8_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine8_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine8_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine8_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine8_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine8_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine8_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine8_row <= 15'd0; |
| soclinux_sdram_bankmachine8_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine8_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine8_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine8_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine8_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine8_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine8_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine9_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine9_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine9_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine9_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine9_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine9_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine9_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine9_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine9_row <= 15'd0; |
| soclinux_sdram_bankmachine9_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine9_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine9_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine9_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine9_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine9_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine9_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine10_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine10_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine10_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine10_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine10_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine10_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine10_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine10_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine10_row <= 15'd0; |
| soclinux_sdram_bankmachine10_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine10_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine10_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine10_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine10_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine10_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine10_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine11_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine11_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine11_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine11_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine11_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine11_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine11_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine11_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine11_row <= 15'd0; |
| soclinux_sdram_bankmachine11_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine11_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine11_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine11_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine11_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine11_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine11_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine12_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine12_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine12_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine12_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine12_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine12_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine12_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine12_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine12_row <= 15'd0; |
| soclinux_sdram_bankmachine12_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine12_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine12_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine12_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine12_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine12_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine12_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine13_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine13_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine13_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine13_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine13_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine13_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine13_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine13_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine13_row <= 15'd0; |
| soclinux_sdram_bankmachine13_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine13_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine13_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine13_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine13_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine13_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine13_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine14_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine14_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine14_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine14_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine14_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine14_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine14_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine14_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine14_row <= 15'd0; |
| soclinux_sdram_bankmachine14_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine14_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine14_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine14_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine14_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine14_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine14_trascon_count <= 3'd0; |
| soclinux_sdram_bankmachine15_cmd_buffer_lookahead_level <= 4'd0; |
| soclinux_sdram_bankmachine15_cmd_buffer_lookahead_produce <= 3'd0; |
| soclinux_sdram_bankmachine15_cmd_buffer_lookahead_consume <= 3'd0; |
| soclinux_sdram_bankmachine15_cmd_buffer_source_valid <= 1'd0; |
| soclinux_sdram_bankmachine15_cmd_buffer_source_first <= 1'd0; |
| soclinux_sdram_bankmachine15_cmd_buffer_source_last <= 1'd0; |
| soclinux_sdram_bankmachine15_cmd_buffer_source_payload_we <= 1'd0; |
| soclinux_sdram_bankmachine15_cmd_buffer_source_payload_addr <= 22'd0; |
| soclinux_sdram_bankmachine15_row <= 15'd0; |
| soclinux_sdram_bankmachine15_row_opened <= 1'd0; |
| soclinux_sdram_bankmachine15_twtpcon_ready <= 1'd1; |
| soclinux_sdram_bankmachine15_twtpcon_count <= 3'd0; |
| soclinux_sdram_bankmachine15_trccon_ready <= 1'd1; |
| soclinux_sdram_bankmachine15_trccon_count <= 3'd0; |
| soclinux_sdram_bankmachine15_trascon_ready <= 1'd1; |
| soclinux_sdram_bankmachine15_trascon_count <= 3'd0; |
| soclinux_sdram_choose_cmd_grant <= 4'd0; |
| soclinux_sdram_choose_req_grant <= 4'd0; |
| soclinux_sdram_trrdcon_ready <= 1'd1; |
| soclinux_sdram_trrdcon_count <= 1'd0; |
| soclinux_sdram_tfawcon_ready <= 1'd1; |
| soclinux_sdram_tfawcon_window <= 5'd0; |
| soclinux_sdram_tccdcon_ready <= 1'd1; |
| soclinux_sdram_tccdcon_count <= 1'd0; |
| soclinux_sdram_twtrcon_ready <= 1'd1; |
| soclinux_sdram_twtrcon_count <= 3'd0; |
| soclinux_sdram_time0 <= 5'd0; |
| soclinux_sdram_time1 <= 4'd0; |
| soclinux_adr_offset_r <= 3'd0; |
| soclinux_count <= 1'd0; |
| emulator_ram_bus_ack <= 1'd0; |
| wb2csr_state <= 1'd0; |
| refresher_state <= 2'd0; |
| bankmachine0_state <= 4'd0; |
| bankmachine1_state <= 4'd0; |
| bankmachine2_state <= 4'd0; |
| bankmachine3_state <= 4'd0; |
| bankmachine4_state <= 4'd0; |
| bankmachine5_state <= 4'd0; |
| bankmachine6_state <= 4'd0; |
| bankmachine7_state <= 4'd0; |
| bankmachine8_state <= 4'd0; |
| bankmachine9_state <= 4'd0; |
| bankmachine10_state <= 4'd0; |
| bankmachine11_state <= 4'd0; |
| bankmachine12_state <= 4'd0; |
| bankmachine13_state <= 4'd0; |
| bankmachine14_state <= 4'd0; |
| bankmachine15_state <= 4'd0; |
| multiplexer_state <= 4'd0; |
| rbank <= 4'd0; |
| wbank <= 4'd0; |
| new_master_wdata_ready0 <= 1'd0; |
| new_master_wdata_ready1 <= 1'd0; |
| new_master_wdata_ready2 <= 1'd0; |
| new_master_wdata_ready3 <= 1'd0; |
| new_master_rdata_valid0 <= 1'd0; |
| new_master_rdata_valid1 <= 1'd0; |
| new_master_rdata_valid2 <= 1'd0; |
| new_master_rdata_valid3 <= 1'd0; |
| new_master_rdata_valid4 <= 1'd0; |
| new_master_rdata_valid5 <= 1'd0; |
| new_master_rdata_valid6 <= 1'd0; |
| new_master_rdata_valid7 <= 1'd0; |
| new_master_rdata_valid8 <= 1'd0; |
| fullmemorywe_state <= 2'd0; |
| litedramwishbone2native_state <= 2'd0; |
| grant <= 1'd0; |
| slave_sel_r <= 5'd0; |
| count <= 20'd1000000; |
| interface0_bank_bus_dat_r <= 8'd0; |
| interface1_bank_bus_dat_r <= 8'd0; |
| interface2_bank_bus_dat_r <= 8'd0; |
| interface3_bank_bus_dat_r <= 8'd0; |
| interface4_bank_bus_dat_r <= 8'd0; |
| interface5_bank_bus_dat_r <= 8'd0; |
| interface6_bank_bus_dat_r <= 8'd0; |
| end |
| regs0 <= serial_rx; |
| regs1 <= regs0; |
| end |
| |
| reg [31:0] mem[0:8191]; |
| reg [31:0] memdat; |
| always @(posedge sys_clk) begin |
| memdat <= mem[soclinux_soclinux_soclinux_adr]; |
| end |
| |
| assign soclinux_soclinux_soclinux_dat_r = memdat; |
| |
| initial begin |
| $readmemh("mem.init", mem); |
| end |
| |
| reg [31:0] mem_1[0:1023]; |
| reg [9:0] memadr; |
| always @(posedge sys_clk) begin |
| if (soclinux_soclinux_ram_we[0]) |
| mem_1[soclinux_soclinux_ram_adr][7:0] <= soclinux_soclinux_ram_dat_w[7:0]; |
| if (soclinux_soclinux_ram_we[1]) |
| mem_1[soclinux_soclinux_ram_adr][15:8] <= soclinux_soclinux_ram_dat_w[15:8]; |
| if (soclinux_soclinux_ram_we[2]) |
| mem_1[soclinux_soclinux_ram_adr][23:16] <= soclinux_soclinux_ram_dat_w[23:16]; |
| if (soclinux_soclinux_ram_we[3]) |
| mem_1[soclinux_soclinux_ram_adr][31:24] <= soclinux_soclinux_ram_dat_w[31:24]; |
| memadr <= soclinux_soclinux_ram_adr; |
| end |
| |
| assign soclinux_soclinux_ram_dat_r = mem_1[memadr]; |
| |
| initial begin |
| $readmemh("mem_1.init", mem_1); |
| end |
| |
| reg [9:0] storage[0:15]; |
| reg [9:0] memdat_1; |
| reg [9:0] memdat_2; |
| always @(posedge sys_clk) begin |
| if (soclinux_soclinux_uart_tx_fifo_wrport_we) |
| storage[soclinux_soclinux_uart_tx_fifo_wrport_adr] <= soclinux_soclinux_uart_tx_fifo_wrport_dat_w; |
| memdat_1 <= storage[soclinux_soclinux_uart_tx_fifo_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| if (soclinux_soclinux_uart_tx_fifo_rdport_re) |
| memdat_2 <= storage[soclinux_soclinux_uart_tx_fifo_rdport_adr]; |
| end |
| |
| assign soclinux_soclinux_uart_tx_fifo_wrport_dat_r = memdat_1; |
| assign soclinux_soclinux_uart_tx_fifo_rdport_dat_r = memdat_2; |
| |
| reg [9:0] storage_1[0:15]; |
| reg [9:0] memdat_3; |
| reg [9:0] memdat_4; |
| always @(posedge sys_clk) begin |
| if (soclinux_soclinux_uart_rx_fifo_wrport_we) |
| storage_1[soclinux_soclinux_uart_rx_fifo_wrport_adr] <= soclinux_soclinux_uart_rx_fifo_wrport_dat_w; |
| memdat_3 <= storage_1[soclinux_soclinux_uart_rx_fifo_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| if (soclinux_soclinux_uart_rx_fifo_rdport_re) |
| memdat_4 <= storage_1[soclinux_soclinux_uart_rx_fifo_rdport_adr]; |
| end |
| |
| assign soclinux_soclinux_uart_rx_fifo_wrport_dat_r = memdat_3; |
| assign soclinux_soclinux_uart_rx_fifo_rdport_dat_r = memdat_4; |
| |
| BUFG BUFG( |
| .I(soclinux_clkout1), |
| .O(soclinux_clkout_buf) |
| ); |
| |
| BUFGCE_DIV #( |
| .BUFGCE_DIVIDE(3'd4) |
| ) main_bufgce_div ( |
| .CE(1'd1), |
| .I(pll4x_clk), |
| .O(sys_clk) |
| ); |
| |
| BUFGCE main_bufgce( |
| .CE(1'd1), |
| .I(pll4x_clk), |
| .O(sys4x_clk) |
| ); |
| |
| IDELAYCTRL #( |
| .SIM_DEVICE("ULTRASCALE") |
| ) IDELAYCTRL ( |
| .REFCLK(clk500_clk), |
| .RST(soclinux_ic_reset), |
| .RDY(soclinux_ic_rdy) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D(8'd170), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_clk_o_nodelay) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_clk_o_nodelay), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(soclinux_usddrphy_clk_o_delayed) |
| ); |
| |
| OBUFDS OBUFDS( |
| .I(soclinux_usddrphy_clk_o_delayed), |
| .O(ddram_clk_p), |
| .OB(ddram_clk_n) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_1 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[0], soclinux_usddrphy_interface1_dfi_p3_address[0], soclinux_usddrphy_interface1_dfi_p2_address[0], soclinux_usddrphy_interface1_dfi_p2_address[0], soclinux_usddrphy_interface1_dfi_p1_address[0], soclinux_usddrphy_interface1_dfi_p1_address[0], soclinux_usddrphy_interface1_dfi_p0_address[0], soclinux_usddrphy_interface1_dfi_p0_address[0]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay0) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_1 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay0), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[0]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_2 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[1], soclinux_usddrphy_interface1_dfi_p3_address[1], soclinux_usddrphy_interface1_dfi_p2_address[1], soclinux_usddrphy_interface1_dfi_p2_address[1], soclinux_usddrphy_interface1_dfi_p1_address[1], soclinux_usddrphy_interface1_dfi_p1_address[1], soclinux_usddrphy_interface1_dfi_p0_address[1], soclinux_usddrphy_interface1_dfi_p0_address[1]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay1) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_2 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay1), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[1]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_3 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[2], soclinux_usddrphy_interface1_dfi_p3_address[2], soclinux_usddrphy_interface1_dfi_p2_address[2], soclinux_usddrphy_interface1_dfi_p2_address[2], soclinux_usddrphy_interface1_dfi_p1_address[2], soclinux_usddrphy_interface1_dfi_p1_address[2], soclinux_usddrphy_interface1_dfi_p0_address[2], soclinux_usddrphy_interface1_dfi_p0_address[2]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay2) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_3 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay2), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[2]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_4 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[3], soclinux_usddrphy_interface1_dfi_p3_address[3], soclinux_usddrphy_interface1_dfi_p2_address[3], soclinux_usddrphy_interface1_dfi_p2_address[3], soclinux_usddrphy_interface1_dfi_p1_address[3], soclinux_usddrphy_interface1_dfi_p1_address[3], soclinux_usddrphy_interface1_dfi_p0_address[3], soclinux_usddrphy_interface1_dfi_p0_address[3]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay3) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_4 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay3), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[3]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_5 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[4], soclinux_usddrphy_interface1_dfi_p3_address[4], soclinux_usddrphy_interface1_dfi_p2_address[4], soclinux_usddrphy_interface1_dfi_p2_address[4], soclinux_usddrphy_interface1_dfi_p1_address[4], soclinux_usddrphy_interface1_dfi_p1_address[4], soclinux_usddrphy_interface1_dfi_p0_address[4], soclinux_usddrphy_interface1_dfi_p0_address[4]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay4) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_5 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay4), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[4]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_6 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[5], soclinux_usddrphy_interface1_dfi_p3_address[5], soclinux_usddrphy_interface1_dfi_p2_address[5], soclinux_usddrphy_interface1_dfi_p2_address[5], soclinux_usddrphy_interface1_dfi_p1_address[5], soclinux_usddrphy_interface1_dfi_p1_address[5], soclinux_usddrphy_interface1_dfi_p0_address[5], soclinux_usddrphy_interface1_dfi_p0_address[5]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay5) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_6 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay5), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[5]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_7 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[6], soclinux_usddrphy_interface1_dfi_p3_address[6], soclinux_usddrphy_interface1_dfi_p2_address[6], soclinux_usddrphy_interface1_dfi_p2_address[6], soclinux_usddrphy_interface1_dfi_p1_address[6], soclinux_usddrphy_interface1_dfi_p1_address[6], soclinux_usddrphy_interface1_dfi_p0_address[6], soclinux_usddrphy_interface1_dfi_p0_address[6]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay6) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_7 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay6), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[6]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_8 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[7], soclinux_usddrphy_interface1_dfi_p3_address[7], soclinux_usddrphy_interface1_dfi_p2_address[7], soclinux_usddrphy_interface1_dfi_p2_address[7], soclinux_usddrphy_interface1_dfi_p1_address[7], soclinux_usddrphy_interface1_dfi_p1_address[7], soclinux_usddrphy_interface1_dfi_p0_address[7], soclinux_usddrphy_interface1_dfi_p0_address[7]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay7) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_8 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay7), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[7]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_9 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[8], soclinux_usddrphy_interface1_dfi_p3_address[8], soclinux_usddrphy_interface1_dfi_p2_address[8], soclinux_usddrphy_interface1_dfi_p2_address[8], soclinux_usddrphy_interface1_dfi_p1_address[8], soclinux_usddrphy_interface1_dfi_p1_address[8], soclinux_usddrphy_interface1_dfi_p0_address[8], soclinux_usddrphy_interface1_dfi_p0_address[8]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay8) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_9 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay8), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[8]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_10 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[9], soclinux_usddrphy_interface1_dfi_p3_address[9], soclinux_usddrphy_interface1_dfi_p2_address[9], soclinux_usddrphy_interface1_dfi_p2_address[9], soclinux_usddrphy_interface1_dfi_p1_address[9], soclinux_usddrphy_interface1_dfi_p1_address[9], soclinux_usddrphy_interface1_dfi_p0_address[9], soclinux_usddrphy_interface1_dfi_p0_address[9]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay9) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_10 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay9), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[9]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_11 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[10], soclinux_usddrphy_interface1_dfi_p3_address[10], soclinux_usddrphy_interface1_dfi_p2_address[10], soclinux_usddrphy_interface1_dfi_p2_address[10], soclinux_usddrphy_interface1_dfi_p1_address[10], soclinux_usddrphy_interface1_dfi_p1_address[10], soclinux_usddrphy_interface1_dfi_p0_address[10], soclinux_usddrphy_interface1_dfi_p0_address[10]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay10) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_11 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay10), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[10]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_12 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[11], soclinux_usddrphy_interface1_dfi_p3_address[11], soclinux_usddrphy_interface1_dfi_p2_address[11], soclinux_usddrphy_interface1_dfi_p2_address[11], soclinux_usddrphy_interface1_dfi_p1_address[11], soclinux_usddrphy_interface1_dfi_p1_address[11], soclinux_usddrphy_interface1_dfi_p0_address[11], soclinux_usddrphy_interface1_dfi_p0_address[11]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay11) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_12 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay11), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[11]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_13 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[12], soclinux_usddrphy_interface1_dfi_p3_address[12], soclinux_usddrphy_interface1_dfi_p2_address[12], soclinux_usddrphy_interface1_dfi_p2_address[12], soclinux_usddrphy_interface1_dfi_p1_address[12], soclinux_usddrphy_interface1_dfi_p1_address[12], soclinux_usddrphy_interface1_dfi_p0_address[12], soclinux_usddrphy_interface1_dfi_p0_address[12]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay12) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_13 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay12), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[12]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_14 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_address[13], soclinux_usddrphy_interface1_dfi_p3_address[13], soclinux_usddrphy_interface1_dfi_p2_address[13], soclinux_usddrphy_interface1_dfi_p2_address[13], soclinux_usddrphy_interface1_dfi_p1_address[13], soclinux_usddrphy_interface1_dfi_p1_address[13], soclinux_usddrphy_interface1_dfi_p0_address[13], soclinux_usddrphy_interface1_dfi_p0_address[13]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_a_o_nodelay13) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_14 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_a_o_nodelay13), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_a[13]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_15 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_bank[0], soclinux_usddrphy_interface1_dfi_p3_bank[0], soclinux_usddrphy_interface1_dfi_p2_bank[0], soclinux_usddrphy_interface1_dfi_p2_bank[0], soclinux_usddrphy_interface1_dfi_p1_bank[0], soclinux_usddrphy_interface1_dfi_p1_bank[0], soclinux_usddrphy_interface1_dfi_p0_bank[0], soclinux_usddrphy_interface1_dfi_p0_bank[0]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_ba_o_nodelay0) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_15 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_ba_o_nodelay0), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(soclinux_usddrphy_pads_ba[0]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_16 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_bank[1], soclinux_usddrphy_interface1_dfi_p3_bank[1], soclinux_usddrphy_interface1_dfi_p2_bank[1], soclinux_usddrphy_interface1_dfi_p2_bank[1], soclinux_usddrphy_interface1_dfi_p1_bank[1], soclinux_usddrphy_interface1_dfi_p1_bank[1], soclinux_usddrphy_interface1_dfi_p0_bank[1], soclinux_usddrphy_interface1_dfi_p0_bank[1]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_ba_o_nodelay1) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_16 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_ba_o_nodelay1), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(soclinux_usddrphy_pads_ba[1]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_17 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_bank[2], soclinux_usddrphy_interface1_dfi_p3_bank[2], soclinux_usddrphy_interface1_dfi_p2_bank[2], soclinux_usddrphy_interface1_dfi_p2_bank[2], soclinux_usddrphy_interface1_dfi_p1_bank[2], soclinux_usddrphy_interface1_dfi_p1_bank[2], soclinux_usddrphy_interface1_dfi_p0_bank[2], soclinux_usddrphy_interface1_dfi_p0_bank[2]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_ba_o_nodelay2) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_17 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_ba_o_nodelay2), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(soclinux_usddrphy_pads_ba[2]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_18 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_bank[3], soclinux_usddrphy_interface1_dfi_p3_bank[3], soclinux_usddrphy_interface1_dfi_p2_bank[3], soclinux_usddrphy_interface1_dfi_p2_bank[3], soclinux_usddrphy_interface1_dfi_p1_bank[3], soclinux_usddrphy_interface1_dfi_p1_bank[3], soclinux_usddrphy_interface1_dfi_p0_bank[3], soclinux_usddrphy_interface1_dfi_p0_bank[3]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_ba_o_nodelay3) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_18 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_ba_o_nodelay3), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(soclinux_usddrphy_pads_ba[3]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_19 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_ras_n, soclinux_usddrphy_interface1_dfi_p3_ras_n, soclinux_usddrphy_interface1_dfi_p2_ras_n, soclinux_usddrphy_interface1_dfi_p2_ras_n, soclinux_usddrphy_interface1_dfi_p1_ras_n, soclinux_usddrphy_interface1_dfi_p1_ras_n, soclinux_usddrphy_interface1_dfi_p0_ras_n, soclinux_usddrphy_interface1_dfi_p0_ras_n}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_x_o_nodelay0) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_19 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_x_o_nodelay0), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_ras_n) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_20 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_cas_n, soclinux_usddrphy_interface1_dfi_p3_cas_n, soclinux_usddrphy_interface1_dfi_p2_cas_n, soclinux_usddrphy_interface1_dfi_p2_cas_n, soclinux_usddrphy_interface1_dfi_p1_cas_n, soclinux_usddrphy_interface1_dfi_p1_cas_n, soclinux_usddrphy_interface1_dfi_p0_cas_n, soclinux_usddrphy_interface1_dfi_p0_cas_n}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_x_o_nodelay1) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_20 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_x_o_nodelay1), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_cas_n) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_21 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_we_n, soclinux_usddrphy_interface1_dfi_p3_we_n, soclinux_usddrphy_interface1_dfi_p2_we_n, soclinux_usddrphy_interface1_dfi_p2_we_n, soclinux_usddrphy_interface1_dfi_p1_we_n, soclinux_usddrphy_interface1_dfi_p1_we_n, soclinux_usddrphy_interface1_dfi_p0_we_n, soclinux_usddrphy_interface1_dfi_p0_we_n}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_x_o_nodelay2) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_21 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_x_o_nodelay2), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_we_n) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_22 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_cke, soclinux_usddrphy_interface1_dfi_p3_cke, soclinux_usddrphy_interface1_dfi_p2_cke, soclinux_usddrphy_interface1_dfi_p2_cke, soclinux_usddrphy_interface1_dfi_p1_cke, soclinux_usddrphy_interface1_dfi_p1_cke, soclinux_usddrphy_interface1_dfi_p0_cke, soclinux_usddrphy_interface1_dfi_p0_cke}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_x_o_nodelay3) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_22 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_x_o_nodelay3), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_cke) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_23 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_odt, soclinux_usddrphy_interface1_dfi_p3_odt, soclinux_usddrphy_interface1_dfi_p2_odt, soclinux_usddrphy_interface1_dfi_p2_odt, soclinux_usddrphy_interface1_dfi_p1_odt, soclinux_usddrphy_interface1_dfi_p1_odt, soclinux_usddrphy_interface1_dfi_p0_odt, soclinux_usddrphy_interface1_dfi_p0_odt}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_x_o_nodelay4) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_23 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_x_o_nodelay4), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_odt) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_24 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_reset_n, soclinux_usddrphy_interface1_dfi_p3_reset_n, soclinux_usddrphy_interface1_dfi_p2_reset_n, soclinux_usddrphy_interface1_dfi_p2_reset_n, soclinux_usddrphy_interface1_dfi_p1_reset_n, soclinux_usddrphy_interface1_dfi_p1_reset_n, soclinux_usddrphy_interface1_dfi_p0_reset_n, soclinux_usddrphy_interface1_dfi_p0_reset_n}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_x_o_nodelay5) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_24 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_x_o_nodelay5), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_reset_n) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_25 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_cs_n, soclinux_usddrphy_interface1_dfi_p3_cs_n, soclinux_usddrphy_interface1_dfi_p2_cs_n, soclinux_usddrphy_interface1_dfi_p2_cs_n, soclinux_usddrphy_interface1_dfi_p1_cs_n, soclinux_usddrphy_interface1_dfi_p1_cs_n, soclinux_usddrphy_interface1_dfi_p0_cs_n, soclinux_usddrphy_interface1_dfi_p0_cs_n}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_x_o_nodelay6) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_25 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_x_o_nodelay6), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_cs_n) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_26 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_act_n, soclinux_usddrphy_interface1_dfi_p3_act_n, soclinux_usddrphy_interface1_dfi_p2_act_n, soclinux_usddrphy_interface1_dfi_p2_act_n, soclinux_usddrphy_interface1_dfi_p1_act_n, soclinux_usddrphy_interface1_dfi_p1_act_n, soclinux_usddrphy_interface1_dfi_p0_act_n, soclinux_usddrphy_interface1_dfi_p0_act_n}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_x_o_nodelay7) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_26 ( |
| .CE(soclinux_usddrphy_cdly_inc_re), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_x_o_nodelay7), |
| .RST(soclinux_usddrphy_cdly_rst_re), |
| .DATAOUT(ddram_act_n) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_27 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata_mask[4], soclinux_usddrphy_interface1_dfi_p3_wrdata_mask[0], soclinux_usddrphy_interface1_dfi_p2_wrdata_mask[4], soclinux_usddrphy_interface1_dfi_p2_wrdata_mask[0], soclinux_usddrphy_interface1_dfi_p1_wrdata_mask[4], soclinux_usddrphy_interface1_dfi_p1_wrdata_mask[0], soclinux_usddrphy_interface1_dfi_p0_wrdata_mask[4], soclinux_usddrphy_interface1_dfi_p0_wrdata_mask[0]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_dm_o_nodelay0) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_27 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dm_o_nodelay0), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(ddram_dm[0]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_28 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_dqs_serdes_pattern[7], soclinux_usddrphy_dqs_serdes_pattern[6], soclinux_usddrphy_dqs_serdes_pattern[5], soclinux_usddrphy_dqs_serdes_pattern[4], soclinux_usddrphy_dqs_serdes_pattern[3], soclinux_usddrphy_dqs_serdes_pattern[2], soclinux_usddrphy_dqs_serdes_pattern[1], soclinux_usddrphy_dqs_serdes_pattern[0]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dqs)), |
| .OQ(soclinux_usddrphy_dqs_nodelay0), |
| .T_OUT(soclinux_usddrphy_dqs_t0) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(9'd500), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_28 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dqs_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dqs_nodelay0), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dqs_rst_re)), |
| .CNTVALUEOUT(soclinux_usddrphy_dqs_taps), |
| .DATAOUT(soclinux_usddrphy_dqs_delayed0) |
| ); |
| |
| IOBUFDSE3 IOBUFDSE3( |
| .I(soclinux_usddrphy_dqs_delayed0), |
| .T(soclinux_usddrphy_dqs_t0), |
| .IO(ddram_dqs_p[0]), |
| .IOB(ddram_dqs_n[0]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_29 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata_mask[5], soclinux_usddrphy_interface1_dfi_p3_wrdata_mask[1], soclinux_usddrphy_interface1_dfi_p2_wrdata_mask[5], soclinux_usddrphy_interface1_dfi_p2_wrdata_mask[1], soclinux_usddrphy_interface1_dfi_p1_wrdata_mask[5], soclinux_usddrphy_interface1_dfi_p1_wrdata_mask[1], soclinux_usddrphy_interface1_dfi_p0_wrdata_mask[5], soclinux_usddrphy_interface1_dfi_p0_wrdata_mask[1]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_dm_o_nodelay1) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_29 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dm_o_nodelay1), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(ddram_dm[1]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_30 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_dqs_serdes_pattern[7], soclinux_usddrphy_dqs_serdes_pattern[6], soclinux_usddrphy_dqs_serdes_pattern[5], soclinux_usddrphy_dqs_serdes_pattern[4], soclinux_usddrphy_dqs_serdes_pattern[3], soclinux_usddrphy_dqs_serdes_pattern[2], soclinux_usddrphy_dqs_serdes_pattern[1], soclinux_usddrphy_dqs_serdes_pattern[0]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dqs)), |
| .OQ(soclinux_usddrphy_dqs_nodelay1), |
| .T_OUT(soclinux_usddrphy_dqs_t1) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(9'd500), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_30 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dqs_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dqs_nodelay1), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dqs_rst_re)), |
| .CNTVALUEOUT(soclinux_usddrphy0), |
| .DATAOUT(soclinux_usddrphy_dqs_delayed1) |
| ); |
| |
| IOBUFDSE3 IOBUFDSE3_1( |
| .I(soclinux_usddrphy_dqs_delayed1), |
| .T(soclinux_usddrphy_dqs_t1), |
| .IO(ddram_dqs_p[1]), |
| .IOB(ddram_dqs_n[1]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_31 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata_mask[6], soclinux_usddrphy_interface1_dfi_p3_wrdata_mask[2], soclinux_usddrphy_interface1_dfi_p2_wrdata_mask[6], soclinux_usddrphy_interface1_dfi_p2_wrdata_mask[2], soclinux_usddrphy_interface1_dfi_p1_wrdata_mask[6], soclinux_usddrphy_interface1_dfi_p1_wrdata_mask[2], soclinux_usddrphy_interface1_dfi_p0_wrdata_mask[6], soclinux_usddrphy_interface1_dfi_p0_wrdata_mask[2]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_dm_o_nodelay2) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_31 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dm_o_nodelay2), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(ddram_dm[2]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_32 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_dqs_serdes_pattern[7], soclinux_usddrphy_dqs_serdes_pattern[6], soclinux_usddrphy_dqs_serdes_pattern[5], soclinux_usddrphy_dqs_serdes_pattern[4], soclinux_usddrphy_dqs_serdes_pattern[3], soclinux_usddrphy_dqs_serdes_pattern[2], soclinux_usddrphy_dqs_serdes_pattern[1], soclinux_usddrphy_dqs_serdes_pattern[0]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dqs)), |
| .OQ(soclinux_usddrphy_dqs_nodelay2), |
| .T_OUT(soclinux_usddrphy_dqs_t2) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(9'd500), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_32 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dqs_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dqs_nodelay2), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dqs_rst_re)), |
| .CNTVALUEOUT(soclinux_usddrphy1), |
| .DATAOUT(soclinux_usddrphy_dqs_delayed2) |
| ); |
| |
| IOBUFDSE3 IOBUFDSE3_2( |
| .I(soclinux_usddrphy_dqs_delayed2), |
| .T(soclinux_usddrphy_dqs_t2), |
| .IO(ddram_dqs_p[2]), |
| .IOB(ddram_dqs_n[2]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_33 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata_mask[7], soclinux_usddrphy_interface1_dfi_p3_wrdata_mask[3], soclinux_usddrphy_interface1_dfi_p2_wrdata_mask[7], soclinux_usddrphy_interface1_dfi_p2_wrdata_mask[3], soclinux_usddrphy_interface1_dfi_p1_wrdata_mask[7], soclinux_usddrphy_interface1_dfi_p1_wrdata_mask[3], soclinux_usddrphy_interface1_dfi_p0_wrdata_mask[7], soclinux_usddrphy_interface1_dfi_p0_wrdata_mask[3]}), |
| .RST(sys_rst), |
| .OQ(soclinux_usddrphy_dm_o_nodelay3) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_33 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dm_o_nodelay3), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(ddram_dm[3]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_34 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_dqs_serdes_pattern[7], soclinux_usddrphy_dqs_serdes_pattern[6], soclinux_usddrphy_dqs_serdes_pattern[5], soclinux_usddrphy_dqs_serdes_pattern[4], soclinux_usddrphy_dqs_serdes_pattern[3], soclinux_usddrphy_dqs_serdes_pattern[2], soclinux_usddrphy_dqs_serdes_pattern[1], soclinux_usddrphy_dqs_serdes_pattern[0]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dqs)), |
| .OQ(soclinux_usddrphy_dqs_nodelay3), |
| .T_OUT(soclinux_usddrphy_dqs_t3) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(9'd500), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_34 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dqs_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dqs_nodelay3), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dqs_rst_re)), |
| .CNTVALUEOUT(soclinux_usddrphy2), |
| .DATAOUT(soclinux_usddrphy_dqs_delayed3) |
| ); |
| |
| IOBUFDSE3 IOBUFDSE3_3( |
| .I(soclinux_usddrphy_dqs_delayed3), |
| .T(soclinux_usddrphy_dqs_t3), |
| .IO(ddram_dqs_p[3]), |
| .IOB(ddram_dqs_n[3]) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_35 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[32], soclinux_usddrphy_interface1_dfi_p3_wrdata[0], soclinux_usddrphy_interface1_dfi_p2_wrdata[32], soclinux_usddrphy_interface1_dfi_p2_wrdata[0], soclinux_usddrphy_interface1_dfi_p1_wrdata[32], soclinux_usddrphy_interface1_dfi_p1_wrdata[0], soclinux_usddrphy_interface1_dfi_p0_wrdata[32], soclinux_usddrphy_interface1_dfi_p0_wrdata[0]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay0), |
| .T_OUT(soclinux_usddrphy_dq_t0) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed0), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip0_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_35 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay0), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed0) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay0), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed0) |
| ); |
| |
| IOBUF IOBUF( |
| .I(soclinux_usddrphy_dq_o_delayed0), |
| .T(soclinux_usddrphy_dq_t0), |
| .IO(ddram_dq[0]), |
| .O(soclinux_usddrphy_dq_i_nodelay0) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_36 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[33], soclinux_usddrphy_interface1_dfi_p3_wrdata[1], soclinux_usddrphy_interface1_dfi_p2_wrdata[33], soclinux_usddrphy_interface1_dfi_p2_wrdata[1], soclinux_usddrphy_interface1_dfi_p1_wrdata[33], soclinux_usddrphy_interface1_dfi_p1_wrdata[1], soclinux_usddrphy_interface1_dfi_p0_wrdata[33], soclinux_usddrphy_interface1_dfi_p0_wrdata[1]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay1), |
| .T_OUT(soclinux_usddrphy_dq_t1) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_1 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed1), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip1_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_36 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay1), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed1) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_1 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay1), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed1) |
| ); |
| |
| IOBUF IOBUF_1( |
| .I(soclinux_usddrphy_dq_o_delayed1), |
| .T(soclinux_usddrphy_dq_t1), |
| .IO(ddram_dq[1]), |
| .O(soclinux_usddrphy_dq_i_nodelay1) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_37 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[34], soclinux_usddrphy_interface1_dfi_p3_wrdata[2], soclinux_usddrphy_interface1_dfi_p2_wrdata[34], soclinux_usddrphy_interface1_dfi_p2_wrdata[2], soclinux_usddrphy_interface1_dfi_p1_wrdata[34], soclinux_usddrphy_interface1_dfi_p1_wrdata[2], soclinux_usddrphy_interface1_dfi_p0_wrdata[34], soclinux_usddrphy_interface1_dfi_p0_wrdata[2]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay2), |
| .T_OUT(soclinux_usddrphy_dq_t2) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_2 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed2), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip2_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_37 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay2), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed2) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_2 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay2), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed2) |
| ); |
| |
| IOBUF IOBUF_2( |
| .I(soclinux_usddrphy_dq_o_delayed2), |
| .T(soclinux_usddrphy_dq_t2), |
| .IO(ddram_dq[2]), |
| .O(soclinux_usddrphy_dq_i_nodelay2) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_38 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[35], soclinux_usddrphy_interface1_dfi_p3_wrdata[3], soclinux_usddrphy_interface1_dfi_p2_wrdata[35], soclinux_usddrphy_interface1_dfi_p2_wrdata[3], soclinux_usddrphy_interface1_dfi_p1_wrdata[35], soclinux_usddrphy_interface1_dfi_p1_wrdata[3], soclinux_usddrphy_interface1_dfi_p0_wrdata[35], soclinux_usddrphy_interface1_dfi_p0_wrdata[3]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay3), |
| .T_OUT(soclinux_usddrphy_dq_t3) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_3 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed3), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip3_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_38 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay3), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed3) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_3 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay3), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed3) |
| ); |
| |
| IOBUF IOBUF_3( |
| .I(soclinux_usddrphy_dq_o_delayed3), |
| .T(soclinux_usddrphy_dq_t3), |
| .IO(ddram_dq[3]), |
| .O(soclinux_usddrphy_dq_i_nodelay3) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_39 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[36], soclinux_usddrphy_interface1_dfi_p3_wrdata[4], soclinux_usddrphy_interface1_dfi_p2_wrdata[36], soclinux_usddrphy_interface1_dfi_p2_wrdata[4], soclinux_usddrphy_interface1_dfi_p1_wrdata[36], soclinux_usddrphy_interface1_dfi_p1_wrdata[4], soclinux_usddrphy_interface1_dfi_p0_wrdata[36], soclinux_usddrphy_interface1_dfi_p0_wrdata[4]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay4), |
| .T_OUT(soclinux_usddrphy_dq_t4) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_4 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed4), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip4_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_39 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay4), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed4) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_4 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay4), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed4) |
| ); |
| |
| IOBUF IOBUF_4( |
| .I(soclinux_usddrphy_dq_o_delayed4), |
| .T(soclinux_usddrphy_dq_t4), |
| .IO(ddram_dq[4]), |
| .O(soclinux_usddrphy_dq_i_nodelay4) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_40 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[37], soclinux_usddrphy_interface1_dfi_p3_wrdata[5], soclinux_usddrphy_interface1_dfi_p2_wrdata[37], soclinux_usddrphy_interface1_dfi_p2_wrdata[5], soclinux_usddrphy_interface1_dfi_p1_wrdata[37], soclinux_usddrphy_interface1_dfi_p1_wrdata[5], soclinux_usddrphy_interface1_dfi_p0_wrdata[37], soclinux_usddrphy_interface1_dfi_p0_wrdata[5]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay5), |
| .T_OUT(soclinux_usddrphy_dq_t5) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_5 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed5), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip5_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_40 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay5), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed5) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_5 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay5), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed5) |
| ); |
| |
| IOBUF IOBUF_5( |
| .I(soclinux_usddrphy_dq_o_delayed5), |
| .T(soclinux_usddrphy_dq_t5), |
| .IO(ddram_dq[5]), |
| .O(soclinux_usddrphy_dq_i_nodelay5) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_41 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[38], soclinux_usddrphy_interface1_dfi_p3_wrdata[6], soclinux_usddrphy_interface1_dfi_p2_wrdata[38], soclinux_usddrphy_interface1_dfi_p2_wrdata[6], soclinux_usddrphy_interface1_dfi_p1_wrdata[38], soclinux_usddrphy_interface1_dfi_p1_wrdata[6], soclinux_usddrphy_interface1_dfi_p0_wrdata[38], soclinux_usddrphy_interface1_dfi_p0_wrdata[6]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay6), |
| .T_OUT(soclinux_usddrphy_dq_t6) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_6 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed6), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip6_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_41 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay6), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed6) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_6 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay6), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed6) |
| ); |
| |
| IOBUF IOBUF_6( |
| .I(soclinux_usddrphy_dq_o_delayed6), |
| .T(soclinux_usddrphy_dq_t6), |
| .IO(ddram_dq[6]), |
| .O(soclinux_usddrphy_dq_i_nodelay6) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_42 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[39], soclinux_usddrphy_interface1_dfi_p3_wrdata[7], soclinux_usddrphy_interface1_dfi_p2_wrdata[39], soclinux_usddrphy_interface1_dfi_p2_wrdata[7], soclinux_usddrphy_interface1_dfi_p1_wrdata[39], soclinux_usddrphy_interface1_dfi_p1_wrdata[7], soclinux_usddrphy_interface1_dfi_p0_wrdata[39], soclinux_usddrphy_interface1_dfi_p0_wrdata[7]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay7), |
| .T_OUT(soclinux_usddrphy_dq_t7) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_7 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed7), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip7_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_42 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay7), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed7) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_7 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay7), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[0] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed7) |
| ); |
| |
| IOBUF IOBUF_7( |
| .I(soclinux_usddrphy_dq_o_delayed7), |
| .T(soclinux_usddrphy_dq_t7), |
| .IO(ddram_dq[7]), |
| .O(soclinux_usddrphy_dq_i_nodelay7) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_43 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[40], soclinux_usddrphy_interface1_dfi_p3_wrdata[8], soclinux_usddrphy_interface1_dfi_p2_wrdata[40], soclinux_usddrphy_interface1_dfi_p2_wrdata[8], soclinux_usddrphy_interface1_dfi_p1_wrdata[40], soclinux_usddrphy_interface1_dfi_p1_wrdata[8], soclinux_usddrphy_interface1_dfi_p0_wrdata[40], soclinux_usddrphy_interface1_dfi_p0_wrdata[8]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay8), |
| .T_OUT(soclinux_usddrphy_dq_t8) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_8 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed8), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip8_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_43 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay8), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed8) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_8 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay8), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed8) |
| ); |
| |
| IOBUF IOBUF_8( |
| .I(soclinux_usddrphy_dq_o_delayed8), |
| .T(soclinux_usddrphy_dq_t8), |
| .IO(ddram_dq[8]), |
| .O(soclinux_usddrphy_dq_i_nodelay8) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_44 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[41], soclinux_usddrphy_interface1_dfi_p3_wrdata[9], soclinux_usddrphy_interface1_dfi_p2_wrdata[41], soclinux_usddrphy_interface1_dfi_p2_wrdata[9], soclinux_usddrphy_interface1_dfi_p1_wrdata[41], soclinux_usddrphy_interface1_dfi_p1_wrdata[9], soclinux_usddrphy_interface1_dfi_p0_wrdata[41], soclinux_usddrphy_interface1_dfi_p0_wrdata[9]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay9), |
| .T_OUT(soclinux_usddrphy_dq_t9) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_9 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed9), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip9_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_44 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay9), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed9) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_9 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay9), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed9) |
| ); |
| |
| IOBUF IOBUF_9( |
| .I(soclinux_usddrphy_dq_o_delayed9), |
| .T(soclinux_usddrphy_dq_t9), |
| .IO(ddram_dq[9]), |
| .O(soclinux_usddrphy_dq_i_nodelay9) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_45 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[42], soclinux_usddrphy_interface1_dfi_p3_wrdata[10], soclinux_usddrphy_interface1_dfi_p2_wrdata[42], soclinux_usddrphy_interface1_dfi_p2_wrdata[10], soclinux_usddrphy_interface1_dfi_p1_wrdata[42], soclinux_usddrphy_interface1_dfi_p1_wrdata[10], soclinux_usddrphy_interface1_dfi_p0_wrdata[42], soclinux_usddrphy_interface1_dfi_p0_wrdata[10]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay10), |
| .T_OUT(soclinux_usddrphy_dq_t10) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_10 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed10), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip10_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_45 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay10), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed10) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_10 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay10), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed10) |
| ); |
| |
| IOBUF IOBUF_10( |
| .I(soclinux_usddrphy_dq_o_delayed10), |
| .T(soclinux_usddrphy_dq_t10), |
| .IO(ddram_dq[10]), |
| .O(soclinux_usddrphy_dq_i_nodelay10) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_46 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[43], soclinux_usddrphy_interface1_dfi_p3_wrdata[11], soclinux_usddrphy_interface1_dfi_p2_wrdata[43], soclinux_usddrphy_interface1_dfi_p2_wrdata[11], soclinux_usddrphy_interface1_dfi_p1_wrdata[43], soclinux_usddrphy_interface1_dfi_p1_wrdata[11], soclinux_usddrphy_interface1_dfi_p0_wrdata[43], soclinux_usddrphy_interface1_dfi_p0_wrdata[11]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay11), |
| .T_OUT(soclinux_usddrphy_dq_t11) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_11 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed11), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip11_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_46 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay11), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed11) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_11 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay11), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed11) |
| ); |
| |
| IOBUF IOBUF_11( |
| .I(soclinux_usddrphy_dq_o_delayed11), |
| .T(soclinux_usddrphy_dq_t11), |
| .IO(ddram_dq[11]), |
| .O(soclinux_usddrphy_dq_i_nodelay11) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_47 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[44], soclinux_usddrphy_interface1_dfi_p3_wrdata[12], soclinux_usddrphy_interface1_dfi_p2_wrdata[44], soclinux_usddrphy_interface1_dfi_p2_wrdata[12], soclinux_usddrphy_interface1_dfi_p1_wrdata[44], soclinux_usddrphy_interface1_dfi_p1_wrdata[12], soclinux_usddrphy_interface1_dfi_p0_wrdata[44], soclinux_usddrphy_interface1_dfi_p0_wrdata[12]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay12), |
| .T_OUT(soclinux_usddrphy_dq_t12) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_12 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed12), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip12_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_47 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay12), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed12) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_12 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay12), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed12) |
| ); |
| |
| IOBUF IOBUF_12( |
| .I(soclinux_usddrphy_dq_o_delayed12), |
| .T(soclinux_usddrphy_dq_t12), |
| .IO(ddram_dq[12]), |
| .O(soclinux_usddrphy_dq_i_nodelay12) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_48 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[45], soclinux_usddrphy_interface1_dfi_p3_wrdata[13], soclinux_usddrphy_interface1_dfi_p2_wrdata[45], soclinux_usddrphy_interface1_dfi_p2_wrdata[13], soclinux_usddrphy_interface1_dfi_p1_wrdata[45], soclinux_usddrphy_interface1_dfi_p1_wrdata[13], soclinux_usddrphy_interface1_dfi_p0_wrdata[45], soclinux_usddrphy_interface1_dfi_p0_wrdata[13]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay13), |
| .T_OUT(soclinux_usddrphy_dq_t13) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_13 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed13), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip13_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_48 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay13), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed13) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_13 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay13), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed13) |
| ); |
| |
| IOBUF IOBUF_13( |
| .I(soclinux_usddrphy_dq_o_delayed13), |
| .T(soclinux_usddrphy_dq_t13), |
| .IO(ddram_dq[13]), |
| .O(soclinux_usddrphy_dq_i_nodelay13) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_49 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[46], soclinux_usddrphy_interface1_dfi_p3_wrdata[14], soclinux_usddrphy_interface1_dfi_p2_wrdata[46], soclinux_usddrphy_interface1_dfi_p2_wrdata[14], soclinux_usddrphy_interface1_dfi_p1_wrdata[46], soclinux_usddrphy_interface1_dfi_p1_wrdata[14], soclinux_usddrphy_interface1_dfi_p0_wrdata[46], soclinux_usddrphy_interface1_dfi_p0_wrdata[14]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay14), |
| .T_OUT(soclinux_usddrphy_dq_t14) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_14 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed14), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip14_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_49 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay14), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed14) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_14 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay14), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed14) |
| ); |
| |
| IOBUF IOBUF_14( |
| .I(soclinux_usddrphy_dq_o_delayed14), |
| .T(soclinux_usddrphy_dq_t14), |
| .IO(ddram_dq[14]), |
| .O(soclinux_usddrphy_dq_i_nodelay14) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_50 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[47], soclinux_usddrphy_interface1_dfi_p3_wrdata[15], soclinux_usddrphy_interface1_dfi_p2_wrdata[47], soclinux_usddrphy_interface1_dfi_p2_wrdata[15], soclinux_usddrphy_interface1_dfi_p1_wrdata[47], soclinux_usddrphy_interface1_dfi_p1_wrdata[15], soclinux_usddrphy_interface1_dfi_p0_wrdata[47], soclinux_usddrphy_interface1_dfi_p0_wrdata[15]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay15), |
| .T_OUT(soclinux_usddrphy_dq_t15) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_15 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed15), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip15_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_50 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay15), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed15) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_15 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay15), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[1] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed15) |
| ); |
| |
| IOBUF IOBUF_15( |
| .I(soclinux_usddrphy_dq_o_delayed15), |
| .T(soclinux_usddrphy_dq_t15), |
| .IO(ddram_dq[15]), |
| .O(soclinux_usddrphy_dq_i_nodelay15) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_51 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[48], soclinux_usddrphy_interface1_dfi_p3_wrdata[16], soclinux_usddrphy_interface1_dfi_p2_wrdata[48], soclinux_usddrphy_interface1_dfi_p2_wrdata[16], soclinux_usddrphy_interface1_dfi_p1_wrdata[48], soclinux_usddrphy_interface1_dfi_p1_wrdata[16], soclinux_usddrphy_interface1_dfi_p0_wrdata[48], soclinux_usddrphy_interface1_dfi_p0_wrdata[16]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay16), |
| .T_OUT(soclinux_usddrphy_dq_t16) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_16 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed16), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip16_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_51 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay16), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed16) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_16 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay16), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed16) |
| ); |
| |
| IOBUF IOBUF_16( |
| .I(soclinux_usddrphy_dq_o_delayed16), |
| .T(soclinux_usddrphy_dq_t16), |
| .IO(ddram_dq[16]), |
| .O(soclinux_usddrphy_dq_i_nodelay16) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_52 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[49], soclinux_usddrphy_interface1_dfi_p3_wrdata[17], soclinux_usddrphy_interface1_dfi_p2_wrdata[49], soclinux_usddrphy_interface1_dfi_p2_wrdata[17], soclinux_usddrphy_interface1_dfi_p1_wrdata[49], soclinux_usddrphy_interface1_dfi_p1_wrdata[17], soclinux_usddrphy_interface1_dfi_p0_wrdata[49], soclinux_usddrphy_interface1_dfi_p0_wrdata[17]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay17), |
| .T_OUT(soclinux_usddrphy_dq_t17) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_17 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed17), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip17_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_52 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay17), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed17) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_17 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay17), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed17) |
| ); |
| |
| IOBUF IOBUF_17( |
| .I(soclinux_usddrphy_dq_o_delayed17), |
| .T(soclinux_usddrphy_dq_t17), |
| .IO(ddram_dq[17]), |
| .O(soclinux_usddrphy_dq_i_nodelay17) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_53 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[50], soclinux_usddrphy_interface1_dfi_p3_wrdata[18], soclinux_usddrphy_interface1_dfi_p2_wrdata[50], soclinux_usddrphy_interface1_dfi_p2_wrdata[18], soclinux_usddrphy_interface1_dfi_p1_wrdata[50], soclinux_usddrphy_interface1_dfi_p1_wrdata[18], soclinux_usddrphy_interface1_dfi_p0_wrdata[50], soclinux_usddrphy_interface1_dfi_p0_wrdata[18]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay18), |
| .T_OUT(soclinux_usddrphy_dq_t18) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_18 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed18), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip18_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_53 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay18), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed18) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_18 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay18), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed18) |
| ); |
| |
| IOBUF IOBUF_18( |
| .I(soclinux_usddrphy_dq_o_delayed18), |
| .T(soclinux_usddrphy_dq_t18), |
| .IO(ddram_dq[18]), |
| .O(soclinux_usddrphy_dq_i_nodelay18) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_54 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[51], soclinux_usddrphy_interface1_dfi_p3_wrdata[19], soclinux_usddrphy_interface1_dfi_p2_wrdata[51], soclinux_usddrphy_interface1_dfi_p2_wrdata[19], soclinux_usddrphy_interface1_dfi_p1_wrdata[51], soclinux_usddrphy_interface1_dfi_p1_wrdata[19], soclinux_usddrphy_interface1_dfi_p0_wrdata[51], soclinux_usddrphy_interface1_dfi_p0_wrdata[19]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay19), |
| .T_OUT(soclinux_usddrphy_dq_t19) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_19 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed19), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip19_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_54 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay19), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed19) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_19 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay19), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed19) |
| ); |
| |
| IOBUF IOBUF_19( |
| .I(soclinux_usddrphy_dq_o_delayed19), |
| .T(soclinux_usddrphy_dq_t19), |
| .IO(ddram_dq[19]), |
| .O(soclinux_usddrphy_dq_i_nodelay19) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_55 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[52], soclinux_usddrphy_interface1_dfi_p3_wrdata[20], soclinux_usddrphy_interface1_dfi_p2_wrdata[52], soclinux_usddrphy_interface1_dfi_p2_wrdata[20], soclinux_usddrphy_interface1_dfi_p1_wrdata[52], soclinux_usddrphy_interface1_dfi_p1_wrdata[20], soclinux_usddrphy_interface1_dfi_p0_wrdata[52], soclinux_usddrphy_interface1_dfi_p0_wrdata[20]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay20), |
| .T_OUT(soclinux_usddrphy_dq_t20) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_20 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed20), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip20_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_55 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay20), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed20) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_20 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay20), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed20) |
| ); |
| |
| IOBUF IOBUF_20( |
| .I(soclinux_usddrphy_dq_o_delayed20), |
| .T(soclinux_usddrphy_dq_t20), |
| .IO(ddram_dq[20]), |
| .O(soclinux_usddrphy_dq_i_nodelay20) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_56 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[53], soclinux_usddrphy_interface1_dfi_p3_wrdata[21], soclinux_usddrphy_interface1_dfi_p2_wrdata[53], soclinux_usddrphy_interface1_dfi_p2_wrdata[21], soclinux_usddrphy_interface1_dfi_p1_wrdata[53], soclinux_usddrphy_interface1_dfi_p1_wrdata[21], soclinux_usddrphy_interface1_dfi_p0_wrdata[53], soclinux_usddrphy_interface1_dfi_p0_wrdata[21]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay21), |
| .T_OUT(soclinux_usddrphy_dq_t21) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_21 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed21), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip21_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_56 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay21), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed21) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_21 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay21), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed21) |
| ); |
| |
| IOBUF IOBUF_21( |
| .I(soclinux_usddrphy_dq_o_delayed21), |
| .T(soclinux_usddrphy_dq_t21), |
| .IO(ddram_dq[21]), |
| .O(soclinux_usddrphy_dq_i_nodelay21) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_57 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[54], soclinux_usddrphy_interface1_dfi_p3_wrdata[22], soclinux_usddrphy_interface1_dfi_p2_wrdata[54], soclinux_usddrphy_interface1_dfi_p2_wrdata[22], soclinux_usddrphy_interface1_dfi_p1_wrdata[54], soclinux_usddrphy_interface1_dfi_p1_wrdata[22], soclinux_usddrphy_interface1_dfi_p0_wrdata[54], soclinux_usddrphy_interface1_dfi_p0_wrdata[22]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay22), |
| .T_OUT(soclinux_usddrphy_dq_t22) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_22 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed22), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip22_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_57 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay22), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed22) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_22 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay22), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed22) |
| ); |
| |
| IOBUF IOBUF_22( |
| .I(soclinux_usddrphy_dq_o_delayed22), |
| .T(soclinux_usddrphy_dq_t22), |
| .IO(ddram_dq[22]), |
| .O(soclinux_usddrphy_dq_i_nodelay22) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_58 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[55], soclinux_usddrphy_interface1_dfi_p3_wrdata[23], soclinux_usddrphy_interface1_dfi_p2_wrdata[55], soclinux_usddrphy_interface1_dfi_p2_wrdata[23], soclinux_usddrphy_interface1_dfi_p1_wrdata[55], soclinux_usddrphy_interface1_dfi_p1_wrdata[23], soclinux_usddrphy_interface1_dfi_p0_wrdata[55], soclinux_usddrphy_interface1_dfi_p0_wrdata[23]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay23), |
| .T_OUT(soclinux_usddrphy_dq_t23) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_23 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed23), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip23_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_58 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay23), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed23) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_23 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay23), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[2] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed23) |
| ); |
| |
| IOBUF IOBUF_23( |
| .I(soclinux_usddrphy_dq_o_delayed23), |
| .T(soclinux_usddrphy_dq_t23), |
| .IO(ddram_dq[23]), |
| .O(soclinux_usddrphy_dq_i_nodelay23) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_59 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[56], soclinux_usddrphy_interface1_dfi_p3_wrdata[24], soclinux_usddrphy_interface1_dfi_p2_wrdata[56], soclinux_usddrphy_interface1_dfi_p2_wrdata[24], soclinux_usddrphy_interface1_dfi_p1_wrdata[56], soclinux_usddrphy_interface1_dfi_p1_wrdata[24], soclinux_usddrphy_interface1_dfi_p0_wrdata[56], soclinux_usddrphy_interface1_dfi_p0_wrdata[24]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay24), |
| .T_OUT(soclinux_usddrphy_dq_t24) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_24 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed24), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip24_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_59 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay24), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed24) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_24 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay24), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed24) |
| ); |
| |
| IOBUF IOBUF_24( |
| .I(soclinux_usddrphy_dq_o_delayed24), |
| .T(soclinux_usddrphy_dq_t24), |
| .IO(ddram_dq[24]), |
| .O(soclinux_usddrphy_dq_i_nodelay24) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_60 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[57], soclinux_usddrphy_interface1_dfi_p3_wrdata[25], soclinux_usddrphy_interface1_dfi_p2_wrdata[57], soclinux_usddrphy_interface1_dfi_p2_wrdata[25], soclinux_usddrphy_interface1_dfi_p1_wrdata[57], soclinux_usddrphy_interface1_dfi_p1_wrdata[25], soclinux_usddrphy_interface1_dfi_p0_wrdata[57], soclinux_usddrphy_interface1_dfi_p0_wrdata[25]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay25), |
| .T_OUT(soclinux_usddrphy_dq_t25) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_25 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed25), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip25_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_60 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay25), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed25) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_25 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay25), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed25) |
| ); |
| |
| IOBUF IOBUF_25( |
| .I(soclinux_usddrphy_dq_o_delayed25), |
| .T(soclinux_usddrphy_dq_t25), |
| .IO(ddram_dq[25]), |
| .O(soclinux_usddrphy_dq_i_nodelay25) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_61 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[58], soclinux_usddrphy_interface1_dfi_p3_wrdata[26], soclinux_usddrphy_interface1_dfi_p2_wrdata[58], soclinux_usddrphy_interface1_dfi_p2_wrdata[26], soclinux_usddrphy_interface1_dfi_p1_wrdata[58], soclinux_usddrphy_interface1_dfi_p1_wrdata[26], soclinux_usddrphy_interface1_dfi_p0_wrdata[58], soclinux_usddrphy_interface1_dfi_p0_wrdata[26]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay26), |
| .T_OUT(soclinux_usddrphy_dq_t26) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_26 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed26), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip26_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_61 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay26), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed26) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_26 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay26), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed26) |
| ); |
| |
| IOBUF IOBUF_26( |
| .I(soclinux_usddrphy_dq_o_delayed26), |
| .T(soclinux_usddrphy_dq_t26), |
| .IO(ddram_dq[26]), |
| .O(soclinux_usddrphy_dq_i_nodelay26) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_62 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[59], soclinux_usddrphy_interface1_dfi_p3_wrdata[27], soclinux_usddrphy_interface1_dfi_p2_wrdata[59], soclinux_usddrphy_interface1_dfi_p2_wrdata[27], soclinux_usddrphy_interface1_dfi_p1_wrdata[59], soclinux_usddrphy_interface1_dfi_p1_wrdata[27], soclinux_usddrphy_interface1_dfi_p0_wrdata[59], soclinux_usddrphy_interface1_dfi_p0_wrdata[27]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay27), |
| .T_OUT(soclinux_usddrphy_dq_t27) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_27 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed27), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip27_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_62 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay27), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed27) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_27 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay27), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed27) |
| ); |
| |
| IOBUF IOBUF_27( |
| .I(soclinux_usddrphy_dq_o_delayed27), |
| .T(soclinux_usddrphy_dq_t27), |
| .IO(ddram_dq[27]), |
| .O(soclinux_usddrphy_dq_i_nodelay27) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_63 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[60], soclinux_usddrphy_interface1_dfi_p3_wrdata[28], soclinux_usddrphy_interface1_dfi_p2_wrdata[60], soclinux_usddrphy_interface1_dfi_p2_wrdata[28], soclinux_usddrphy_interface1_dfi_p1_wrdata[60], soclinux_usddrphy_interface1_dfi_p1_wrdata[28], soclinux_usddrphy_interface1_dfi_p0_wrdata[60], soclinux_usddrphy_interface1_dfi_p0_wrdata[28]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay28), |
| .T_OUT(soclinux_usddrphy_dq_t28) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_28 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed28), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip28_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_63 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay28), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed28) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_28 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay28), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed28) |
| ); |
| |
| IOBUF IOBUF_28( |
| .I(soclinux_usddrphy_dq_o_delayed28), |
| .T(soclinux_usddrphy_dq_t28), |
| .IO(ddram_dq[28]), |
| .O(soclinux_usddrphy_dq_i_nodelay28) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_64 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[61], soclinux_usddrphy_interface1_dfi_p3_wrdata[29], soclinux_usddrphy_interface1_dfi_p2_wrdata[61], soclinux_usddrphy_interface1_dfi_p2_wrdata[29], soclinux_usddrphy_interface1_dfi_p1_wrdata[61], soclinux_usddrphy_interface1_dfi_p1_wrdata[29], soclinux_usddrphy_interface1_dfi_p0_wrdata[61], soclinux_usddrphy_interface1_dfi_p0_wrdata[29]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay29), |
| .T_OUT(soclinux_usddrphy_dq_t29) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_29 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed29), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip29_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_64 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay29), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed29) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_29 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay29), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed29) |
| ); |
| |
| IOBUF IOBUF_29( |
| .I(soclinux_usddrphy_dq_o_delayed29), |
| .T(soclinux_usddrphy_dq_t29), |
| .IO(ddram_dq[29]), |
| .O(soclinux_usddrphy_dq_i_nodelay29) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_65 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[62], soclinux_usddrphy_interface1_dfi_p3_wrdata[30], soclinux_usddrphy_interface1_dfi_p2_wrdata[62], soclinux_usddrphy_interface1_dfi_p2_wrdata[30], soclinux_usddrphy_interface1_dfi_p1_wrdata[62], soclinux_usddrphy_interface1_dfi_p1_wrdata[30], soclinux_usddrphy_interface1_dfi_p0_wrdata[62], soclinux_usddrphy_interface1_dfi_p0_wrdata[30]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay30), |
| .T_OUT(soclinux_usddrphy_dq_t30) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_30 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed30), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip30_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_65 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay30), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed30) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_30 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay30), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed30) |
| ); |
| |
| IOBUF IOBUF_30( |
| .I(soclinux_usddrphy_dq_o_delayed30), |
| .T(soclinux_usddrphy_dq_t30), |
| .IO(ddram_dq[30]), |
| .O(soclinux_usddrphy_dq_i_nodelay30) |
| ); |
| |
| OSERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .INIT(1'd0), |
| .IS_CLKDIV_INVERTED(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) OSERDESE3_66 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .D({soclinux_usddrphy_interface1_dfi_p3_wrdata[63], soclinux_usddrphy_interface1_dfi_p3_wrdata[31], soclinux_usddrphy_interface1_dfi_p2_wrdata[63], soclinux_usddrphy_interface1_dfi_p2_wrdata[31], soclinux_usddrphy_interface1_dfi_p1_wrdata[63], soclinux_usddrphy_interface1_dfi_p1_wrdata[31], soclinux_usddrphy_interface1_dfi_p0_wrdata[63], soclinux_usddrphy_interface1_dfi_p0_wrdata[31]}), |
| .RST(sys_rst), |
| .T((~soclinux_usddrphy_oe_dq)), |
| .OQ(soclinux_usddrphy_dq_o_nodelay31), |
| .T_OUT(soclinux_usddrphy_dq_t31) |
| ); |
| |
| ISERDESE3 #( |
| .DATA_WIDTH(4'd8), |
| .IS_CLK_B_INVERTED(1'd1), |
| .IS_CLK_INVERTED(1'd0), |
| .SIM_DEVICE("ULTRASCALE_PLUS") |
| ) ISERDESE3_31 ( |
| .CLK(sys4x_clk), |
| .CLKDIV(sys_clk), |
| .CLK_B(sys4x_clk), |
| .D(soclinux_usddrphy_dq_i_delayed31), |
| .FIFO_RD_EN(1'd0), |
| .RST(sys_rst), |
| .Q(soclinux_usddrphy_bitslip31_i) |
| ); |
| |
| ODELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) ODELAYE3_66 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .INC(1'd1), |
| .ODATAIN(soclinux_usddrphy_dq_o_nodelay31), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_wdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_o_delayed31) |
| ); |
| |
| IDELAYE3 #( |
| .CASCADE("NONE"), |
| .DELAY_FORMAT("TIME"), |
| .DELAY_SRC("IDATAIN"), |
| .DELAY_TYPE("VARIABLE"), |
| .DELAY_VALUE(1'd0), |
| .IS_CLK_INVERTED(1'd0), |
| .IS_RST_INVERTED(1'd0), |
| .REFCLK_FREQUENCY(500.0), |
| .SIM_DEVICE("ULTRASCALE_PLUS"), |
| .UPDATE_MODE("ASYNC") |
| ) IDELAYE3_31 ( |
| .CE((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_inc_re)), |
| .CLK(sys_clk), |
| .EN_VTC(soclinux_usddrphy_en_vtc_storage), |
| .IDATAIN(soclinux_usddrphy_dq_i_nodelay31), |
| .INC(1'd1), |
| .RST((soclinux_usddrphy_dly_sel_storage[3] & soclinux_usddrphy_rdly_dq_rst_re)), |
| .DATAOUT(soclinux_usddrphy_dq_i_delayed31) |
| ); |
| |
| IOBUF IOBUF_31( |
| .I(soclinux_usddrphy_dq_o_delayed31), |
| .T(soclinux_usddrphy_dq_t31), |
| .IO(ddram_dq[31]), |
| .O(soclinux_usddrphy_dq_i_nodelay31) |
| ); |
| |
| reg [24:0] storage_2[0:7]; |
| reg [24:0] memdat_5; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_we) |
| storage_2[soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_5 <= storage_2[soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_wrport_dat_r = memdat_5; |
| assign soclinux_sdram_bankmachine0_cmd_buffer_lookahead_rdport_dat_r = storage_2[soclinux_sdram_bankmachine0_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_3[0:7]; |
| reg [24:0] memdat_6; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_we) |
| storage_3[soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_6 <= storage_3[soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_wrport_dat_r = memdat_6; |
| assign soclinux_sdram_bankmachine1_cmd_buffer_lookahead_rdport_dat_r = storage_3[soclinux_sdram_bankmachine1_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_4[0:7]; |
| reg [24:0] memdat_7; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_we) |
| storage_4[soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_7 <= storage_4[soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_wrport_dat_r = memdat_7; |
| assign soclinux_sdram_bankmachine2_cmd_buffer_lookahead_rdport_dat_r = storage_4[soclinux_sdram_bankmachine2_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_5[0:7]; |
| reg [24:0] memdat_8; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_we) |
| storage_5[soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_8 <= storage_5[soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_wrport_dat_r = memdat_8; |
| assign soclinux_sdram_bankmachine3_cmd_buffer_lookahead_rdport_dat_r = storage_5[soclinux_sdram_bankmachine3_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_6[0:7]; |
| reg [24:0] memdat_9; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_we) |
| storage_6[soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_9 <= storage_6[soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_wrport_dat_r = memdat_9; |
| assign soclinux_sdram_bankmachine4_cmd_buffer_lookahead_rdport_dat_r = storage_6[soclinux_sdram_bankmachine4_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_7[0:7]; |
| reg [24:0] memdat_10; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_we) |
| storage_7[soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_10 <= storage_7[soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_wrport_dat_r = memdat_10; |
| assign soclinux_sdram_bankmachine5_cmd_buffer_lookahead_rdport_dat_r = storage_7[soclinux_sdram_bankmachine5_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_8[0:7]; |
| reg [24:0] memdat_11; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_we) |
| storage_8[soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_11 <= storage_8[soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_wrport_dat_r = memdat_11; |
| assign soclinux_sdram_bankmachine6_cmd_buffer_lookahead_rdport_dat_r = storage_8[soclinux_sdram_bankmachine6_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_9[0:7]; |
| reg [24:0] memdat_12; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_we) |
| storage_9[soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_12 <= storage_9[soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_wrport_dat_r = memdat_12; |
| assign soclinux_sdram_bankmachine7_cmd_buffer_lookahead_rdport_dat_r = storage_9[soclinux_sdram_bankmachine7_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_10[0:7]; |
| reg [24:0] memdat_13; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_we) |
| storage_10[soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_13 <= storage_10[soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_wrport_dat_r = memdat_13; |
| assign soclinux_sdram_bankmachine8_cmd_buffer_lookahead_rdport_dat_r = storage_10[soclinux_sdram_bankmachine8_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_11[0:7]; |
| reg [24:0] memdat_14; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_we) |
| storage_11[soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_14 <= storage_11[soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_wrport_dat_r = memdat_14; |
| assign soclinux_sdram_bankmachine9_cmd_buffer_lookahead_rdport_dat_r = storage_11[soclinux_sdram_bankmachine9_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_12[0:7]; |
| reg [24:0] memdat_15; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_we) |
| storage_12[soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_15 <= storage_12[soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_wrport_dat_r = memdat_15; |
| assign soclinux_sdram_bankmachine10_cmd_buffer_lookahead_rdport_dat_r = storage_12[soclinux_sdram_bankmachine10_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_13[0:7]; |
| reg [24:0] memdat_16; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_we) |
| storage_13[soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_16 <= storage_13[soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_wrport_dat_r = memdat_16; |
| assign soclinux_sdram_bankmachine11_cmd_buffer_lookahead_rdport_dat_r = storage_13[soclinux_sdram_bankmachine11_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_14[0:7]; |
| reg [24:0] memdat_17; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_we) |
| storage_14[soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_17 <= storage_14[soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_wrport_dat_r = memdat_17; |
| assign soclinux_sdram_bankmachine12_cmd_buffer_lookahead_rdport_dat_r = storage_14[soclinux_sdram_bankmachine12_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_15[0:7]; |
| reg [24:0] memdat_18; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_we) |
| storage_15[soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_18 <= storage_15[soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_wrport_dat_r = memdat_18; |
| assign soclinux_sdram_bankmachine13_cmd_buffer_lookahead_rdport_dat_r = storage_15[soclinux_sdram_bankmachine13_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_16[0:7]; |
| reg [24:0] memdat_19; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_we) |
| storage_16[soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_19 <= storage_16[soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_wrport_dat_r = memdat_19; |
| assign soclinux_sdram_bankmachine14_cmd_buffer_lookahead_rdport_dat_r = storage_16[soclinux_sdram_bankmachine14_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [24:0] storage_17[0:7]; |
| reg [24:0] memdat_20; |
| always @(posedge sys_clk) begin |
| if (soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_we) |
| storage_17[soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_adr] <= soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_dat_w; |
| memdat_20 <= storage_17[soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_adr]; |
| end |
| |
| always @(posedge sys_clk) begin |
| end |
| |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_wrport_dat_r = memdat_20; |
| assign soclinux_sdram_bankmachine15_cmd_buffer_lookahead_rdport_dat_r = storage_17[soclinux_sdram_bankmachine15_cmd_buffer_lookahead_rdport_adr]; |
| |
| reg [25:0] tag_mem[0:255]; |
| reg [7:0] memadr_1; |
| always @(posedge sys_clk) begin |
| if (soclinux_tag_port_we) |
| tag_mem[soclinux_tag_port_adr] <= soclinux_tag_port_dat_w; |
| memadr_1 <= soclinux_tag_port_adr; |
| end |
| |
| assign soclinux_tag_port_dat_r = tag_mem[memadr_1]; |
| |
| reg [31:0] mem_2[0:4095]; |
| reg [11:0] memadr_2; |
| always @(posedge sys_clk) begin |
| if (emulator_ram_we[0]) |
| mem_2[emulator_ram_adr][7:0] <= emulator_ram_dat_w[7:0]; |
| if (emulator_ram_we[1]) |
| mem_2[emulator_ram_adr][15:8] <= emulator_ram_dat_w[15:8]; |
| if (emulator_ram_we[2]) |
| mem_2[emulator_ram_adr][23:16] <= emulator_ram_dat_w[23:16]; |
| if (emulator_ram_we[3]) |
| mem_2[emulator_ram_adr][31:24] <= emulator_ram_dat_w[31:24]; |
| memadr_2 <= emulator_ram_adr; |
| end |
| |
| assign emulator_ram_dat_r = mem_2[memadr_2]; |
| |
| VexRiscv VexRiscv( |
| .clk(sys_clk), |
| .dBusWishbone_ACK(soclinux_soclinux_cpu_dbus_ack), |
| .dBusWishbone_DAT_MISO(soclinux_soclinux_cpu_dbus_dat_r), |
| .dBusWishbone_ERR(soclinux_soclinux_cpu_dbus_err), |
| .externalInterruptArray(soclinux_soclinux_cpu_interrupt0), |
| .externalResetVector(soclinux_soclinux_vexriscv), |
| .iBusWishbone_ACK(soclinux_soclinux_cpu_ibus_ack), |
| .iBusWishbone_DAT_MISO(soclinux_soclinux_cpu_ibus_dat_r), |
| .iBusWishbone_ERR(soclinux_soclinux_cpu_ibus_err), |
| .reset((sys_rst | soclinux_soclinux_cpu_reset)), |
| .softwareInterrupt(1'd0), |
| .timerInterrupt(soclinux_soclinux_cpu_interrupt1), |
| .dBusWishbone_ADR(soclinux_soclinux_cpu_dbus_adr), |
| .dBusWishbone_BTE(soclinux_soclinux_cpu_dbus_bte), |
| .dBusWishbone_CTI(soclinux_soclinux_cpu_dbus_cti), |
| .dBusWishbone_CYC(soclinux_soclinux_cpu_dbus_cyc), |
| .dBusWishbone_DAT_MOSI(soclinux_soclinux_cpu_dbus_dat_w), |
| .dBusWishbone_SEL(soclinux_soclinux_cpu_dbus_sel), |
| .dBusWishbone_STB(soclinux_soclinux_cpu_dbus_stb), |
| .dBusWishbone_WE(soclinux_soclinux_cpu_dbus_we), |
| .iBusWishbone_ADR(soclinux_soclinux_cpu_ibus_adr), |
| .iBusWishbone_BTE(soclinux_soclinux_cpu_ibus_bte), |
| .iBusWishbone_CTI(soclinux_soclinux_cpu_ibus_cti), |
| .iBusWishbone_CYC(soclinux_soclinux_cpu_ibus_cyc), |
| .iBusWishbone_DAT_MOSI(soclinux_soclinux_cpu_ibus_dat_w), |
| .iBusWishbone_SEL(soclinux_soclinux_cpu_ibus_sel), |
| .iBusWishbone_STB(soclinux_soclinux_cpu_ibus_stb), |
| .iBusWishbone_WE(soclinux_soclinux_cpu_ibus_we) |
| ); |
| |
| MMCME2_ADV #( |
| .BANDWIDTH("OPTIMIZED"), |
| .CLKFBOUT_MULT_F(4'd8), |
| .CLKIN1_PERIOD(8.0), |
| .CLKOUT0_DIVIDE_F(2'd2), |
| .CLKOUT0_PHASE(1'd0), |
| .CLKOUT1_DIVIDE(2'd2), |
| .CLKOUT1_PHASE(1'd0), |
| .DIVCLK_DIVIDE(1'd1), |
| .REF_JITTER1(0.01) |
| ) MMCME2_ADV ( |
| .CLKFBIN(mmcm_fb), |
| .CLKIN1(soclinux_clkin), |
| .RST(soclinux_reset), |
| .CLKFBOUT(mmcm_fb), |
| .CLKOUT0(soclinux_clkout0), |
| .CLKOUT1(soclinux_clkout1), |
| .LOCKED(soclinux_locked) |
| ); |
| |
| reg [7:0] data_mem_grain0[0:255]; |
| reg [7:0] memadr_3; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[0]) |
| data_mem_grain0[soclinux_data_port_adr] <= soclinux_data_port_dat_w[7:0]; |
| memadr_3 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[7:0] = data_mem_grain0[memadr_3]; |
| |
| reg [7:0] data_mem_grain1[0:255]; |
| reg [7:0] memadr_4; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[1]) |
| data_mem_grain1[soclinux_data_port_adr] <= soclinux_data_port_dat_w[15:8]; |
| memadr_4 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[15:8] = data_mem_grain1[memadr_4]; |
| |
| reg [7:0] data_mem_grain2[0:255]; |
| reg [7:0] memadr_5; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[2]) |
| data_mem_grain2[soclinux_data_port_adr] <= soclinux_data_port_dat_w[23:16]; |
| memadr_5 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[23:16] = data_mem_grain2[memadr_5]; |
| |
| reg [7:0] data_mem_grain3[0:255]; |
| reg [7:0] memadr_6; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[3]) |
| data_mem_grain3[soclinux_data_port_adr] <= soclinux_data_port_dat_w[31:24]; |
| memadr_6 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[31:24] = data_mem_grain3[memadr_6]; |
| |
| reg [7:0] data_mem_grain4[0:255]; |
| reg [7:0] memadr_7; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[4]) |
| data_mem_grain4[soclinux_data_port_adr] <= soclinux_data_port_dat_w[39:32]; |
| memadr_7 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[39:32] = data_mem_grain4[memadr_7]; |
| |
| reg [7:0] data_mem_grain5[0:255]; |
| reg [7:0] memadr_8; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[5]) |
| data_mem_grain5[soclinux_data_port_adr] <= soclinux_data_port_dat_w[47:40]; |
| memadr_8 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[47:40] = data_mem_grain5[memadr_8]; |
| |
| reg [7:0] data_mem_grain6[0:255]; |
| reg [7:0] memadr_9; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[6]) |
| data_mem_grain6[soclinux_data_port_adr] <= soclinux_data_port_dat_w[55:48]; |
| memadr_9 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[55:48] = data_mem_grain6[memadr_9]; |
| |
| reg [7:0] data_mem_grain7[0:255]; |
| reg [7:0] memadr_10; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[7]) |
| data_mem_grain7[soclinux_data_port_adr] <= soclinux_data_port_dat_w[63:56]; |
| memadr_10 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[63:56] = data_mem_grain7[memadr_10]; |
| |
| reg [7:0] data_mem_grain8[0:255]; |
| reg [7:0] memadr_11; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[8]) |
| data_mem_grain8[soclinux_data_port_adr] <= soclinux_data_port_dat_w[71:64]; |
| memadr_11 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[71:64] = data_mem_grain8[memadr_11]; |
| |
| reg [7:0] data_mem_grain9[0:255]; |
| reg [7:0] memadr_12; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[9]) |
| data_mem_grain9[soclinux_data_port_adr] <= soclinux_data_port_dat_w[79:72]; |
| memadr_12 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[79:72] = data_mem_grain9[memadr_12]; |
| |
| reg [7:0] data_mem_grain10[0:255]; |
| reg [7:0] memadr_13; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[10]) |
| data_mem_grain10[soclinux_data_port_adr] <= soclinux_data_port_dat_w[87:80]; |
| memadr_13 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[87:80] = data_mem_grain10[memadr_13]; |
| |
| reg [7:0] data_mem_grain11[0:255]; |
| reg [7:0] memadr_14; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[11]) |
| data_mem_grain11[soclinux_data_port_adr] <= soclinux_data_port_dat_w[95:88]; |
| memadr_14 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[95:88] = data_mem_grain11[memadr_14]; |
| |
| reg [7:0] data_mem_grain12[0:255]; |
| reg [7:0] memadr_15; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[12]) |
| data_mem_grain12[soclinux_data_port_adr] <= soclinux_data_port_dat_w[103:96]; |
| memadr_15 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[103:96] = data_mem_grain12[memadr_15]; |
| |
| reg [7:0] data_mem_grain13[0:255]; |
| reg [7:0] memadr_16; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[13]) |
| data_mem_grain13[soclinux_data_port_adr] <= soclinux_data_port_dat_w[111:104]; |
| memadr_16 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[111:104] = data_mem_grain13[memadr_16]; |
| |
| reg [7:0] data_mem_grain14[0:255]; |
| reg [7:0] memadr_17; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[14]) |
| data_mem_grain14[soclinux_data_port_adr] <= soclinux_data_port_dat_w[119:112]; |
| memadr_17 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[119:112] = data_mem_grain14[memadr_17]; |
| |
| reg [7:0] data_mem_grain15[0:255]; |
| reg [7:0] memadr_18; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[15]) |
| data_mem_grain15[soclinux_data_port_adr] <= soclinux_data_port_dat_w[127:120]; |
| memadr_18 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[127:120] = data_mem_grain15[memadr_18]; |
| |
| reg [7:0] data_mem_grain16[0:255]; |
| reg [7:0] memadr_19; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[16]) |
| data_mem_grain16[soclinux_data_port_adr] <= soclinux_data_port_dat_w[135:128]; |
| memadr_19 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[135:128] = data_mem_grain16[memadr_19]; |
| |
| reg [7:0] data_mem_grain17[0:255]; |
| reg [7:0] memadr_20; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[17]) |
| data_mem_grain17[soclinux_data_port_adr] <= soclinux_data_port_dat_w[143:136]; |
| memadr_20 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[143:136] = data_mem_grain17[memadr_20]; |
| |
| reg [7:0] data_mem_grain18[0:255]; |
| reg [7:0] memadr_21; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[18]) |
| data_mem_grain18[soclinux_data_port_adr] <= soclinux_data_port_dat_w[151:144]; |
| memadr_21 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[151:144] = data_mem_grain18[memadr_21]; |
| |
| reg [7:0] data_mem_grain19[0:255]; |
| reg [7:0] memadr_22; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[19]) |
| data_mem_grain19[soclinux_data_port_adr] <= soclinux_data_port_dat_w[159:152]; |
| memadr_22 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[159:152] = data_mem_grain19[memadr_22]; |
| |
| reg [7:0] data_mem_grain20[0:255]; |
| reg [7:0] memadr_23; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[20]) |
| data_mem_grain20[soclinux_data_port_adr] <= soclinux_data_port_dat_w[167:160]; |
| memadr_23 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[167:160] = data_mem_grain20[memadr_23]; |
| |
| reg [7:0] data_mem_grain21[0:255]; |
| reg [7:0] memadr_24; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[21]) |
| data_mem_grain21[soclinux_data_port_adr] <= soclinux_data_port_dat_w[175:168]; |
| memadr_24 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[175:168] = data_mem_grain21[memadr_24]; |
| |
| reg [7:0] data_mem_grain22[0:255]; |
| reg [7:0] memadr_25; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[22]) |
| data_mem_grain22[soclinux_data_port_adr] <= soclinux_data_port_dat_w[183:176]; |
| memadr_25 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[183:176] = data_mem_grain22[memadr_25]; |
| |
| reg [7:0] data_mem_grain23[0:255]; |
| reg [7:0] memadr_26; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[23]) |
| data_mem_grain23[soclinux_data_port_adr] <= soclinux_data_port_dat_w[191:184]; |
| memadr_26 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[191:184] = data_mem_grain23[memadr_26]; |
| |
| reg [7:0] data_mem_grain24[0:255]; |
| reg [7:0] memadr_27; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[24]) |
| data_mem_grain24[soclinux_data_port_adr] <= soclinux_data_port_dat_w[199:192]; |
| memadr_27 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[199:192] = data_mem_grain24[memadr_27]; |
| |
| reg [7:0] data_mem_grain25[0:255]; |
| reg [7:0] memadr_28; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[25]) |
| data_mem_grain25[soclinux_data_port_adr] <= soclinux_data_port_dat_w[207:200]; |
| memadr_28 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[207:200] = data_mem_grain25[memadr_28]; |
| |
| reg [7:0] data_mem_grain26[0:255]; |
| reg [7:0] memadr_29; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[26]) |
| data_mem_grain26[soclinux_data_port_adr] <= soclinux_data_port_dat_w[215:208]; |
| memadr_29 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[215:208] = data_mem_grain26[memadr_29]; |
| |
| reg [7:0] data_mem_grain27[0:255]; |
| reg [7:0] memadr_30; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[27]) |
| data_mem_grain27[soclinux_data_port_adr] <= soclinux_data_port_dat_w[223:216]; |
| memadr_30 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[223:216] = data_mem_grain27[memadr_30]; |
| |
| reg [7:0] data_mem_grain28[0:255]; |
| reg [7:0] memadr_31; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[28]) |
| data_mem_grain28[soclinux_data_port_adr] <= soclinux_data_port_dat_w[231:224]; |
| memadr_31 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[231:224] = data_mem_grain28[memadr_31]; |
| |
| reg [7:0] data_mem_grain29[0:255]; |
| reg [7:0] memadr_32; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[29]) |
| data_mem_grain29[soclinux_data_port_adr] <= soclinux_data_port_dat_w[239:232]; |
| memadr_32 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[239:232] = data_mem_grain29[memadr_32]; |
| |
| reg [7:0] data_mem_grain30[0:255]; |
| reg [7:0] memadr_33; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[30]) |
| data_mem_grain30[soclinux_data_port_adr] <= soclinux_data_port_dat_w[247:240]; |
| memadr_33 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[247:240] = data_mem_grain30[memadr_33]; |
| |
| reg [7:0] data_mem_grain31[0:255]; |
| reg [7:0] memadr_34; |
| always @(posedge sys_clk) begin |
| if (soclinux_data_port_we[31]) |
| data_mem_grain31[soclinux_data_port_adr] <= soclinux_data_port_dat_w[255:248]; |
| memadr_34 <= soclinux_data_port_adr; |
| end |
| |
| assign soclinux_data_port_dat_r[255:248] = data_mem_grain31[memadr_34]; |
| |
| IBUFDS IBUFDS( |
| .I(clk125_p), |
| .IB(clk125_n), |
| .O(soclinux_clkin) |
| ); |
| |
| (* ars_ff1 = "true", async_reg = "true" *) FDPE #( |
| .INIT(1'd1) |
| ) FDPE ( |
| .C(clk500_clk), |
| .CE(1'd1), |
| .D(1'd0), |
| .PRE(xilinxasyncresetsynchronizerimpl0), |
| .Q(xilinxasyncresetsynchronizerimpl0_rst_meta) |
| ); |
| |
| (* ars_ff2 = "true", async_reg = "true" *) FDPE #( |
| .INIT(1'd1) |
| ) FDPE_1 ( |
| .C(clk500_clk), |
| .CE(1'd1), |
| .D(xilinxasyncresetsynchronizerimpl0_rst_meta), |
| .PRE(xilinxasyncresetsynchronizerimpl0), |
| .Q(clk500_rst) |
| ); |
| |
| (* ars_ff1 = "true", async_reg = "true" *) FDPE #( |
| .INIT(1'd1) |
| ) FDPE_2 ( |
| .C(ic_clk), |
| .CE(1'd1), |
| .D(1'd0), |
| .PRE(soclinux_ic_reset), |
| .Q(xilinxasyncresetsynchronizerimpl1_rst_meta) |
| ); |
| |
| (* ars_ff2 = "true", async_reg = "true" *) FDPE #( |
| .INIT(1'd1) |
| ) FDPE_3 ( |
| .C(ic_clk), |
| .CE(1'd1), |
| .D(xilinxasyncresetsynchronizerimpl1_rst_meta), |
| .PRE(soclinux_ic_reset), |
| .Q(ic_rst) |
| ); |
| |
| endmodule |
