002-tilegrid: clb_int: Add base address calculation for clb_int Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
diff --git a/fuzzers/002-tilegrid/Makefile b/fuzzers/002-tilegrid/Makefile index a093422..cc4ac6b 100644 --- a/fuzzers/002-tilegrid/Makefile +++ b/fuzzers/002-tilegrid/Makefile
@@ -1,7 +1,8 @@ FUZDIR=$(shell pwd) BUILD_DIR=$(FUZDIR)/build TILEGRID_TDB_DEPENDENCIES= -TILEGRID_TDB_DEPENDENCIES += clb/build/segbits_tilegrid.tdb +TILEGRID_TDB_DEPENDENCIES += clb/build/segbits_tilegrid.tdb \ + clb_int/build/segbits_tilegrid.tdb GENERATE_FULL_ARGS= database: build/tilegrid.json
diff --git a/fuzzers/002-tilegrid/add_tdb.py b/fuzzers/002-tilegrid/add_tdb.py index 124db6c..6b7274a 100644 --- a/fuzzers/002-tilegrid/add_tdb.py +++ b/fuzzers/002-tilegrid/add_tdb.py
@@ -77,6 +77,7 @@ int_frames, int_words = localutil.get_int_params() tdb_fns = [ ("clb/build/segbits_tilegrid.tdb", 36, 2), + ("clb_int/build/segbits_tilegrid.tdb", 60, 2), ] for (tdb_fn, frames, words) in tdb_fns:
diff --git a/fuzzers/002-tilegrid/clb_int/Makefile b/fuzzers/002-tilegrid/clb_int/Makefile new file mode 100644 index 0000000..a55bb4b --- /dev/null +++ b/fuzzers/002-tilegrid/clb_int/Makefile
@@ -0,0 +1,4 @@ +N ?= 48 +GENERATE_ARGS?=--oneval 0 --design params.csv --dword 1 --dframe 3a +include ../fuzzaddr/common.mk +
diff --git a/fuzzers/002-tilegrid/clb_int/generate.tcl b/fuzzers/002-tilegrid/clb_int/generate.tcl new file mode 100644 index 0000000..93c16fd --- /dev/null +++ b/fuzzers/002-tilegrid/clb_int/generate.tcl
@@ -0,0 +1,17 @@ +source "$::env(XRAY_DIR)/utils/utils.tcl" + +proc run {} { + create_project -force -part $::env(XRAY_PART) design design + read_verilog top.v + synth_design -top top + + set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design] + + place_design + route_design + + write_checkpoint -force design.dcp + write_bitstream -force design.bit +} + +run
diff --git a/fuzzers/002-tilegrid/clb_int/top.py b/fuzzers/002-tilegrid/clb_int/top.py new file mode 100644 index 0000000..250aebe --- /dev/null +++ b/fuzzers/002-tilegrid/clb_int/top.py
@@ -0,0 +1,81 @@ +import os +import random +random.seed(int(os.getenv("SEED"), 16)) +from utils import util +from utils.db import Database + + +def gen_sites(): + db = Database(util.get_db_root()) + grid = db.grid() + for tile_name in sorted(grid.tiles()): + loc = grid.loc_of_tilename(tile_name) + gridinfo = grid.gridinfo_at_loc(loc) + if gridinfo.tile_type in ['CLEL_L', 'CLEL_R', 'CLEM_L', 'CLEM_R']: + site_name = sorted(gridinfo.sites.keys())[0] + if gridinfo.tile_type[-1] == 'L': + int_tile_loc = (loc.grid_x + 1, loc.grid_y) + else: + int_tile_loc = (loc.grid_x - 1, loc.grid_y) + + int_tile_name = grid.tilename_at_loc(int_tile_loc) + + if not int_tile_name.startswith('INT_'): + continue + + yield int_tile_name, site_name + + +def write_params(params): + pinstr = 'tile,val\n' + for tile, (site, val) in sorted(params.items()): + pinstr += '%s,%s,%s\n' % (tile, val, site) + open('params.csv', 'w').write(pinstr) + + +def run(): + print(''' +module top(); + ''') + + params = {} + + sites = sorted(list(gen_sites())) + for (tile_name, site_name), isone in zip(sites, + util.gen_fuzz_states(len(sites))): + params[tile_name] = (site_name, isone) + + # Force HARD0 -> GFAN1 with I2 = 0 + # Toggle 1 pip with I1 = ? + print( + ''' + wire lut_to_f7_{0}, f7_to_f8_{0}; + (* KEEP, DONT_TOUCH, LOC = "{0}" *) + LUT6_L #( + .INIT(0) + ) lut_rom_{0} ( + .I0(1), + .I1({1}), + .I2(0), + .I3(1), + .I4(1), + .I5(1), + .LO(lut_to_f7_{0}) + ); + (* KEEP, DONT_TOUCH, LOC = "{0}" *) + MUXF7_L f7_{0} ( + .I0(lut_to_f7_{0}), + .LO(f7_to_f8_{0}) + ); + (* KEEP, DONT_TOUCH, LOC = "{0}" *) + MUXF8 f8_{0} ( + .I0(f7_to_f8_{0}) + ); +'''.format(site_name, isone)) + + print("endmodule") + write_params(params) + + +if __name__ == '__main__': + run()