SVIncCompil/Testcases/RiscV/sim/simv/slpp_all/surelog.log

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*  SURELOG System Verilog Compiler/Linter  *
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Copyright (c) 2017-2019 ACE Cloud,
Authorized used only.

VERSION: 0.01
BUILT  : Sep  4 2019
DATE   : 2019-09-05.21:00:08
COMMAND: -full64 -PP -notice -line +lint=all,noVCDE,noUI +v2k -timescale=1ns/10ps -quiet +define+DEBUG -debug_pp +incdir+src/main/verilog -Mdirectory=sim/csrc +vc+list -CC -I/include -CC -std=c++11 -o sim/simv src/test/verilog/vscale_hex_tb.v src/test/verilog/vscale_sim_top.v src/test/verilog/vscale_dp_hasti_sram.v src/main/verilog/vscale_core.v src/main/verilog/vscale_hasti_bridge.v src/main/verilog/vscale_pipeline.v src/main/verilog/vscale_ctrl.v src/main/verilog/vscale_regfile.v src/main/verilog/vscale_src_a_mux.v src/main/verilog/vscale_src_b_mux.v src/main/verilog/vscale_imm_gen.v src/main/verilog/vscale_alu.v src/main/verilog/vscale_mul_div.v src/main/verilog/vscale_csr_file.v src/main/verilog/vscale_PC_mux.v

[INFO :CM0023] Creating log file sim/simv/slpp_all/surelog.log.

[WARNI:CM0010] Command line argument "-full64" ignored.

[WARNI:CM0010] Command line argument "-PP" ignored.

[WARNI:CM0010] Command line argument "-notice" ignored.

[WARNI:CM0010] Command line argument "-line" ignored.

[NOTE :CM0009] Command line argument "+lint=all,noVCDE,noUI" ignored.

[NOTE :CM0009] Command line argument "+v2k" ignored.

[WARNI:CM0010] Command line argument "-quiet" ignored.

[WARNI:CM0010] Command line argument "-debug_pp" ignored.

[WARNI:CM0010] Command line argument "-Mdirectory=sim/csrc" ignored.

[NOTE :CM0009] Command line argument "+vc+list" ignored.

[WARNI:CM0010] Command line argument "-CC" ignored.

[WARNI:CM0010] Command line argument "-I/include" ignored.

[WARNI:CM0010] Command line argument "-std=c++11" ignored.

[FATAL:CM0008] Verilog File "/home/alain/surelog_base/SVIncCompil/dist/Debug/GNU-Linux/../sv/builtin.sv" does not exist.

[  FATAL] : 1
[  ERROR] : 0
[WARNING] : 10
[   NOTE] : 3

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*   End SURELOG SVerilog Compiler/Linter   *
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