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foss-fpga-tools
/
third_party
/
Surelog
/
356a4bf2123fc606ca19fbed9b9c535f149fdec5
/
.
/
SVIncCompil
/
Testcases
/
Yosys
/
lut
/
map_xor.v
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module
top
();
input a
,
b
;
output y
;
assign y
=
a
^
b
;
endmodule