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356a4bf2123fc606ca19fbed9b9c535f149fdec5
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SVIncCompil
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Testcases
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YosysTests
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architecture
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synth_xilinx_edif.ys
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read_verilog
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.
v
synth_xilinx
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edif edif
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edif
write_verilog synth
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v
