blob: 5b20bd95e9588200f1e4982eb8400bc1d08a55a1 [file] [log] [blame]
read_verilog -sv ../top.v
aigmap
write_aiger -map a.map aiger.aiger
design -reset
read_verilog -sv ../top_clean.v
aigmap
write_aiger aiger.aiger
synth -top top
write_verilog synth.v