blob: 7716f81bf623439ed3656584b1a22616513078c2 [file] [log] [blame]
read_verilog -sv ../top_clean.v
synth -top top
aigmap
write_aiger -miter aiger.aiger
design -reset
read_verilog -sv ../top_clean.v
aigmap
write_aiger aiger.aiger
synth -top top
write_verilog synth.v