blob: 02e34c196ade33566cb228a4cc738bda9c5b6e2f [file] [log] [blame]
read_verilog -sv ../top.v
aigmap
write_aiger aiger.aiger
design -reset
read_aiger aiger.aiger
design -reset
read_verilog -sv ../top.v
synth -top top
write_verilog synth.v