blob: 6fdcab4e3df431885d58c2f6804bf0296959b5ba [file] [log] [blame]
read_verilog -sv ../top.v
proc
aigmap
write_aiger aiger.aiger
design -reset
read_aiger aiger.aiger
design -reset
read_verilog -sv ../top.v
synth -top top
write_verilog synth.v