blob: ee11fbc00bf18124d3c6f1d7e335c3977d05a948 [file] [log] [blame]
read_verilog ../top.v
synth -top top
write_blif -buf a a a blif1.blif
design -reset
read_blif blif1.blif
design -reset
read_verilog -sv ../top.v
synth -top top
write_blif blif5.blif
write_verilog synth.v