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foss-fpga-tools
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third_party
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Surelog
/
356a4bf2123fc606ca19fbed9b9c535f149fdec5
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.
/
SVIncCompil
/
Testcases
/
YosysTests
/
frontends
/
scripts
/
read_define_value.ys
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read
-
formal
../
top
.
v
read
-
define MACRO
=
1
design
-
reset
read_verilog
../
top
.
v
synth
-
top top
write_verilog synth
.
v
