SVIncCompil/Testcases/YosysTests/regression/issue_00862/top.v - third_party/Surelog - Git at Google

 module test(input wire A);
   localparam TEST = 1;
   always_comb begin
     case (A)
       TEST: assert(1);
     endcase
   end
 endmodule
	module test(input wire A);
	localparam TEST = 1;
	always_comb begin
	case (A)
	TEST: assert(1);
	endcase
	end
	endmodule