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foss-fpga-tools
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third_party
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Surelog
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356a4bf2123fc606ca19fbed9b9c535f149fdec5
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.
/
SVIncCompil
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Testcases
/
YosysTests
/
simple
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scripts
/
shregmap_clkpol_neg.ys
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read_verilog
../
top
.
v
synth_greenpak4
-
run
begin
:
map_luts
shregmap
-
clkpol neg
design
-
reset
read_verilog
../
top
.
v
write_verilog synth
.
v
