SVIncCompil/Testcases/YosysBigSim/bch_verilog/sim/settings.sh - third_party/Surelog - Git at Google

 YOSYS_GLOBRST=true
 RTL="bch_decode.v bch_encode.v bch_math.v bch_syndrome_method1.v
      bch_syndrome_method2.v bch_syndrome.v chien.v dec_decode.v
      tmec_decode_parallel.v tmec_decode_serial.v tmec_decode.v"
 SIM="tb_sim.v sim.v"
	YOSYS_GLOBRST=true
	RTL="bch_decode.v bch_encode.v bch_math.v bch_syndrome_method1.v
	bch_syndrome_method2.v bch_syndrome.v chien.v dec_decode.v
	tmec_decode_parallel.v tmec_decode_serial.v tmec_decode.v"
	SIM="tb_sim.v sim.v"