| ******************************************** |
| * SURELOG System Verilog Compiler/Linter * |
| ******************************************** |
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| [INFO :CM0023] Creating log file ./slpp_all/surelog.log. |
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| [INFO :PP0122] Preprocessing source file "/home/alain/Surelog/src/dist/surelog/bin/../sv/builtin.sv". |
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| [INFO :PP0122] Preprocessing source file "top.v". |
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| [INFO :PP0122] Preprocessing source file "/home/alain/Surelog/src/Testcases/OldLibrary/lib/CELL2.v". |
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| [INFO :PP0122] Preprocessing source file "/home/alain/Surelog/src/Testcases/OldLibrary/lib/CELL1.v". |
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| [INFO :PP0122] Preprocessing source file "/home/alain/Surelog/src/Testcases/OldLibrary/lib/CELL3.v". |
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| [INFO :PA0201] Parsing source file "/home/alain/Surelog/src/dist/surelog/bin/../sv/builtin.sv". |
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| [INFO :PA0201] Parsing source file "top.v". |
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| [INFO :PA0201] Parsing source file "/home/alain/Surelog/src/Testcases/OldLibrary/lib/CELL2.v". |
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| [INFO :PA0201] Parsing source file "/home/alain/Surelog/src/Testcases/OldLibrary/lib/CELL1.v". |
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| [INFO :PA0201] Parsing source file "/home/alain/Surelog/src/Testcases/OldLibrary/lib/CELL3.v". |
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| [WARNI:PA0205] top.v:1 No timescale set for "top". |
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| [WARNI:PA0205] /home/alain/Surelog/src/Testcases/OldLibrary/lib/CELL2.v:1 No timescale set for "CELL2". |
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| [WARNI:PA0205] /home/alain/Surelog/src/Testcases/OldLibrary/lib/CELL1.v:1 No timescale set for "CELL1". |
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| [WARNI:PA0205] /home/alain/Surelog/src/Testcases/OldLibrary/lib/CELL3.v:1 No timescale set for "CELL3". |
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| [INFO :CP0300] Compilation... |
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| [INFO :CP0303] /home/alain/Surelog/src/Testcases/OldLibrary/lib/CELL1.v:1 Compile module "work@CELL1". |
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| [INFO :CP0305] /home/alain/Surelog/src/Testcases/OldLibrary/lib/CELL2.v:1 Compile udp "work@CELL2". |
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| [INFO :CP0305] /home/alain/Surelog/src/Testcases/OldLibrary/lib/CELL3.v:1 Compile udp "work@CELL3". |
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| [INFO :CP0303] top.v:1 Compile module "work@top". |
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| [INFO :CP0302] /home/alain/Surelog/src/dist/surelog/bin/../sv/builtin.sv:4 Compile class "work@mailbox". |
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| [INFO :CP0302] /home/alain/Surelog/src/dist/surelog/bin/../sv/builtin.sv:33 Compile class "work@process". |
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| [INFO :CP0302] /home/alain/Surelog/src/dist/surelog/bin/../sv/builtin.sv:58 Compile class "work@semaphore". |
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| [INFO :EL0526] Design Elaboration... |
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| Instance tree: |
| [TOP] work@top work@top |
| [MOD] work@CELL1 work@top.cell1 |
| [UDP] work@CELL2 work@top.cell2 |
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| [NOTE :EL0503] top.v:1 Top level module "work@top". |
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| [NOTE :EL0508] Nb Top level modules: 1. |
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| [NOTE :EL0509] Max instance depth: 2. |
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| [NOTE :EL0510] Nb instances: 3. |
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| [NOTE :EL0511] Nb leaf instances: 2. |
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| [NOTE :EL0523] top.v:1 Instance "work@top". |
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| [NOTE :EL0523] top.v:3 Instance "work@top.cell1". |
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| [NOTE :EL0523] top.v:5 Instance "work@top.cell2". |
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| [ FATAL] : 0 |
| [ ERROR] : 0 |
| [WARNING] : 4 |
| [ NOTE] : 8 |
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| ******************************************** |
| * End SURELOG SVerilog Compiler/Linter * |
| ******************************************** |
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| 0.28user 0.02system 0:00.31elapsed 98%CPU (0avgtext+0avgdata 40060maxresident)k |
| 0inputs+144outputs (0major+10440minor)pagefaults 0swaps |
| sh: 2: -mt: not found |
