| [INFO :CM0023] Creating log file ../../build/tests/TestMacros/slpp_all/surelog.log. |
| |
| [SYNTX:PP0106] TestMacros.v:14 Syntax error: no viable alternative at input '`define\n', |
| `define |
| ^-- TestMacros.v:14 col:7. |
| |
| [ERROR:PP0111] TestMacros.v:12 Illegally redefining compiler directive "`define" as a macro name. |
| |
| [SYNTX:PA0207] macros.inc:12 Syntax error: mismatched input 'begin' expecting <EOF>, |
| begin |
| ^-- ../../build/tests/TestMacros/slpp_all/work/TestMacros.v:2 col:3. |
| |
| [INFO :CP0300] Compilation... |
| |
| [INFO :CP0303] /home/alain/Surelog/tests/TestMacros/xl.v:385 Compile module "work@CM8". |
| |
| [INFO :CP0303] /home/alain/Surelog/tests/TestMacros/xl.v:181 Compile module "work@DFM7A". |
| |
| [INFO :CP0303] /home/alain/Surelog/tests/TestMacros/xl.v:4 Compile module "work@GND". |
| |
| [INFO :CP0303] /home/alain/Surelog/tests/TestMacros/xl.v:150 Compile module "work@INBUF". |
| |
| [INFO :CP0303] /home/alain/Surelog/tests/TestMacros/xl.v:24 Compile module "work@OUTBUF". |
| |
| [INFO :CP0305] /home/alain/Surelog/tests/TestMacros/xl.v:333 Compile udp "work@UFPRB". |
| |
| [INFO :CP0305] /home/alain/Surelog/tests/TestMacros/xl.v:74 Compile udp "work@U_MUX_2". |
| |
| [INFO :CP0305] /home/alain/Surelog/tests/TestMacros/xl.v:286 Compile udp "work@U_MUX_4". |
| |
| [INFO :CP0303] /home/alain/Surelog/tests/TestMacros/xl.v:53 Compile module "work@VCC". |
| |
| [INFO :CP0303] /home/alain/Surelog/tests/TestMacros/xl.v:99 Compile module "work@xCM8". |
| |
| [INFO :CP0302] builtin.sv:4 Compile class "work@mailbox". |
| |
| [INFO :CP0302] builtin.sv:33 Compile class "work@process". |
| |
| [INFO :CP0302] builtin.sv:58 Compile class "work@semaphore". |
| |
| [NOTE :CP0309] /home/alain/Surelog/tests/TestMacros/xl.v:385 Implicit port type (wire) for "Y". |
| |
| [NOTE :CP0309] /home/alain/Surelog/tests/TestMacros/xl.v:181 Implicit port type (wire) for "Q". |
| |
| [NOTE :CP0309] /home/alain/Surelog/tests/TestMacros/xl.v:4 Implicit port type (wire) for "Y". |
| |
| [NOTE :CP0309] /home/alain/Surelog/tests/TestMacros/xl.v:150 Implicit port type (wire) for "Y". |
| |
| [NOTE :CP0309] /home/alain/Surelog/tests/TestMacros/xl.v:24 Implicit port type (wire) for "PAD". |
| |
| [NOTE :CP0309] /home/alain/Surelog/tests/TestMacros/xl.v:53 Implicit port type (wire) for "Y". |
| |
| [NOTE :CP0309] /home/alain/Surelog/tests/TestMacros/xl.v:99 Implicit port type (wire) for "Y". |
| |
| [INFO :EL0526] Design Elaboration... |
| |
| [NOTE :EL0508] Nb Top level modules: 0. |
| |
| [NOTE :EL0509] Max instance depth: 0. |
| |
| [NOTE :EL0510] Nb instances: 0. |
| |
| [NOTE :EL0511] Nb leaf instances: 0. |
| |
| [ FATAL] : 0 |
| [ SYNTAX] : 2 |
| [ ERROR] : 1 |
| [WARNING] : 0 |
| [ NOTE] : 11 |
| |