blob: 20dc3192833228364f25dd72d4bdaa4a1206ba1e [file] [log] [blame]
config cfg1; // specify rtl adder for top.a1, gate-level adder for top.a2
design rtlLib.top;
default liblist rtlLib;
instance top.a2 liblist gateLib;
endconfig
config top;
design rtlLib.top;
default liblist aLib rtlLib lib1;
// Bot
instance top.a1.f1.bot1 liblist lib4;
instance top.a1.f1.bot2 use lib2.bot;
// Sub
cell sub use lib3.sub;
instance top.a1.f1.bot2.sub2 use lib2.sub;
instance top.wtop use libw.libw:config;
instance top.wtopFake use libw.libwNone:config;
endconfig
config cfg3;
design rtlLib.top ;
default liblist aLib rtlLib;
cell m use gateLib.m ;
endconfig
config top3;
design rtlLib.top ;
default liblist aLib rtlLib;
instance top.bot use #();
instance top.bot use #(.WIDTH(32));
endconfig