| ******************************************** |
| * SURELOG System Verilog Compiler/Linter * |
| ******************************************** |
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| [INFO :CM0023] Creating log file ./slpp_all/surelog.log. |
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| [INFO :CP0300] Compilation... |
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| [INFO :CP0303] top.sv:2 Compile module "work@sram". |
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| [INFO :CP0302] /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv:4 Compile class "work@mailbox". |
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| [INFO :CP0302] /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv:33 Compile class "work@process". |
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| [INFO :CP0302] /home/alain/Surelog/SVIncCompil/dist/surelog/bin/../sv/builtin.sv:58 Compile class "work@semaphore". |
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| [ERROR:CP0334] top.sv:55 Colliding compilation unit name: "sram", |
| top.sv:2 previous usage. |
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| [NOTE :CP0309] top.sv:2 Implicit port type (wire) for "DBUS". |
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| [INFO :EL0526] Design Elaboration... |
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| [NOTE :EL0503] top.sv:2 Top level module "work@sram". |
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| [WARNI:EL0505] top.sv:55 Multiply defined module "work@sram", |
| top.sv:2 previous definition. |
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| [NOTE :EL0508] Nb Top level modules: 1. |
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| [NOTE :EL0509] Max instance depth: 1. |
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| [NOTE :EL0510] Nb instances: 1. |
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| [NOTE :EL0511] Nb leaf instances: 0. |
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| [ FATAL] : 0 |
| [ ERROR] : 1 |
| [WARNING] : 1 |
| [ NOTE] : 6 |
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| ******************************************** |
| * End SURELOG SVerilog Compiler/Linter * |
| ******************************************** |
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| 1.09user 0.04system 0:01.14elapsed 99%CPU (0avgtext+0avgdata 47408maxresident)k |
| 0inputs+104outputs (0major+14212minor)pagefaults 0swaps |
