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foss-fpga-tools
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third_party
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Surelog
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refs/heads/mithro-patch-1
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.
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SVIncCompil
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Testcases
/
Yosys
/
various
/
abc9.v
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module
abc9_test027
(
output reg o
);
initial o
=
1
'b0;
always @*
o <= ~o;
endmodule
module abc9_test028(input i, output o);
unknown u(~i, o);
endmodule