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foss-fpga-tools
/
third_party
/
Surelog
/
refs/heads/mithro-patch-1
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
simple
/
scripts
/
wreduce.ys
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read_verilog
../
top
.
v
hierarchy
-
top top
proc
;
opt
;
memory
;
dff2dffe
;
wreduce
;
clean
;
opt
design
-
reset
read_verilog
../
top
.
v
synth
-
top top
write_verilog
-
noexpr
-
norename synth
.
v
