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foss-fpga-tools / yosys-symbiflow-plugins / 2b46bc80d5211244e28219cae6c407039795364f / sdc-plugin
  1. f7fe1e8 sdc-plugin: Add missing includes. by Mariusz Glebocki · 2 years, 3 months ago
  2. 0b2d508 Output build artifacts to `build` subdirectory. by Mariusz Glebocki · 2 years, 6 months ago
  3. f5565a6 IWYU - the sdc plugin was only including a fraction of the headers it needs. by Henner Zeller · 3 years ago
  4. fe7835b fix(sdc): fix missing include of <iterator> by Xiretza · 3 years ago
  5. e814089 Relicense to Apache-2.0 by Karol Gugala · 3 years, 1 month ago
  6. da27bc7 Headers cleanup by Karol Gugala · 3 years, 1 month ago
  7. 63a6f77 readme: s/SymbiFlow/F4PGA/ by Unai Martinez-Corral · 3 years, 1 month ago
  8. 4f03a19 sdc: Allow -add option in create_clock by Tomasz Michalak · 3 years, 3 months ago
  9. b2377b2 tests: sdc: pll: have deterministic tests outputs by Alessandro Comodi · 3 years, 8 months ago
  10. c607966 tests: add clean processes step before the write_json step by Alessandro Comodi · 3 years, 8 months ago
  11. 83e0b4f Add missing license headers by Wojciech Tatarski · 4 years ago
  12. 53d43e2 Initial run of verilog formatting. by Henner Zeller · 4 years, 2 months ago
  13. 48b95dd SDC: abc9: Fix test by Tomasz Michalak · 4 years, 3 months ago
  14. 5fd261f SDC: use fastest clock as ABC9 delay target by Dan Ravensloft · 4 years, 3 months ago
  15. 17cbe27 Make output path for test outputs configurable. by Henner Zeller · 4 years, 3 months ago
  16. d20b352 Load plugins only if the symbol we're interested in is not there yet. by Henner Zeller · 4 years, 4 months ago
  17. 8c28ac7 In tests: Use $::env(DESIGN_TOP) where it isn't already. by Henner Zeller · 4 years, 4 months ago
  18. 1d1570d SDC: Add test for pll with propagated clocks by Tomasz Michalak · 4 years, 5 months ago
  19. 4c81617 SDC: Add include_propagated_clocks switch by Tomasz Michalak · 4 years, 5 months ago
  20. 9f0ac23 Run formatting on all plugins by Tomasz Michalak · 4 years, 5 months ago
  21. dd2a94c Format: Add format check script and enforce format checking by Tomasz Michalak · 4 years, 5 months ago
  22. 6d60a4b Fix compilation by Henner Zeller · 4 years, 5 months ago
  23. 1c43bbf SDC: Add TODO comment to remove dangling wire check by Tomasz Michalak · 4 years, 5 months ago
  24. 352aea3 SDC: Update get_clocks test by Tomasz Michalak · 4 years, 5 months ago
  25. f7a00ba SDC: Add comment about clock types by Tomasz Michalak · 4 years, 5 months ago
  26. 6893b71 SDC: Rename SourcePinName to SourceWireName by Tomasz Michalak · 4 years, 5 months ago
  27. 8636f2d SDC: Update counter, pll and get_clocks tests by Tomasz Michalak · 4 years, 5 months ago
  28. 04d31d2 SDC: Check if clock is generated or propagated in get_clocks by Tomasz Michalak · 4 years, 5 months ago
  29. f2b9eb2 SDC: Distinguish GENERATED, PROPAGATED and EXPLICIT clocks by Tomasz Michalak · 4 years, 5 months ago
  30. 8bd2e51 SDC: Get clock wire name from SOURCE_PINS by Tomasz Michalak · 4 years, 6 months ago
  31. 3aa88ed SDC: add explicit pll_dangling wires test by Alessandro Comodi · 4 years, 5 months ago
  32. f858e49 SDC: Add dangling wires to PLL design by Tomasz Michalak · 4 years, 5 months ago
  33. ec8cfe7 SDC: Don't add clocks on dangling wires by Tomasz Michalak · 4 years, 5 months ago
  34. f495ef8 tests: update tests due to changes in yosys by Alessandro Comodi · 4 years, 5 months ago
  35. beef976 tests: remove -vpr flag as it was removed in yosys by Alessandro Comodi · 4 years, 5 months ago
  36. 30b8ce4 SDC: Drop vpr switch in synth_xilinx by Tomasz Michalak · 4 years, 6 months ago
  37. 4d4a9be SDC: Add comments to get_clocks command by Tomasz Michalak · 4 years, 6 months ago
  38. a2e11a8 SDC: Add test for get_clocks by Tomasz Michalak · 4 years, 6 months ago
  39. f39d9f8 SDC: Add -of and -include_generated_clocks switches to get_clocks by Tomasz Michalak · 4 years, 6 months ago
  40. 0288408 SDC: Add PERIOD format check test by Tomasz Michalak · 4 years, 6 months ago
  41. 9691ce5 SDC: Clock propagation should fail if PERIOD attribute is missing on wire by Tomasz Michalak · 4 years, 6 months ago
  42. a3c96cd SDC: Add wire names to warning messages by Tomasz Michalak · 4 years, 6 months ago
  43. 33c5323 SDC: Add unit test for escaping dollar sign in wire names by Tomasz Michalak · 4 years, 6 months ago
  44. aef351b SDC: Extract regexp escaping to separate method by Tomasz Michalak · 4 years, 6 months ago
  45. 502b198 SDC: Correct error messages for incorrect waveform and period values by Tomasz Michalak · 4 years, 6 months ago
  46. 51c84cd SDC: Add negative tests for waveform and period format by Tomasz Michalak · 4 years, 6 months ago
  47. 819c5c9 SDC: Add period and waveform format error checks by Tomasz Michalak · 4 years, 6 months ago
  48. 4f367b5 SDC: Fix tests golden references after SDC clock sorting by Tomasz Michalak · 4 years, 6 months ago
  49. fccd5f9 SDC: Sort SDC output by wire names by Tomasz Michalak · 4 years, 6 months ago
  50. 4008f3f SDC: Add test for SDC written for design restored from json by Tomasz Michalak · 4 years, 6 months ago
  51. 40f95e5 SDC: Move the propagation methods to Propagation class by Tomasz Michalak · 4 years, 7 months ago
  52. 2b60d15 SDC: Refactor and remove unused code by Tomasz Michalak · 4 years, 7 months ago
  53. 25165f9 SDC: Update golden test files by Tomasz Michalak · 4 years, 7 months ago
  54. 2a7ead6 SDC: Fix all propagation types to use attributes by Tomasz Michalak · 4 years, 7 months ago
  55. 8aaf321 SDC: Write waveform from RTLIL attributes by Tomasz Michalak · 4 years, 7 months ago
  56. 927e7ba SDC: Remove Clocks storage by Tomasz Michalak · 4 years, 7 months ago
  57. 35edbd5 SDC: Remove Clocks class from get_clocks by Tomasz Michalak · 4 years, 7 months ago
  58. ac9c3a7 SDC: Attach CLOCK_SIGNAL and PERIOD attributes to wires by Tomasz Michalak · 4 years, 7 months ago
  59. c7e908b SDC: Add -through pin case for set_false_path command test by Tomasz Michalak · 4 years, 7 months ago
  60. 17d5d6d SDC: Add -through switch to set_false_path command by Tomasz Michalak · 4 years, 7 months ago
  61. d2c9ec9 Refactor to fix Clang warnings by Tomasz Michalak · 4 years, 7 months ago
  62. bae79ab SDC: Add test for set_clock_groups by Tomasz Michalak · 4 years, 7 months ago
  63. 54e230f SDC: Add set_clock_groups command and adjust SDC Writer by Tomasz Michalak · 4 years, 7 months ago
  64. c43dd9e Explicitly specify name of plugin and its sources by Tomasz Michalak · 4 years, 7 months ago
  65. 000cc6b Create common Makefile template to be used by all plugins by Tomasz Michalak · 4 years, 7 months ago
  66. 01e5f4e SDC plugin: Use common plugin test Makefile by Tomasz Michalak · 4 years, 7 months ago
  67. d953ece SDC: Add test for set_max_delay by Tomasz Michalak · 4 years, 7 months ago
  68. d00a636 SDC: Update SdcWriter class to write set_max_delay commands by Tomasz Michalak · 4 years, 7 months ago
  69. 214471e SDC: Add set_max_delay command by Tomasz Michalak · 4 years, 7 months ago
  70. d95f272 SDC: Add test for set_false_path by Tomasz Michalak · 4 years, 8 months ago
  71. 1a40d6f SDC: Add set_false_path command by Tomasz Michalak · 4 years, 8 months ago
  72. ae56c66 SDC: Implement sdc writer class by Tomasz Michalak · 4 years, 8 months ago
  73. 621198f SDC: Fix pll test for approximate equality by Tomasz Michalak · 4 years, 7 months ago
  74. d083935 SDC: Fix approximate equality condition by Tomasz Michalak · 4 years, 7 months ago
  75. 96e8adf SDC: Rename Pll input clock variable by Tomasz Michalak · 4 years, 7 months ago
  76. 12fd6b4 SDC: Make all not required Pll methods and fields private by Tomasz Michalak · 4 years, 7 months ago
  77. c951536 SDC: Add test for approximate equality on input clock by Tomasz Michalak · 4 years, 7 months ago
  78. a423917 SDC: Implement approximate equality check of input clock period by Tomasz Michalak · 4 years, 7 months ago
  79. 6d039d0 SDC: Add test for non default CLKFBOUT_PHASE by Tomasz Michalak · 4 years, 7 months ago
  80. 5aed81e SDC: Check if period of CLKIN1_PERIOD is equal to input clock by Tomasz Michalak · 4 years, 7 months ago
  81. 7370dca SDC: Update tests after input clock phase shift fix by Tomasz Michalak · 4 years, 7 months ago
  82. 0a3668a SDC: Handle input clock phase shift on clock generators by Tomasz Michalak · 4 years, 7 months ago
  83. e1ca5df SDC: Refactor PLL param getter by Tomasz Michalak · 4 years, 8 months ago
  84. c9c59e6 SDC: Add more test cases for create_clock by Tomasz Michalak · 4 years, 8 months ago
  85. 3bc1485 SDC: Check waveform values when adding clock by Tomasz Michalak · 4 years, 8 months ago
  86. 56efb74 SDC: Add duty cycle and input clock delay to output clock by Tomasz Michalak · 4 years, 8 months ago
  87. e5a04f5 SDC: Remove some assumptions when updating period and waveform values by Tomasz Michalak · 4 years, 8 months ago
  88. ea92198 SDC: Simplify API by Tomasz Michalak · 4 years, 8 months ago
  89. 44429fb SDC: Change default IBUF delay to 0 by Tomasz Michalak · 4 years, 8 months ago
  90. 94084ee SDC: Fix counter test references by Tomasz Michalak · 4 years, 8 months ago
  91. 16626f2 SDC: Update PLL test by Tomasz Michalak · 4 years, 8 months ago
  92. b594bf6 SDC: Perform buffer propagation after clock divider propagation by Tomasz Michalak · 4 years, 8 months ago
  93. ab3c62c SDC: Perform buffer propagation in two steps by Tomasz Michalak · 4 years, 8 months ago
  94. d6d5b54 SDC: Update tests and make them run in CI by Tomasz Michalak · 4 years, 8 months ago
  95. de839d1 SDC: Don't set SDC_DEBUG macro by Tomasz Michalak · 4 years, 8 months ago
  96. c824d79 SDC: Don't perform natural propagation by Tomasz Michalak · 4 years, 9 months ago
  97. 634dad9 SDC: Don't write create_clock commands for port nets by Tomasz Michalak · 4 years, 9 months ago
  98. ce2ccf0 SDC: Update test references by Tomasz Michalak · 4 years, 9 months ago
  99. 4241e81 SDC: Clang format by Tomasz Michalak · 4 years, 9 months ago
  100. 1da9b17 SDC: Adjust SDC output for VPR by Tomasz Michalak · 4 years, 9 months ago